diff options
author | David Howells <dhowells@redhat.com> | 2010-10-07 09:08:52 -0400 |
---|---|---|
committer | David Howells <dhowells@redhat.com> | 2010-10-07 09:08:52 -0400 |
commit | 3b139cdb373282dfa72316aa56887371e97cafe8 (patch) | |
tree | c8755b136c0787011409d6f8116d5493406d0b55 /arch/blackfin/mach-bf538 | |
parent | 5c74874bc9a838b185fe463153e63f7d895ebb77 (diff) |
Blackfin: Rename IRQ flags handling functions
Rename h/w IRQ flags handling functions to be in line with what is expected for
the irq renaming patch. This renames local_*_hw() to hard_local_*() using the
following perl command:
perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"`
and then fixing up asm/irqflags.h manually.
Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both
return the flags rather than passing it through the argument list.
Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch/blackfin/mach-bf538')
-rw-r--r-- | arch/blackfin/mach-bf538/include/mach/pll.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/pll.h b/arch/blackfin/mach-bf538/include/mach/pll.h index 0e67452df6be..b30bbcd412a7 100644 --- a/arch/blackfin/mach-bf538/include/mach/pll.h +++ b/arch/blackfin/mach-bf538/include/mach/pll.h | |||
@@ -18,7 +18,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val) | |||
18 | if (val == bfin_read_PLL_CTL()) | 18 | if (val == bfin_read_PLL_CTL()) |
19 | return; | 19 | return; |
20 | 20 | ||
21 | local_irq_save_hw(flags); | 21 | flags = hard_local_irq_save(); |
22 | /* Enable the PLL Wakeup bit in SIC IWR */ | 22 | /* Enable the PLL Wakeup bit in SIC IWR */ |
23 | iwr0 = bfin_read32(SIC_IWR0); | 23 | iwr0 = bfin_read32(SIC_IWR0); |
24 | iwr1 = bfin_read32(SIC_IWR1); | 24 | iwr1 = bfin_read32(SIC_IWR1); |
@@ -32,7 +32,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val) | |||
32 | 32 | ||
33 | bfin_write32(SIC_IWR0, iwr0); | 33 | bfin_write32(SIC_IWR0, iwr0); |
34 | bfin_write32(SIC_IWR1, iwr1); | 34 | bfin_write32(SIC_IWR1, iwr1); |
35 | local_irq_restore_hw(flags); | 35 | hard_local_irq_restore(flags); |
36 | } | 36 | } |
37 | 37 | ||
38 | /* Writing to VR_CTL initiates a PLL relock sequence. */ | 38 | /* Writing to VR_CTL initiates a PLL relock sequence. */ |
@@ -43,7 +43,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) | |||
43 | if (val == bfin_read_VR_CTL()) | 43 | if (val == bfin_read_VR_CTL()) |
44 | return; | 44 | return; |
45 | 45 | ||
46 | local_irq_save_hw(flags); | 46 | flags = hard_local_irq_save(); |
47 | /* Enable the PLL Wakeup bit in SIC IWR */ | 47 | /* Enable the PLL Wakeup bit in SIC IWR */ |
48 | iwr0 = bfin_read32(SIC_IWR0); | 48 | iwr0 = bfin_read32(SIC_IWR0); |
49 | iwr1 = bfin_read32(SIC_IWR1); | 49 | iwr1 = bfin_read32(SIC_IWR1); |
@@ -57,7 +57,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) | |||
57 | 57 | ||
58 | bfin_write32(SIC_IWR0, iwr0); | 58 | bfin_write32(SIC_IWR0, iwr0); |
59 | bfin_write32(SIC_IWR1, iwr1); | 59 | bfin_write32(SIC_IWR1, iwr1); |
60 | local_irq_restore_hw(flags); | 60 | hard_local_irq_restore(flags); |
61 | } | 61 | } |
62 | 62 | ||
63 | #endif /* _MACH_PLL_H */ | 63 | #endif /* _MACH_PLL_H */ |