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authorGraf Yang <graf.yang@analog.com>2009-01-07 10:14:39 -0500
committerBryan Wu <cooloney@kernel.org>2009-01-07 10:14:39 -0500
commit3d7c603ed44fbd7d047aa94d8791803ec1e17d03 (patch)
tree754303cbc9881cfa32fc6eddcd1d3b9ec7cc2601 /arch/blackfin/mach-bf538
parent42bd8bcb2fa1853fda9c51d956f70bbe2329bdfb (diff)
Blackfin arch: Remove wasted SIR header files
Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf538')
-rw-r--r--arch/blackfin/mach-bf538/include/mach/bfin_sir.h159
1 files changed, 0 insertions, 159 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/bfin_sir.h b/arch/blackfin/mach-bf538/include/mach/bfin_sir.h
deleted file mode 100644
index b2b546d0b9d3..000000000000
--- a/arch/blackfin/mach-bf538/include/mach/bfin_sir.h
+++ /dev/null
@@ -1,159 +0,0 @@
1/*
2 * Blackfin Infra-red Driver
3 *
4 * Copyright 2006-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 *
10 */
11
12#include <linux/serial.h>
13#include <asm/dma.h>
14#include <asm/portmux.h>
15
16#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
17#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
18#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
19#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
20#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
21#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
22#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
23
24#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
25#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
26#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
27#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
28#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
29#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
30
31#ifdef CONFIG_SIR_BFIN_DMA
32struct dma_rx_buf {
33 char *buf;
34 int head;
35 int tail;
36 };
37#endif /* CONFIG_SIR_BFIN_DMA */
38
39struct bfin_sir_port {
40 unsigned char __iomem *membase;
41 unsigned int irq;
42 unsigned int lsr;
43 unsigned long clk;
44 struct net_device *dev;
45#ifdef CONFIG_SIR_BFIN_DMA
46 int tx_done;
47 struct dma_rx_buf rx_dma_buf;
48 struct timer_list rx_dma_timer;
49 int rx_dma_nrows;
50#endif /* CONFIG_SIR_BFIN_DMA */
51 unsigned int tx_dma_channel;
52 unsigned int rx_dma_channel;
53};
54
55struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
56
57struct bfin_sir_port_res {
58 unsigned long base_addr;
59 int irq;
60 unsigned int rx_dma_channel;
61 unsigned int tx_dma_channel;
62};
63
64struct bfin_sir_port_res bfin_sir_port_resource[] = {
65#ifdef CONFIG_BFIN_SIR0
66 {
67 0xFFC00400,
68 IRQ_UART0_RX,
69 CH_UART0_RX,
70 CH_UART0_TX,
71 },
72#endif
73#ifdef CONFIG_BFIN_SIR1
74 {
75 0xFFC02000,
76 IRQ_UART1_RX,
77 CH_UART1_RX,
78 CH_UART1_TX,
79 },
80#endif
81#ifdef CONFIG_BFIN_SIR2
82 {
83 0xFFC02100,
84 IRQ_UART2_RX,
85 CH_UART2_RX,
86 CH_UART2_TX,
87 },
88#endif
89};
90
91int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
92
93struct bfin_sir_self {
94 struct bfin_sir_port *sir_port;
95 spinlock_t lock;
96 unsigned int open;
97 int speed;
98 int newspeed;
99
100 struct sk_buff *txskb;
101 struct sk_buff *rxskb;
102 struct net_device_stats stats;
103 struct device *dev;
104 struct irlap_cb *irlap;
105 struct qos_info qos;
106
107 iobuff_t tx_buff;
108 iobuff_t rx_buff;
109
110 struct work_struct work;
111 int mtt;
112};
113
114static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
115{
116 unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
117 port->lsr |= (lsr & (BI|FE|PE|OE));
118 return lsr | port->lsr;
119}
120
121static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
122{
123 port->lsr = 0;
124 bfin_read16(port->membase + OFFSET_LSR);
125}
126
127#define DRIVER_NAME "bfin_sir"
128
129static int bfin_sir_hw_init(void)
130{
131 int ret = -ENODEV;
132#ifdef CONFIG_BFIN_SIR0
133 ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
134 if (ret)
135 return ret;
136 ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
137 if (ret)
138 return ret;
139#endif
140
141#ifdef CONFIG_BFIN_SIR1
142 ret = peripheral_request(P_UART1_TX, DRIVER_NAME);
143 if (ret)
144 return ret;
145 ret = peripheral_request(P_UART1_RX, DRIVER_NAME);
146 if (ret)
147 return ret;
148#endif
149
150#ifdef CONFIG_BFIN_SIR2
151 ret = peripheral_request(P_UART2_TX, DRIVER_NAME);
152 if (ret)
153 return ret;
154 ret = peripheral_request(P_UART2_RX, DRIVER_NAME);
155 if (ret)
156 return ret;
157#endif
158 return ret;
159}