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authorMike Frysinger <vapier.adi@gmail.com>2008-08-06 05:17:10 -0400
committerBryan Wu <cooloney@kernel.org>2008-08-06 05:17:10 -0400
commit7e64acabfdb530b1b7d3db2592d75d102827baf3 (patch)
tree9cd5d29f86a700fa474f063462bad928d292b567 /arch/blackfin/mach-bf537
parent1375204611f417541e55ee09e248acdbbb94356d (diff)
Blackfin arch: move async memory programming into common setup_arch() as the banks dont really need to be setup fully as early as head.S
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf537')
-rw-r--r--arch/blackfin/mach-bf537/head.S22
1 files changed, 0 insertions, 22 deletions
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index c11f0fd82255..c062acb04836 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -184,28 +184,6 @@ ENTRY(__start)
184 call _start_dma_code; 184 call _start_dma_code;
185#endif 185#endif
186 186
187 /* Code for initializing Async memory banks */
188
189 p2.h = hi(EBIU_AMBCTL1);
190 p2.l = lo(EBIU_AMBCTL1);
191 r0.h = hi(AMBCTL1VAL);
192 r0.l = lo(AMBCTL1VAL);
193 [p2] = r0;
194 ssync;
195
196 p2.h = hi(EBIU_AMBCTL0);
197 p2.l = lo(EBIU_AMBCTL0);
198 r0.h = hi(AMBCTL0VAL);
199 r0.l = lo(AMBCTL0VAL);
200 [p2] = r0;
201 ssync;
202
203 p2.h = hi(EBIU_AMGCTL);
204 p2.l = lo(EBIU_AMGCTL);
205 r0 = AMGCTLVAL;
206 w[p2] = r0;
207 ssync;
208
209 /* This section keeps the processor in supervisor mode 187 /* This section keeps the processor in supervisor mode
210 * during kernel boot. Switches to user mode at end of boot. 188 * during kernel boot. Switches to user mode at end of boot.
211 * See page 3-9 of Hardware Reference manual for documentation. 189 * See page 3-9 of Hardware Reference manual for documentation.