diff options
author | Yi Li <yi.li@analog.com> | 2009-01-07 10:14:39 -0500 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2009-01-07 10:14:39 -0500 |
commit | 6a01f230339321292cf065551f8cf55361052461 (patch) | |
tree | 7ac2ac8fc9f05a7315ef6a7f6f0a387433c62c14 /arch/blackfin/mach-bf537/ints-priority.c | |
parent | 5105432a3201e3f0e6c219cd0a74feee1e5e262b (diff) |
Blackfin arch: merge adeos blackfin part to arch/blackfin/
[Mike Frysinger <vapier.adi@gmail.com>:
- handle bf531/bf532/bf534/bf536 variants in ipipe.h
- cleanup IPIPE logic for bfin_set_irq_handler()
- cleanup ipipe asm code a bit and add missing ENDPROC()
- simplify IPIPE code in trap_c
- unify some of the IPIPE code and fix style
- simplify DO_IRQ_L1 handling with ipipe code
- revert IRQ_SW_INT# addition from ipipe merge
- remove duplicate get_{c,s}clk() prototypes
]
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf537/ints-priority.c')
-rw-r--r-- | arch/blackfin/mach-bf537/ints-priority.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/blackfin/mach-bf537/ints-priority.c b/arch/blackfin/mach-bf537/ints-priority.c index b1300b3f1812..51c48087e03b 100644 --- a/arch/blackfin/mach-bf537/ints-priority.c +++ b/arch/blackfin/mach-bf537/ints-priority.c | |||
@@ -55,15 +55,15 @@ void __init program_IAR(void) | |||
55 | bfin_write_SIC_IAR2(((CONFIG_IRQ_CAN_TX - 7) << IRQ_CAN_TX_POS) | | 55 | bfin_write_SIC_IAR2(((CONFIG_IRQ_CAN_TX - 7) << IRQ_CAN_TX_POS) | |
56 | ((CONFIG_IRQ_MAC_RX - 7) << IRQ_MAC_RX_POS) | | 56 | ((CONFIG_IRQ_MAC_RX - 7) << IRQ_MAC_RX_POS) | |
57 | ((CONFIG_IRQ_MAC_TX - 7) << IRQ_MAC_TX_POS) | | 57 | ((CONFIG_IRQ_MAC_TX - 7) << IRQ_MAC_TX_POS) | |
58 | ((CONFIG_IRQ_TMR0 - 7) << IRQ_TMR0_POS) | | 58 | ((CONFIG_IRQ_TIMER0 - 7) << IRQ_TIMER0_POS) | |
59 | ((CONFIG_IRQ_TMR1 - 7) << IRQ_TMR1_POS) | | 59 | ((CONFIG_IRQ_TIMER1 - 7) << IRQ_TIMER1_POS) | |
60 | ((CONFIG_IRQ_TMR2 - 7) << IRQ_TMR2_POS) | | 60 | ((CONFIG_IRQ_TIMER2 - 7) << IRQ_TIMER2_POS) | |
61 | ((CONFIG_IRQ_TMR3 - 7) << IRQ_TMR3_POS) | | 61 | ((CONFIG_IRQ_TIMER3 - 7) << IRQ_TIMER3_POS) | |
62 | ((CONFIG_IRQ_TMR4 - 7) << IRQ_TMR4_POS)); | 62 | ((CONFIG_IRQ_TIMER4 - 7) << IRQ_TIMER4_POS)); |
63 | 63 | ||
64 | bfin_write_SIC_IAR3(((CONFIG_IRQ_TMR5 - 7) << IRQ_TMR5_POS) | | 64 | bfin_write_SIC_IAR3(((CONFIG_IRQ_TIMER5 - 7) << IRQ_TIMER5_POS) | |
65 | ((CONFIG_IRQ_TMR6 - 7) << IRQ_TMR6_POS) | | 65 | ((CONFIG_IRQ_TIMER6 - 7) << IRQ_TIMER6_POS) | |
66 | ((CONFIG_IRQ_TMR7 - 7) << IRQ_TMR7_POS) | | 66 | ((CONFIG_IRQ_TIMER7 - 7) << IRQ_TIMER7_POS) | |
67 | ((CONFIG_IRQ_PROG_INTA - 7) << IRQ_PROG_INTA_POS) | | 67 | ((CONFIG_IRQ_PROG_INTA - 7) << IRQ_PROG_INTA_POS) | |
68 | ((CONFIG_IRQ_PORTG_INTB - 7) << IRQ_PORTG_INTB_POS) | | 68 | ((CONFIG_IRQ_PORTG_INTB - 7) << IRQ_PORTG_INTB_POS) | |
69 | ((CONFIG_IRQ_MEM_DMA0 - 7) << IRQ_MEM_DMA0_POS) | | 69 | ((CONFIG_IRQ_MEM_DMA0 - 7) << IRQ_MEM_DMA0_POS) | |