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authorDavid Howells <dhowells@redhat.com>2010-10-07 09:08:52 -0400
committerDavid Howells <dhowells@redhat.com>2010-10-07 09:08:52 -0400
commit3b139cdb373282dfa72316aa56887371e97cafe8 (patch)
treec8755b136c0787011409d6f8116d5493406d0b55 /arch/blackfin/mach-bf537/include
parent5c74874bc9a838b185fe463153e63f7d895ebb77 (diff)
Blackfin: Rename IRQ flags handling functions
Rename h/w IRQ flags handling functions to be in line with what is expected for the irq renaming patch. This renames local_*_hw() to hard_local_*() using the following perl command: perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"` and then fixing up asm/irqflags.h manually. Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both return the flags rather than passing it through the argument list. Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch/blackfin/mach-bf537/include')
-rw-r--r--arch/blackfin/mach-bf537/include/mach/pll.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/blackfin/mach-bf537/include/mach/pll.h b/arch/blackfin/mach-bf537/include/mach/pll.h
index 9a0c9a2f1278..169c106d0edb 100644
--- a/arch/blackfin/mach-bf537/include/mach/pll.h
+++ b/arch/blackfin/mach-bf537/include/mach/pll.h
@@ -18,7 +18,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val)
18 if (val == bfin_read_PLL_CTL()) 18 if (val == bfin_read_PLL_CTL())
19 return; 19 return;
20 20
21 local_irq_save_hw(flags); 21 flags = hard_local_irq_save();
22 /* Enable the PLL Wakeup bit in SIC IWR */ 22 /* Enable the PLL Wakeup bit in SIC IWR */
23 iwr = bfin_read32(SIC_IWR); 23 iwr = bfin_read32(SIC_IWR);
24 /* Only allow PPL Wakeup) */ 24 /* Only allow PPL Wakeup) */
@@ -29,7 +29,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val)
29 asm("IDLE;"); 29 asm("IDLE;");
30 30
31 bfin_write32(SIC_IWR, iwr); 31 bfin_write32(SIC_IWR, iwr);
32 local_irq_restore_hw(flags); 32 hard_local_irq_restore(flags);
33} 33}
34 34
35/* Writing to VR_CTL initiates a PLL relock sequence. */ 35/* Writing to VR_CTL initiates a PLL relock sequence. */
@@ -40,7 +40,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
40 if (val == bfin_read_VR_CTL()) 40 if (val == bfin_read_VR_CTL())
41 return; 41 return;
42 42
43 local_irq_save_hw(flags); 43 flags = hard_local_irq_save();
44 /* Enable the PLL Wakeup bit in SIC IWR */ 44 /* Enable the PLL Wakeup bit in SIC IWR */
45 iwr = bfin_read32(SIC_IWR); 45 iwr = bfin_read32(SIC_IWR);
46 /* Only allow PPL Wakeup) */ 46 /* Only allow PPL Wakeup) */
@@ -51,7 +51,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
51 asm("IDLE;"); 51 asm("IDLE;");
52 52
53 bfin_write32(SIC_IWR, iwr); 53 bfin_write32(SIC_IWR, iwr);
54 local_irq_restore_hw(flags); 54 hard_local_irq_restore(flags);
55} 55}
56 56
57#endif /* _MACH_PLL_H */ 57#endif /* _MACH_PLL_H */