diff options
author | Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at> | 2009-09-10 11:12:08 -0400 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2009-09-16 22:10:45 -0400 |
commit | 6058434468daa16580a77922661b31b880d60db5 (patch) | |
tree | 6daf8e52413782dd7b68510bb6f4bb0e41171e6f /arch/blackfin/mach-bf537/boards/cm_bf537e.c | |
parent | 769cfc0d08e796c593b903ec393a2e90aae5f807 (diff) |
Blackfin: cm-bf537u: split board from cm-bf537e
The cm-bf537u module, while similar to the cm-bf537e, is different enough
to warrant its own resources. It has a USB controller but no PHY.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf537/boards/cm_bf537e.c')
-rw-r--r-- | arch/blackfin/mach-bf537/boards/cm_bf537e.c | 727 |
1 files changed, 727 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c new file mode 100644 index 000000000000..87acb7dd2df3 --- /dev/null +++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c | |||
@@ -0,0 +1,727 @@ | |||
1 | /* | ||
2 | * File: arch/blackfin/mach-bf537/boards/cm_bf537.c | ||
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | ||
4 | * Author: Aidan Williams <aidan@nicta.com.au> | ||
5 | * | ||
6 | * Created: 2005 | ||
7 | * Description: Board description file | ||
8 | * | ||
9 | * Modified: | ||
10 | * Copyright 2005 National ICT Australia (NICTA) | ||
11 | * Copyright 2004-2006 Analog Devices Inc. | ||
12 | * | ||
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License as published by | ||
17 | * the Free Software Foundation; either version 2 of the License, or | ||
18 | * (at your option) any later version. | ||
19 | * | ||
20 | * This program is distributed in the hope that it will be useful, | ||
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
23 | * GNU General Public License for more details. | ||
24 | * | ||
25 | * You should have received a copy of the GNU General Public License | ||
26 | * along with this program; if not, see the file COPYING, or write | ||
27 | * to the Free Software Foundation, Inc., | ||
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
29 | */ | ||
30 | |||
31 | #include <linux/device.h> | ||
32 | #include <linux/etherdevice.h> | ||
33 | #include <linux/platform_device.h> | ||
34 | #include <linux/mtd/mtd.h> | ||
35 | #include <linux/mtd/partitions.h> | ||
36 | #include <linux/mtd/physmap.h> | ||
37 | #include <linux/spi/spi.h> | ||
38 | #include <linux/spi/flash.h> | ||
39 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
40 | #include <linux/usb/isp1362.h> | ||
41 | #endif | ||
42 | #include <linux/ata_platform.h> | ||
43 | #include <linux/irq.h> | ||
44 | #include <asm/dma.h> | ||
45 | #include <asm/bfin5xx_spi.h> | ||
46 | #include <asm/portmux.h> | ||
47 | #include <asm/dpmc.h> | ||
48 | |||
49 | /* | ||
50 | * Name the Board for the /proc/cpuinfo | ||
51 | */ | ||
52 | const char bfin_board_name[] = "Bluetechnix CM BF537E"; | ||
53 | |||
54 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
55 | /* all SPI peripherals info goes here */ | ||
56 | |||
57 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | ||
58 | static struct mtd_partition bfin_spi_flash_partitions[] = { | ||
59 | { | ||
60 | .name = "bootloader(spi)", | ||
61 | .size = 0x00020000, | ||
62 | .offset = 0, | ||
63 | .mask_flags = MTD_CAP_ROM | ||
64 | }, { | ||
65 | .name = "linux kernel(spi)", | ||
66 | .size = 0xe0000, | ||
67 | .offset = 0x20000 | ||
68 | }, { | ||
69 | .name = "file system(spi)", | ||
70 | .size = 0x700000, | ||
71 | .offset = 0x00100000, | ||
72 | } | ||
73 | }; | ||
74 | |||
75 | static struct flash_platform_data bfin_spi_flash_data = { | ||
76 | .name = "m25p80", | ||
77 | .parts = bfin_spi_flash_partitions, | ||
78 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | ||
79 | .type = "m25p64", | ||
80 | }; | ||
81 | |||
82 | /* SPI flash chip (m25p64) */ | ||
83 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | ||
84 | .enable_dma = 0, /* use dma transfer with this chip*/ | ||
85 | .bits_per_word = 8, | ||
86 | }; | ||
87 | #endif | ||
88 | |||
89 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
90 | /* SPI ADC chip */ | ||
91 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
92 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
93 | .bits_per_word = 16, | ||
94 | }; | ||
95 | #endif | ||
96 | |||
97 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | ||
98 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
99 | .enable_dma = 0, | ||
100 | .bits_per_word = 16, | ||
101 | }; | ||
102 | #endif | ||
103 | |||
104 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | ||
105 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | ||
106 | .enable_dma = 0, | ||
107 | .bits_per_word = 8, | ||
108 | }; | ||
109 | #endif | ||
110 | |||
111 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | ||
112 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | ||
113 | { | ||
114 | /* the modalias must be the same as spi device driver name */ | ||
115 | .modalias = "m25p80", /* Name of spi_driver for this device */ | ||
116 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | ||
117 | .bus_num = 0, /* Framework bus number */ | ||
118 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ | ||
119 | .platform_data = &bfin_spi_flash_data, | ||
120 | .controller_data = &spi_flash_chip_info, | ||
121 | .mode = SPI_MODE_3, | ||
122 | }, | ||
123 | #endif | ||
124 | |||
125 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
126 | { | ||
127 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
128 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
129 | .bus_num = 0, /* Framework bus number */ | ||
130 | .chip_select = 1, /* Framework chip select. */ | ||
131 | .platform_data = NULL, /* No spi_driver specific config */ | ||
132 | .controller_data = &spi_adc_chip_info, | ||
133 | }, | ||
134 | #endif | ||
135 | |||
136 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | ||
137 | { | ||
138 | .modalias = "ad1836", | ||
139 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | ||
140 | .bus_num = 0, | ||
141 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, | ||
142 | .controller_data = &ad1836_spi_chip_info, | ||
143 | }, | ||
144 | #endif | ||
145 | |||
146 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | ||
147 | { | ||
148 | .modalias = "mmc_spi", | ||
149 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | ||
150 | .bus_num = 0, | ||
151 | .chip_select = 1, | ||
152 | .controller_data = &mmc_spi_chip_info, | ||
153 | .mode = SPI_MODE_3, | ||
154 | }, | ||
155 | #endif | ||
156 | }; | ||
157 | |||
158 | /* SPI (0) */ | ||
159 | static struct resource bfin_spi0_resource[] = { | ||
160 | [0] = { | ||
161 | .start = SPI0_REGBASE, | ||
162 | .end = SPI0_REGBASE + 0xFF, | ||
163 | .flags = IORESOURCE_MEM, | ||
164 | }, | ||
165 | [1] = { | ||
166 | .start = CH_SPI, | ||
167 | .end = CH_SPI, | ||
168 | .flags = IORESOURCE_DMA, | ||
169 | }, | ||
170 | [2] = { | ||
171 | .start = IRQ_SPI, | ||
172 | .end = IRQ_SPI, | ||
173 | .flags = IORESOURCE_IRQ, | ||
174 | }, | ||
175 | }; | ||
176 | |||
177 | /* SPI controller data */ | ||
178 | static struct bfin5xx_spi_master bfin_spi0_info = { | ||
179 | .num_chipselect = 8, | ||
180 | .enable_dma = 1, /* master has the ability to do dma transfer */ | ||
181 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, | ||
182 | }; | ||
183 | |||
184 | static struct platform_device bfin_spi0_device = { | ||
185 | .name = "bfin-spi", | ||
186 | .id = 0, /* Bus number */ | ||
187 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | ||
188 | .resource = bfin_spi0_resource, | ||
189 | .dev = { | ||
190 | .platform_data = &bfin_spi0_info, /* Passed to driver */ | ||
191 | }, | ||
192 | }; | ||
193 | #endif /* spi master and devices */ | ||
194 | |||
195 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | ||
196 | static struct platform_device rtc_device = { | ||
197 | .name = "rtc-bfin", | ||
198 | .id = -1, | ||
199 | }; | ||
200 | #endif | ||
201 | |||
202 | #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) | ||
203 | static struct platform_device hitachi_fb_device = { | ||
204 | .name = "hitachi-tx09", | ||
205 | }; | ||
206 | #endif | ||
207 | |||
208 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
209 | #include <linux/smc91x.h> | ||
210 | |||
211 | static struct smc91x_platdata smc91x_info = { | ||
212 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, | ||
213 | .leda = RPC_LED_100_10, | ||
214 | .ledb = RPC_LED_TX_RX, | ||
215 | }; | ||
216 | |||
217 | static struct resource smc91x_resources[] = { | ||
218 | { | ||
219 | .start = 0x20200300, | ||
220 | .end = 0x20200300 + 16, | ||
221 | .flags = IORESOURCE_MEM, | ||
222 | }, { | ||
223 | .start = IRQ_PF14, | ||
224 | .end = IRQ_PF14, | ||
225 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
226 | }, | ||
227 | }; | ||
228 | |||
229 | static struct platform_device smc91x_device = { | ||
230 | .name = "smc91x", | ||
231 | .id = 0, | ||
232 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
233 | .resource = smc91x_resources, | ||
234 | .dev = { | ||
235 | .platform_data = &smc91x_info, | ||
236 | }, | ||
237 | }; | ||
238 | #endif | ||
239 | |||
240 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
241 | static struct resource isp1362_hcd_resources[] = { | ||
242 | { | ||
243 | .start = 0x20308000, | ||
244 | .end = 0x20308000, | ||
245 | .flags = IORESOURCE_MEM, | ||
246 | }, { | ||
247 | .start = 0x20308004, | ||
248 | .end = 0x20308004, | ||
249 | .flags = IORESOURCE_MEM, | ||
250 | }, { | ||
251 | .start = IRQ_PG15, | ||
252 | .end = IRQ_PG15, | ||
253 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
254 | }, | ||
255 | }; | ||
256 | |||
257 | static struct isp1362_platform_data isp1362_priv = { | ||
258 | .sel15Kres = 1, | ||
259 | .clknotstop = 0, | ||
260 | .oc_enable = 0, | ||
261 | .int_act_high = 0, | ||
262 | .int_edge_triggered = 0, | ||
263 | .remote_wakeup_connected = 0, | ||
264 | .no_power_switching = 1, | ||
265 | .power_switching_mode = 0, | ||
266 | }; | ||
267 | |||
268 | static struct platform_device isp1362_hcd_device = { | ||
269 | .name = "isp1362-hcd", | ||
270 | .id = 0, | ||
271 | .dev = { | ||
272 | .platform_data = &isp1362_priv, | ||
273 | }, | ||
274 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | ||
275 | .resource = isp1362_hcd_resources, | ||
276 | }; | ||
277 | #endif | ||
278 | |||
279 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | ||
280 | static struct resource net2272_bfin_resources[] = { | ||
281 | { | ||
282 | .start = 0x20300000, | ||
283 | .end = 0x20300000 + 0x100, | ||
284 | .flags = IORESOURCE_MEM, | ||
285 | }, { | ||
286 | .start = IRQ_PG13, | ||
287 | .end = IRQ_PG13, | ||
288 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
289 | }, | ||
290 | }; | ||
291 | |||
292 | static struct platform_device net2272_bfin_device = { | ||
293 | .name = "net2272", | ||
294 | .id = -1, | ||
295 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | ||
296 | .resource = net2272_bfin_resources, | ||
297 | }; | ||
298 | #endif | ||
299 | |||
300 | static struct resource bfin_gpios_resources = { | ||
301 | .start = 0, | ||
302 | .end = MAX_BLACKFIN_GPIOS - 1, | ||
303 | .flags = IORESOURCE_IRQ, | ||
304 | }; | ||
305 | |||
306 | static struct platform_device bfin_gpios_device = { | ||
307 | .name = "simple-gpio", | ||
308 | .id = -1, | ||
309 | .num_resources = 1, | ||
310 | .resource = &bfin_gpios_resources, | ||
311 | }; | ||
312 | |||
313 | #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE) | ||
314 | static struct mtd_partition cm_partitions[] = { | ||
315 | { | ||
316 | .name = "bootloader(nor)", | ||
317 | .size = 0x40000, | ||
318 | .offset = 0, | ||
319 | }, { | ||
320 | .name = "linux kernel(nor)", | ||
321 | .size = 0x100000, | ||
322 | .offset = MTDPART_OFS_APPEND, | ||
323 | }, { | ||
324 | .name = "file system(nor)", | ||
325 | .size = MTDPART_SIZ_FULL, | ||
326 | .offset = MTDPART_OFS_APPEND, | ||
327 | } | ||
328 | }; | ||
329 | |||
330 | static struct physmap_flash_data cm_flash_data = { | ||
331 | .width = 2, | ||
332 | .parts = cm_partitions, | ||
333 | .nr_parts = ARRAY_SIZE(cm_partitions), | ||
334 | }; | ||
335 | |||
336 | static unsigned cm_flash_gpios[] = { GPIO_PF4 }; | ||
337 | |||
338 | static struct resource cm_flash_resource[] = { | ||
339 | { | ||
340 | .name = "cfi_probe", | ||
341 | .start = 0x20000000, | ||
342 | .end = 0x201fffff, | ||
343 | .flags = IORESOURCE_MEM, | ||
344 | }, { | ||
345 | .start = (unsigned long)cm_flash_gpios, | ||
346 | .end = ARRAY_SIZE(cm_flash_gpios), | ||
347 | .flags = IORESOURCE_IRQ, | ||
348 | } | ||
349 | }; | ||
350 | |||
351 | static struct platform_device cm_flash_device = { | ||
352 | .name = "gpio-addr-flash", | ||
353 | .id = 0, | ||
354 | .dev = { | ||
355 | .platform_data = &cm_flash_data, | ||
356 | }, | ||
357 | .num_resources = ARRAY_SIZE(cm_flash_resource), | ||
358 | .resource = cm_flash_resource, | ||
359 | }; | ||
360 | #endif | ||
361 | |||
362 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | ||
363 | #ifdef CONFIG_SERIAL_BFIN_UART0 | ||
364 | static struct resource bfin_uart0_resources[] = { | ||
365 | { | ||
366 | .start = 0xFFC00400, | ||
367 | .end = 0xFFC004FF, | ||
368 | .flags = IORESOURCE_MEM, | ||
369 | }, | ||
370 | { | ||
371 | .start = IRQ_UART0_RX, | ||
372 | .end = IRQ_UART0_RX+1, | ||
373 | .flags = IORESOURCE_IRQ, | ||
374 | }, | ||
375 | { | ||
376 | .start = IRQ_UART0_ERROR, | ||
377 | .end = IRQ_UART0_ERROR, | ||
378 | .flags = IORESOURCE_IRQ, | ||
379 | }, | ||
380 | { | ||
381 | .start = CH_UART0_TX, | ||
382 | .end = CH_UART0_TX, | ||
383 | .flags = IORESOURCE_DMA, | ||
384 | }, | ||
385 | { | ||
386 | .start = CH_UART0_RX, | ||
387 | .end = CH_UART0_RX, | ||
388 | .flags = IORESOURCE_DMA, | ||
389 | }, | ||
390 | #ifdef CONFIG_BFIN_UART0_CTSRTS | ||
391 | { | ||
392 | /* | ||
393 | * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map. | ||
394 | */ | ||
395 | .start = -1, | ||
396 | .end = -1, | ||
397 | .flags = IORESOURCE_IO, | ||
398 | }, | ||
399 | { | ||
400 | /* | ||
401 | * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map. | ||
402 | */ | ||
403 | .start = -1, | ||
404 | .end = -1, | ||
405 | .flags = IORESOURCE_IO, | ||
406 | }, | ||
407 | #endif | ||
408 | }; | ||
409 | |||
410 | static struct platform_device bfin_uart0_device = { | ||
411 | .name = "bfin-uart", | ||
412 | .id = 0, | ||
413 | .num_resources = ARRAY_SIZE(bfin_uart0_resources), | ||
414 | .resource = bfin_uart0_resources, | ||
415 | }; | ||
416 | #endif | ||
417 | #ifdef CONFIG_SERIAL_BFIN_UART1 | ||
418 | static struct resource bfin_uart1_resources[] = { | ||
419 | { | ||
420 | .start = 0xFFC02000, | ||
421 | .end = 0xFFC020FF, | ||
422 | .flags = IORESOURCE_MEM, | ||
423 | }, | ||
424 | { | ||
425 | .start = IRQ_UART1_RX, | ||
426 | .end = IRQ_UART1_RX+1, | ||
427 | .flags = IORESOURCE_IRQ, | ||
428 | }, | ||
429 | { | ||
430 | .start = IRQ_UART1_ERROR, | ||
431 | .end = IRQ_UART1_ERROR, | ||
432 | .flags = IORESOURCE_IRQ, | ||
433 | }, | ||
434 | { | ||
435 | .start = CH_UART1_TX, | ||
436 | .end = CH_UART1_TX, | ||
437 | .flags = IORESOURCE_DMA, | ||
438 | }, | ||
439 | { | ||
440 | .start = CH_UART1_RX, | ||
441 | .end = CH_UART1_RX, | ||
442 | .flags = IORESOURCE_DMA, | ||
443 | }, | ||
444 | #ifdef CONFIG_BFIN_UART1_CTSRTS | ||
445 | { | ||
446 | /* | ||
447 | * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map. | ||
448 | */ | ||
449 | .start = -1, | ||
450 | .end = -1, | ||
451 | .flags = IORESOURCE_IO, | ||
452 | }, | ||
453 | { | ||
454 | /* | ||
455 | * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map. | ||
456 | */ | ||
457 | .start = -1, | ||
458 | .end = -1, | ||
459 | .flags = IORESOURCE_IO, | ||
460 | }, | ||
461 | #endif | ||
462 | }; | ||
463 | |||
464 | static struct platform_device bfin_uart1_device = { | ||
465 | .name = "bfin-uart", | ||
466 | .id = 1, | ||
467 | .num_resources = ARRAY_SIZE(bfin_uart1_resources), | ||
468 | .resource = bfin_uart1_resources, | ||
469 | }; | ||
470 | #endif | ||
471 | #endif | ||
472 | |||
473 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
474 | #ifdef CONFIG_BFIN_SIR0 | ||
475 | static struct resource bfin_sir0_resources[] = { | ||
476 | { | ||
477 | .start = 0xFFC00400, | ||
478 | .end = 0xFFC004FF, | ||
479 | .flags = IORESOURCE_MEM, | ||
480 | }, | ||
481 | { | ||
482 | .start = IRQ_UART0_RX, | ||
483 | .end = IRQ_UART0_RX+1, | ||
484 | .flags = IORESOURCE_IRQ, | ||
485 | }, | ||
486 | { | ||
487 | .start = CH_UART0_RX, | ||
488 | .end = CH_UART0_RX+1, | ||
489 | .flags = IORESOURCE_DMA, | ||
490 | }, | ||
491 | }; | ||
492 | static struct platform_device bfin_sir0_device = { | ||
493 | .name = "bfin_sir", | ||
494 | .id = 0, | ||
495 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), | ||
496 | .resource = bfin_sir0_resources, | ||
497 | }; | ||
498 | #endif | ||
499 | #ifdef CONFIG_BFIN_SIR1 | ||
500 | static struct resource bfin_sir1_resources[] = { | ||
501 | { | ||
502 | .start = 0xFFC02000, | ||
503 | .end = 0xFFC020FF, | ||
504 | .flags = IORESOURCE_MEM, | ||
505 | }, | ||
506 | { | ||
507 | .start = IRQ_UART1_RX, | ||
508 | .end = IRQ_UART1_RX+1, | ||
509 | .flags = IORESOURCE_IRQ, | ||
510 | }, | ||
511 | { | ||
512 | .start = CH_UART1_RX, | ||
513 | .end = CH_UART1_RX+1, | ||
514 | .flags = IORESOURCE_DMA, | ||
515 | }, | ||
516 | }; | ||
517 | static struct platform_device bfin_sir1_device = { | ||
518 | .name = "bfin_sir", | ||
519 | .id = 1, | ||
520 | .num_resources = ARRAY_SIZE(bfin_sir1_resources), | ||
521 | .resource = bfin_sir1_resources, | ||
522 | }; | ||
523 | #endif | ||
524 | #endif | ||
525 | |||
526 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | ||
527 | static struct resource bfin_twi0_resource[] = { | ||
528 | [0] = { | ||
529 | .start = TWI0_REGBASE, | ||
530 | .end = TWI0_REGBASE, | ||
531 | .flags = IORESOURCE_MEM, | ||
532 | }, | ||
533 | [1] = { | ||
534 | .start = IRQ_TWI, | ||
535 | .end = IRQ_TWI, | ||
536 | .flags = IORESOURCE_IRQ, | ||
537 | }, | ||
538 | }; | ||
539 | |||
540 | static struct platform_device i2c_bfin_twi_device = { | ||
541 | .name = "i2c-bfin-twi", | ||
542 | .id = 0, | ||
543 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), | ||
544 | .resource = bfin_twi0_resource, | ||
545 | }; | ||
546 | #endif | ||
547 | |||
548 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | ||
549 | static struct platform_device bfin_sport0_uart_device = { | ||
550 | .name = "bfin-sport-uart", | ||
551 | .id = 0, | ||
552 | }; | ||
553 | |||
554 | static struct platform_device bfin_sport1_uart_device = { | ||
555 | .name = "bfin-sport-uart", | ||
556 | .id = 1, | ||
557 | }; | ||
558 | #endif | ||
559 | |||
560 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
561 | static struct platform_device bfin_mii_bus = { | ||
562 | .name = "bfin_mii_bus", | ||
563 | }; | ||
564 | |||
565 | static struct platform_device bfin_mac_device = { | ||
566 | .name = "bfin_mac", | ||
567 | .dev.platform_data = &bfin_mii_bus, | ||
568 | }; | ||
569 | #endif | ||
570 | |||
571 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | ||
572 | #define PATA_INT IRQ_PF14 | ||
573 | |||
574 | static struct pata_platform_info bfin_pata_platform_data = { | ||
575 | .ioport_shift = 2, | ||
576 | .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED, | ||
577 | }; | ||
578 | |||
579 | static struct resource bfin_pata_resources[] = { | ||
580 | { | ||
581 | .start = 0x2030C000, | ||
582 | .end = 0x2030C01F, | ||
583 | .flags = IORESOURCE_MEM, | ||
584 | }, | ||
585 | { | ||
586 | .start = 0x2030D018, | ||
587 | .end = 0x2030D01B, | ||
588 | .flags = IORESOURCE_MEM, | ||
589 | }, | ||
590 | { | ||
591 | .start = PATA_INT, | ||
592 | .end = PATA_INT, | ||
593 | .flags = IORESOURCE_IRQ, | ||
594 | }, | ||
595 | }; | ||
596 | |||
597 | static struct platform_device bfin_pata_device = { | ||
598 | .name = "pata_platform", | ||
599 | .id = -1, | ||
600 | .num_resources = ARRAY_SIZE(bfin_pata_resources), | ||
601 | .resource = bfin_pata_resources, | ||
602 | .dev = { | ||
603 | .platform_data = &bfin_pata_platform_data, | ||
604 | } | ||
605 | }; | ||
606 | #endif | ||
607 | |||
608 | static const unsigned int cclk_vlev_datasheet[] = | ||
609 | { | ||
610 | VRPAIR(VLEV_085, 250000000), | ||
611 | VRPAIR(VLEV_090, 376000000), | ||
612 | VRPAIR(VLEV_095, 426000000), | ||
613 | VRPAIR(VLEV_100, 426000000), | ||
614 | VRPAIR(VLEV_105, 476000000), | ||
615 | VRPAIR(VLEV_110, 476000000), | ||
616 | VRPAIR(VLEV_115, 476000000), | ||
617 | VRPAIR(VLEV_120, 500000000), | ||
618 | VRPAIR(VLEV_125, 533000000), | ||
619 | VRPAIR(VLEV_130, 600000000), | ||
620 | }; | ||
621 | |||
622 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { | ||
623 | .tuple_tab = cclk_vlev_datasheet, | ||
624 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), | ||
625 | .vr_settling_time = 25 /* us */, | ||
626 | }; | ||
627 | |||
628 | static struct platform_device bfin_dpmc = { | ||
629 | .name = "bfin dpmc", | ||
630 | .dev = { | ||
631 | .platform_data = &bfin_dmpc_vreg_data, | ||
632 | }, | ||
633 | }; | ||
634 | |||
635 | static struct platform_device *cm_bf537e_devices[] __initdata = { | ||
636 | |||
637 | &bfin_dpmc, | ||
638 | |||
639 | #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) | ||
640 | &hitachi_fb_device, | ||
641 | #endif | ||
642 | |||
643 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | ||
644 | &rtc_device, | ||
645 | #endif | ||
646 | |||
647 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | ||
648 | #ifdef CONFIG_SERIAL_BFIN_UART0 | ||
649 | &bfin_uart0_device, | ||
650 | #endif | ||
651 | #ifdef CONFIG_SERIAL_BFIN_UART1 | ||
652 | &bfin_uart1_device, | ||
653 | #endif | ||
654 | #endif | ||
655 | |||
656 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
657 | #ifdef CONFIG_BFIN_SIR0 | ||
658 | &bfin_sir0_device, | ||
659 | #endif | ||
660 | #ifdef CONFIG_BFIN_SIR1 | ||
661 | &bfin_sir1_device, | ||
662 | #endif | ||
663 | #endif | ||
664 | |||
665 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | ||
666 | &i2c_bfin_twi_device, | ||
667 | #endif | ||
668 | |||
669 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | ||
670 | &bfin_sport0_uart_device, | ||
671 | &bfin_sport1_uart_device, | ||
672 | #endif | ||
673 | |||
674 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
675 | &isp1362_hcd_device, | ||
676 | #endif | ||
677 | |||
678 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
679 | &smc91x_device, | ||
680 | #endif | ||
681 | |||
682 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
683 | &bfin_mii_bus, | ||
684 | &bfin_mac_device, | ||
685 | #endif | ||
686 | |||
687 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | ||
688 | &net2272_bfin_device, | ||
689 | #endif | ||
690 | |||
691 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
692 | &bfin_spi0_device, | ||
693 | #endif | ||
694 | |||
695 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | ||
696 | &bfin_pata_device, | ||
697 | #endif | ||
698 | |||
699 | #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE) | ||
700 | &cm_flash_device, | ||
701 | #endif | ||
702 | |||
703 | &bfin_gpios_device, | ||
704 | }; | ||
705 | |||
706 | static int __init cm_bf537e_init(void) | ||
707 | { | ||
708 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | ||
709 | platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices)); | ||
710 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
711 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | ||
712 | #endif | ||
713 | |||
714 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | ||
715 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | ||
716 | #endif | ||
717 | return 0; | ||
718 | } | ||
719 | |||
720 | arch_initcall(cm_bf537e_init); | ||
721 | |||
722 | void bfin_get_ether_addr(char *addr) | ||
723 | { | ||
724 | random_ether_addr(addr); | ||
725 | printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__); | ||
726 | } | ||
727 | EXPORT_SYMBOL(bfin_get_ether_addr); | ||