diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2009-10-20 13:20:21 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2009-12-15 00:14:59 -0500 |
| commit | 00d2460454676344a55a03f03fa284ad69325592 (patch) | |
| tree | 7885d8dcdeb1ffc026bc4888e1074ce7b8133c7a /arch/blackfin/mach-bf533 | |
| parent | c6feb7682885f732a264ef589ee44edb1a3d45f2 (diff) | |
Blackfin: unify DMA masks
Every Blackfin variant has the same DMA bit masks, so avoid duplicating
them over and over in each mach header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf533')
| -rw-r--r-- | arch/blackfin/mach-bf533/include/mach/defBF532.h | 49 |
1 files changed, 1 insertions, 48 deletions
diff --git a/arch/blackfin/mach-bf533/include/mach/defBF532.h b/arch/blackfin/mach-bf533/include/mach/defBF532.h index 7e61fe762df2..e9ff491c0953 100644 --- a/arch/blackfin/mach-bf533/include/mach/defBF532.h +++ b/arch/blackfin/mach-bf533/include/mach/defBF532.h | |||
| @@ -637,54 +637,7 @@ | |||
| 637 | 637 | ||
| 638 | /* ********** DMA CONTROLLER MASKS *********************8 */ | 638 | /* ********** DMA CONTROLLER MASKS *********************8 */ |
| 639 | 639 | ||
| 640 | /*DMAx_CONFIG, MDMA_yy_CONFIG Masks */ | 640 | /* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP Masks */ |
| 641 | #define DMAEN 0x00000001 /* Channel Enable */ | ||
| 642 | #define WNR 0x00000002 /* Channel Direction (W/R*) */ | ||
| 643 | #define WDSIZE_8 0x00000000 /* Word Size 8 bits */ | ||
| 644 | #define WDSIZE_16 0x00000004 /* Word Size 16 bits */ | ||
| 645 | #define WDSIZE_32 0x00000008 /* Word Size 32 bits */ | ||
| 646 | #define DMA2D 0x00000010 /* 2D/1D* Mode */ | ||
| 647 | #define RESTART 0x00000020 /* Restart */ | ||
| 648 | #define DI_SEL 0x00000040 /* Data Interrupt Select */ | ||
| 649 | #define DI_EN 0x00000080 /* Data Interrupt Enable */ | ||
| 650 | #define NDSIZE_0 0x0000 /* Next Descriptor Size = 0 (Stop/Autobuffer) */ | ||
| 651 | #define NDSIZE_1 0x0100 /* Next Descriptor Size = 1 */ | ||
| 652 | #define NDSIZE_2 0x0200 /* Next Descriptor Size = 2 */ | ||
| 653 | #define NDSIZE_3 0x0300 /* Next Descriptor Size = 3 */ | ||
| 654 | #define NDSIZE_4 0x0400 /* Next Descriptor Size = 4 */ | ||
| 655 | #define NDSIZE_5 0x0500 /* Next Descriptor Size = 5 */ | ||
| 656 | #define NDSIZE_6 0x0600 /* Next Descriptor Size = 6 */ | ||
| 657 | #define NDSIZE_7 0x0700 /* Next Descriptor Size = 7 */ | ||
| 658 | #define NDSIZE_8 0x0800 /* Next Descriptor Size = 8 */ | ||
| 659 | #define NDSIZE_9 0x0900 /* Next Descriptor Size = 9 */ | ||
| 660 | #define NDSIZE 0x00000900 /* Next Descriptor Size */ | ||
| 661 | #define DMAFLOW 0x00007000 /* Flow Control */ | ||
| 662 | #define DMAFLOW_STOP 0x0000 /* Stop Mode */ | ||
| 663 | #define DMAFLOW_AUTO 0x1000 /* Autobuffer Mode */ | ||
| 664 | #define DMAFLOW_ARRAY 0x4000 /* Descriptor Array Mode */ | ||
| 665 | #define DMAFLOW_SMALL 0x6000 /* Small Model Descriptor List Mode */ | ||
| 666 | #define DMAFLOW_LARGE 0x7000 /* Large Model Descriptor List Mode */ | ||
| 667 | |||
| 668 | #define DMAEN_P 0 /* Channel Enable */ | ||
| 669 | #define WNR_P 1 /* Channel Direction (W/R*) */ | ||
| 670 | #define DMA2D_P 4 /* 2D/1D* Mode */ | ||
| 671 | #define RESTART_P 5 /* Restart */ | ||
| 672 | #define DI_SEL_P 6 /* Data Interrupt Select */ | ||
| 673 | #define DI_EN_P 7 /* Data Interrupt Enable */ | ||
| 674 | |||
| 675 | /*DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS Masks */ | ||
| 676 | |||
| 677 | #define DMA_DONE 0x00000001 /* DMA Done Indicator */ | ||
| 678 | #define DMA_ERR 0x00000002 /* DMA Error Indicator */ | ||
| 679 | #define DFETCH 0x00000004 /* Descriptor Fetch Indicator */ | ||
| 680 | #define DMA_RUN 0x00000008 /* DMA Running Indicator */ | ||
| 681 | |||
| 682 | #define DMA_DONE_P 0 /* DMA Done Indicator */ | ||
| 683 | #define DMA_ERR_P 1 /* DMA Error Indicator */ | ||
| 684 | #define DFETCH_P 2 /* Descriptor Fetch Indicator */ | ||
| 685 | #define DMA_RUN_P 3 /* DMA Running Indicator */ | ||
| 686 | |||
| 687 | /*DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP Masks */ | ||
| 688 | 641 | ||
| 689 | #define CTYPE 0x00000040 /* DMA Channel Type Indicator */ | 642 | #define CTYPE 0x00000040 /* DMA Channel Type Indicator */ |
| 690 | #define CTYPE_P 6 /* DMA Channel Type Indicator BIT POSITION */ | 643 | #define CTYPE_P 6 /* DMA Channel Type Indicator BIT POSITION */ |