diff options
author | Mike Frysinger <vapier.adi@gmail.com> | 2009-01-07 10:14:39 -0500 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2009-01-07 10:14:39 -0500 |
commit | 211daf9d7252288ad88ab6b97268a8d828e6b696 (patch) | |
tree | b86f5b2aae10a1c6d91e4d2d6ef82374cb42764a /arch/blackfin/mach-bf533 | |
parent | 3e706cfcce591e50163d6e979b7fc64d91ced6a0 (diff) |
Blackfin arch: rename MAX_BLACKFIN_DMA_CHANNEL to MAX_DMA_CHANNELS to match everyone else
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf533')
-rw-r--r-- | arch/blackfin/mach-bf533/dma.c | 2 | ||||
-rw-r--r-- | arch/blackfin/mach-bf533/include/mach/dma.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/blackfin/mach-bf533/dma.c b/arch/blackfin/mach-bf533/dma.c index 28655c1cb7dc..0a6eb8f24d98 100644 --- a/arch/blackfin/mach-bf533/dma.c +++ b/arch/blackfin/mach-bf533/dma.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #include <asm/blackfin.h> | 31 | #include <asm/blackfin.h> |
32 | #include <asm/dma.h> | 32 | #include <asm/dma.h> |
33 | 33 | ||
34 | struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { | 34 | struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = { |
35 | (struct dma_register *) DMA0_NEXT_DESC_PTR, | 35 | (struct dma_register *) DMA0_NEXT_DESC_PTR, |
36 | (struct dma_register *) DMA1_NEXT_DESC_PTR, | 36 | (struct dma_register *) DMA1_NEXT_DESC_PTR, |
37 | (struct dma_register *) DMA2_NEXT_DESC_PTR, | 37 | (struct dma_register *) DMA2_NEXT_DESC_PTR, |
diff --git a/arch/blackfin/mach-bf533/include/mach/dma.h b/arch/blackfin/mach-bf533/include/mach/dma.h index bd9d5e94307d..4ff787e3559d 100644 --- a/arch/blackfin/mach-bf533/include/mach/dma.h +++ b/arch/blackfin/mach-bf533/include/mach/dma.h | |||
@@ -36,7 +36,7 @@ | |||
36 | #ifndef _MACH_DMA_H_ | 36 | #ifndef _MACH_DMA_H_ |
37 | #define _MACH_DMA_H_ | 37 | #define _MACH_DMA_H_ |
38 | 38 | ||
39 | #define MAX_BLACKFIN_DMA_CHANNEL 12 | 39 | #define MAX_DMA_CHANNELS 12 |
40 | 40 | ||
41 | #define CH_PPI 0 | 41 | #define CH_PPI 0 |
42 | #define CH_SPORT0_RX 1 | 42 | #define CH_SPORT0_RX 1 |