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authorMike Frysinger <michael.frysinger@analog.com>2007-06-11 03:31:30 -0400
committerBryan Wu <bryan.wu@analog.com>2007-06-11 03:31:30 -0400
commit83a5c3e3218f138b1a99f787c76e380d6a6ecec9 (patch)
treed71fb83fb0406af38d4e3266cb2d54dabb1bb3eb /arch/blackfin/mach-bf533/head.S
parent16983de0cec7b93cc2568f96909d4ea7c118bd8a (diff)
Blackfin arch: unify differences between our diff head.S files -- no functional changes
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/mach-bf533/head.S')
-rw-r--r--arch/blackfin/mach-bf533/head.S17
1 files changed, 9 insertions, 8 deletions
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S
index 4db9e6240906..33d1f623fe4e 100644
--- a/arch/blackfin/mach-bf533/head.S
+++ b/arch/blackfin/mach-bf533/head.S
@@ -51,13 +51,14 @@ ENTRY(__start)
51ENTRY(__stext) 51ENTRY(__stext)
52 /* R0: argument of command line string, passed from uboot, save it */ 52 /* R0: argument of command line string, passed from uboot, save it */
53 R7 = R0; 53 R7 = R0;
54 /* Set the SYSCFG register */ 54 /* Set the SYSCFG register:
55 * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit)
56 */
55 R0 = 0x36; 57 R0 = 0x36;
56 /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
57 SYSCFG = R0; 58 SYSCFG = R0;
58 R0 = 0; 59 R0 = 0;
59 60
60 /*Clear Out All the data and pointer Registers*/ 61 /* Clear Out All the data and pointer Registers */
61 R1 = R0; 62 R1 = R0;
62 R2 = R0; 63 R2 = R0;
63 R3 = R0; 64 R3 = R0;
@@ -79,7 +80,7 @@ ENTRY(__stext)
79 L2 = r0; 80 L2 = r0;
80 L3 = r0; 81 L3 = r0;
81 82
82 /* Clear Out All the DAG Registers*/ 83 /* Clear Out All the DAG Registers */
83 B0 = r0; 84 B0 = r0;
84 B1 = r0; 85 B1 = r0;
85 B2 = r0; 86 B2 = r0;
@@ -303,7 +304,7 @@ ENTRY(_real_start)
303.L_clear_zero: 304.L_clear_zero:
304 W[p1++] = r0; 305 W[p1++] = r0;
305 306
306/* pass the uboot arguments to the global value command line */ 307 /* pass the uboot arguments to the global value command line */
307 R0 = R7; 308 R0 = R7;
308 call _cmdline_init; 309 call _cmdline_init;
309 310
@@ -322,7 +323,7 @@ ENTRY(_real_start)
322 [p1] = r1; 323 [p1] = r1;
323 324
324 /* 325 /*
325 * load the current thread pointer and stack 326 * load the current thread pointer and stack
326 */ 327 */
327 r1.l = _init_thread_union; 328 r1.l = _init_thread_union;
328 r1.h = _init_thread_union; 329 r1.h = _init_thread_union;
@@ -439,8 +440,8 @@ ENTRY(_start_dma_code)
439 440
440 p0.h = hi(SIC_IWR); 441 p0.h = hi(SIC_IWR);
441 p0.l = lo(SIC_IWR); 442 p0.l = lo(SIC_IWR);
442 r0.l = lo(IWR_ENABLE_ALL) 443 r0.l = lo(IWR_ENABLE_ALL);
443 r0.h = hi(IWR_ENABLE_ALL) 444 r0.h = hi(IWR_ENABLE_ALL);
444 [p0] = r0; 445 [p0] = r0;
445 SSYNC; 446 SSYNC;
446 447