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authorRobin Getz <rgetz@blackfin.uclinux.org>2008-10-12 23:37:34 -0400
committerBryan Wu <cooloney@kernel.org>2008-10-12 23:37:34 -0400
commit71de1f8a6365ea65346881e526132563d93696d1 (patch)
treec15705934dbbece64b6c570123d38cce3c57091b /arch/blackfin/mach-bf527
parente9fae189caae7c1cf306e30f5b67c6d226ed69cf (diff)
Blackfin arch: make sure we include the fix for SPORT hysteresis when reprogramming clocks
As pointed out by Appalayagari Sreedhar, make sure we include the fix for SPORT hysteresis when reprogramming clocks. Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf527')
-rw-r--r--arch/blackfin/mach-bf527/head.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf527/head.S b/arch/blackfin/mach-bf527/head.S
index 28c486191209..6588170e3845 100644
--- a/arch/blackfin/mach-bf527/head.S
+++ b/arch/blackfin/mach-bf527/head.S
@@ -87,6 +87,9 @@ ENTRY(_start_dma_code)
87 r1 = PLL_BYPASS; /* Bypass the PLL? */ 87 r1 = PLL_BYPASS; /* Bypass the PLL? */
88 r1 = r1 << 8; /* Shift it over */ 88 r1 = r1 << 8; /* Shift it over */
89 r0 = r1 | r0; /* add them all together */ 89 r0 = r1 | r0; /* add them all together */
90#ifdef ANOMALY_05000265
91 r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
92#endif
90 93
91 p0.h = hi(PLL_CTL); 94 p0.h = hi(PLL_CTL);
92 p0.l = lo(PLL_CTL); /* Load the address */ 95 p0.l = lo(PLL_CTL); /* Load the address */