Blackfin arch: merge adeos blackfin part to arch/blackfin/

[Mike Frysinger <vapier.adi@gmail.com>:
 - handle bf531/bf532/bf534/bf536 variants in ipipe.h
 - cleanup IPIPE logic for bfin_set_irq_handler()
 - cleanup ipipe asm code a bit and add missing ENDPROC()
 - simplify IPIPE code in trap_c
 - unify some of the IPIPE code and fix style
 - simplify DO_IRQ_L1 handling with ipipe code
 - revert IRQ_SW_INT# addition from ipipe merge
 - remove duplicate get_{c,s}clk() prototypes
]

Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>

1 files changed, 8 insertions, 8 deletions

diff --git a/arch/blackfin/mach-bf527/ints-priority.c b/arch/blackfin/mach-bf527/ints-priority.c
index 8a2367403d2b..f8c8acd73e30 100644
--- a/arch/blackfin/mach-bf527/ints-priority.c
+++ b/arch/blackfin/mach-bf527/ints-priority.c
@@ -69,14 +69,14 @@ void __init program_IAR(void)
                         ((CONFIG_IRQ_MAC_TX - 7) << IRQ_MAC_TX_POS) |
                         ((CONFIG_IRQ_PORTH_INTB - 7) << IRQ_PORTH_INTB_POS));
 
-        bfin_write_SIC_IAR4(((CONFIG_IRQ_TMR0 - 7) << IRQ_TMR0_POS) |
-                        ((CONFIG_IRQ_TMR1 - 7) << IRQ_TMR1_POS) |
-                        ((CONFIG_IRQ_TMR2 - 7) << IRQ_TMR2_POS) |
-                        ((CONFIG_IRQ_TMR3 - 7) << IRQ_TMR3_POS) |
-                        ((CONFIG_IRQ_TMR4 - 7) << IRQ_TMR4_POS) |
-                        ((CONFIG_IRQ_TMR5 - 7) << IRQ_TMR5_POS) |
-                        ((CONFIG_IRQ_TMR6 - 7) << IRQ_TMR6_POS) |
-                        ((CONFIG_IRQ_TMR7 - 7) << IRQ_TMR7_POS));
+        bfin_write_SIC_IAR4(((CONFIG_IRQ_TIMER0 - 7) << IRQ_TIMER0_POS) |
+                        ((CONFIG_IRQ_TIMER1 - 7) << IRQ_TIMER1_POS) |
+                        ((CONFIG_IRQ_TIMER2 - 7) << IRQ_TIMER2_POS) |
+                        ((CONFIG_IRQ_TIMER3 - 7) << IRQ_TIMER3_POS) |
+                        ((CONFIG_IRQ_TIMER4 - 7) << IRQ_TIMER4_POS) |
+                        ((CONFIG_IRQ_TIMER5 - 7) << IRQ_TIMER5_POS) |
+                        ((CONFIG_IRQ_TIMER6 - 7) << IRQ_TIMER6_POS) |
+                        ((CONFIG_IRQ_TIMER7 - 7) << IRQ_TIMER7_POS));
 
         bfin_write_SIC_IAR5(((CONFIG_IRQ_PORTG_INTA - 7) << IRQ_PORTG_INTA_POS) |
                         ((CONFIG_IRQ_PORTG_INTB - 7) << IRQ_PORTG_INTB_POS) |