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authorBarry Song <barry.song@analog.com>2009-09-17 03:50:23 -0400
committerMike Frysinger <vapier@gentoo.org>2009-10-07 04:47:57 -0400
commit6206f709d9dfc6722d9213b36a7779ae56072899 (patch)
tree2fce4c696b805ec4e25b3329adca060dd8495a9e /arch/blackfin/mach-bf518
parent96f1050d3df105c9ae6c6ac224f370199ea82fcd (diff)
Blackfin: BF51x: add PTP MMR defines
Diffstat (limited to 'arch/blackfin/mach-bf518')
-rw-r--r--arch/blackfin/mach-bf518/include/mach/cdefBF518.h41
-rw-r--r--arch/blackfin/mach-bf518/include/mach/defBF518.h28
2 files changed, 69 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF518.h b/arch/blackfin/mach-bf518/include/mach/cdefBF518.h
index fd92f6e76a44..929b90650bd4 100644
--- a/arch/blackfin/mach-bf518/include/mach/cdefBF518.h
+++ b/arch/blackfin/mach-bf518/include/mach/cdefBF518.h
@@ -186,6 +186,47 @@
186#define bfin_read_EMAC_TXC_ABORT() bfin_read32(EMAC_TXC_ABORT) 186#define bfin_read_EMAC_TXC_ABORT() bfin_read32(EMAC_TXC_ABORT)
187#define bfin_write_EMAC_TXC_ABORT(val) bfin_write32(EMAC_TXC_ABORT, val) 187#define bfin_write_EMAC_TXC_ABORT(val) bfin_write32(EMAC_TXC_ABORT, val)
188 188
189#define bfin_read_EMAC_PTP_CTL() bfin_read16(EMAC_PTP_CTL)
190#define bfin_write_EMAC_PTP_CTL(val) bfin_write16(EMAC_PTP_CTL, val)
191#define bfin_read_EMAC_PTP_IE() bfin_read16(EMAC_PTP_IE)
192#define bfin_write_EMAC_PTP_IE(val) bfin_write16(EMAC_PTP_IE, val)
193#define bfin_read_EMAC_PTP_ISTAT() bfin_read16(EMAC_PTP_ISTAT)
194#define bfin_write_EMAC_PTP_ISTAT(val) bfin_write16(EMAC_PTP_ISTAT, val)
195#define bfin_read_EMAC_PTP_FOFF() bfin_read32(EMAC_PTP_FOFF)
196#define bfin_write_EMAC_PTP_FOFF(val) bfin_write32(EMAC_PTP_FOFF, val)
197#define bfin_read_EMAC_PTP_FV1() bfin_read32(EMAC_PTP_FV1)
198#define bfin_write_EMAC_PTP_FV1(val) bfin_write32(EMAC_PTP_FV1, val)
199#define bfin_read_EMAC_PTP_FV2() bfin_read32(EMAC_PTP_FV2)
200#define bfin_write_EMAC_PTP_FV2(val) bfin_write32(EMAC_PTP_FV2, val)
201#define bfin_read_EMAC_PTP_FV3() bfin_read32(EMAC_PTP_FV3)
202#define bfin_write_EMAC_PTP_FV3(val) bfin_write32(EMAC_PTP_FV3, val)
203#define bfin_read_EMAC_PTP_ADDEND() bfin_read32(EMAC_PTP_ADDEND)
204#define bfin_write_EMAC_PTP_ADDEND(val) bfin_write32(EMAC_PTP_ADDEND, val)
205#define bfin_read_EMAC_PTP_ACCR() bfin_read32(EMAC_PTP_ACCR)
206#define bfin_write_EMAC_PTP_ACCR(val) bfin_write32(EMAC_PTP_ACCR, val)
207#define bfin_read_EMAC_PTP_OFFSET() bfin_read32(EMAC_PTP_OFFSET)
208#define bfin_write_EMAC_PTP_OFFSET(val) bfin_write32(EMAC_PTP_OFFSET, val)
209#define bfin_read_EMAC_PTP_TIMELO() bfin_read32(EMAC_PTP_TIMELO)
210#define bfin_write_EMAC_PTP_TIMELO(val) bfin_write32(EMAC_PTP_TIMELO, val)
211#define bfin_read_EMAC_PTP_TIMEHI() bfin_read32(EMAC_PTP_TIMEHI)
212#define bfin_write_EMAC_PTP_TIMEHI(val) bfin_write32(EMAC_PTP_TIMEHI, val)
213#define bfin_read_EMAC_PTP_RXSNAPLO() bfin_read32(EMAC_PTP_RXSNAPLO)
214#define bfin_read_EMAC_PTP_RXSNAPHI() bfin_read32(EMAC_PTP_RXSNAPHI)
215#define bfin_read_EMAC_PTP_TXSNAPLO() bfin_read32(EMAC_PTP_TXSNAPLO)
216#define bfin_read_EMAC_PTP_TXSNAPHI() bfin_read32(EMAC_PTP_TXSNAPHI)
217#define bfin_read_EMAC_PTP_ALARMLO() bfin_read32(EMAC_PTP_ALARMLO)
218#define bfin_write_EMAC_PTP_ALARMLO(val) bfin_write32(EMAC_PTP_ALARMLO, val)
219#define bfin_read_EMAC_PTP_ALARMHI() bfin_read32(EMAC_PTP_ALARMHI)
220#define bfin_write_EMAC_PTP_ALARMHI(val) bfin_write32(EMAC_PTP_ALARMHI, val)
221#define bfin_read_EMAC_PTP_ID_OFF() bfin_read16(EMAC_PTP_ID_OFF)
222#define bfin_write_EMAC_PTP_ID_OFF(val) bfin_write16(EMAC_PTP_ID_OFF, val)
223#define bfin_read_EMAC_PTP_ID_SNAP() bfin_read32(EMAC_PTP_ID_SNAP)
224#define bfin_write_EMAC_PTP_ID_SNAP(val) bfin_write32(EMAC_PTP_ID_SNAP, val)
225#define bfin_read_EMAC_PTP_PPS_STARTHI() bfin_read32(EMAC_PTP_PPS_STARTHI)
226#define bfin_write_EMAC_PTP_PPS_STARTHI(val) bfin_write32(EMAC_PTP_PPS_STARTHI, val)
227#define bfin_read_EMAC_PTP_PPS_PERIOD() bfin_read32(EMAC_PTP_PPS_PERIOD)
228#define bfin_write_EMAC_PTP_PPS_PERIOD(val) bfin_write32(EMAC_PTP_PPS_PERIOD, val)
229
189/* Removable Storage Interface Registers */ 230/* Removable Storage Interface Registers */
190 231
191#define bfin_read_RSI_PWR_CTL() bfin_read16(RSI_PWR_CONTROL) 232#define bfin_read_RSI_PWR_CTL() bfin_read16(RSI_PWR_CONTROL)
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF518.h b/arch/blackfin/mach-bf518/include/mach/defBF518.h
index 16b7eeff6012..794cf06eb5ba 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF518.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF518.h
@@ -624,4 +624,32 @@
624 624
625#define RWR 0x1 /* Read Wait Request */ 625#define RWR 0x1 /* Read Wait Request */
626 626
627/* Bit masks for EMAC_PTP_CTL */
628
629#define PTP_EN 0x1 /* Enable the PTP_TSYNC module */
630#define TL 0x2 /* Timestamp lock control */
631#define ASEN 0x10 /* Auxiliary snapshot control */
632#define PPSEN 0x80 /* Pulse-per-second (PPS) control */
633#define CKOEN 0x2000 /* Clock output control */
634
635/* Bit masks for EMAC_PTP_IE */
636
637#define ALIE 0x1 /* Alarm interrupt enable */
638#define RXEIE 0x2 /* Receive event interrupt enable */
639#define RXGIE 0x4 /* Receive general interrupt enable */
640#define TXIE 0x8 /* Transmit interrupt enable */
641#define RXOVE 0x10 /* Receive overrun error interrupt enable */
642#define TXOVE 0x20 /* Transmit overrun error interrupt enable */
643#define ASIE 0x40 /* Auxiliary snapshot interrupt enable */
644
645/* Bit masks for EMAC_PTP_ISTAT */
646
647#define ALS 0x1 /* Alarm status */
648#define RXEL 0x2 /* Receive event interrupt status */
649#define RXGL 0x4 /* Receive general interrupt status */
650#define TXTL 0x8 /* Transmit snapshot status */
651#define RXOV 0x10 /* Receive snapshot overrun status */
652#define TXOV 0x20 /* Transmit snapshot overrun status */
653#define ASL 0x40 /* Auxiliary snapshot interrupt status */
654
627#endif /* _DEF_BF518_H */ 655#endif /* _DEF_BF518_H */