diff options
author | Sonic Zhang <sonic.zhang@analog.com> | 2009-02-04 03:49:45 -0500 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2009-02-04 03:49:45 -0500 |
commit | b52dae3139066765a7d96563e9cd33d9e60efe33 (patch) | |
tree | da26ba9d26fc0c89bd19261815cf7dfa09499152 /arch/blackfin/mach-bf518 | |
parent | 5b93e13ffa8b06ff80eaa8e0ae92e44ebf61cde9 (diff) |
Blackfin arch: Fix bug - Run "reboot" hangs bf518-ezbrd
[Mike Frysinger <vapier.adi@gmail.com>:
- setup P_DEFAULT_BOOT_SPI_CS for every arch based on
the default bootrom behavior and convert all our boards
to it
- revert previous anomaly change ... bf51x is not affected
by anomaly 05000353]
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf518')
-rw-r--r-- | arch/blackfin/mach-bf518/boards/ezbrd.c | 2 | ||||
-rw-r--r-- | arch/blackfin/mach-bf518/include/mach/portmux.h | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c index 15f1351c8645..ee003f47a824 100644 --- a/arch/blackfin/mach-bf518/boards/ezbrd.c +++ b/arch/blackfin/mach-bf518/boards/ezbrd.c | |||
@@ -649,7 +649,7 @@ void native_machine_restart(char *cmd) | |||
649 | { | 649 | { |
650 | /* workaround reboot hang when booting from SPI */ | 650 | /* workaround reboot hang when booting from SPI */ |
651 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | 651 | if ((bfin_read_SYSCR() & 0x7) == 0x3) |
652 | bfin_gpio_reset_spi0_ssel1(); | 652 | bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); |
653 | } | 653 | } |
654 | 654 | ||
655 | void bfin_get_ether_addr(char *addr) | 655 | void bfin_get_ether_addr(char *addr) |
diff --git a/arch/blackfin/mach-bf518/include/mach/portmux.h b/arch/blackfin/mach-bf518/include/mach/portmux.h index ac16d54734d4..f618b487b2b0 100644 --- a/arch/blackfin/mach-bf518/include/mach/portmux.h +++ b/arch/blackfin/mach-bf518/include/mach/portmux.h | |||
@@ -103,6 +103,8 @@ | |||
103 | #define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2)) | 103 | #define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2)) |
104 | #define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2)) | 104 | #define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2)) |
105 | 105 | ||
106 | #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2 | ||
107 | |||
106 | /* SPORT Port Mux */ | 108 | /* SPORT Port Mux */ |
107 | #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0)) | 109 | #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0)) |
108 | #define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0)) | 110 | #define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0)) |