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authorRussell King <rmk+kernel@arm.linux.org.uk>2009-09-19 08:47:57 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-09-19 08:47:57 -0400
commit40d743b8c16a8cf6e30c1d941aa6147f9550ea75 (patch)
tree9fcdf9a06b18a275253048d1ea7c9803cec38845 /arch/blackfin/mach-bf518
parent7da18afa423f167e7ef3c9728e584d8bf05bd55a (diff)
parent83e686ea0291ee93b87dcdc00b96443b80de56c9 (diff)
Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6
Diffstat (limited to 'arch/blackfin/mach-bf518')
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c29
-rw-r--r--arch/blackfin/mach-bf518/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf518/include/mach/blackfin.h10
3 files changed, 2 insertions, 38 deletions
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 809be268e42d..03e4a9941f01 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -199,15 +199,6 @@ static struct bfin5xx_spi_chip mmc_spi_chip_info = {
199}; 199};
200#endif 200#endif
201 201
202#if defined(CONFIG_PBX)
203static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
204 .ctl_reg = 0x4, /* send zero */
205 .enable_dma = 0,
206 .bits_per_word = 8,
207 .cs_change_per_word = 1,
208};
209#endif
210
211#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 202#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
212static struct bfin5xx_spi_chip spi_ad7877_chip_info = { 203static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
213 .enable_dma = 0, 204 .enable_dma = 0,
@@ -296,24 +287,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
296 .mode = SPI_MODE_3, 287 .mode = SPI_MODE_3,
297 }, 288 },
298#endif 289#endif
299#if defined(CONFIG_PBX)
300 {
301 .modalias = "fxs-spi",
302 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
303 .bus_num = 0,
304 .chip_select = 8 - CONFIG_J11_JUMPER,
305 .controller_data = &spi_si3xxx_chip_info,
306 .mode = SPI_MODE_3,
307 },
308 {
309 .modalias = "fxo-spi",
310 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
311 .bus_num = 0,
312 .chip_select = 8 - CONFIG_J19_JUMPER,
313 .controller_data = &spi_si3xxx_chip_info,
314 .mode = SPI_MODE_3,
315 },
316#endif
317#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 290#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
318 { 291 {
319 .modalias = "ad7877", 292 .modalias = "ad7877",
@@ -539,7 +512,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
539 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 512 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
540 }, 513 },
541#endif 514#endif
542#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE) 515#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
543 { 516 {
544 I2C_BOARD_INFO("pcf8574_keypad", 0x27), 517 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
545 .irq = IRQ_PF8, 518 .irq = IRQ_PF8,
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h
index 753ed810e1c6..e9c65390edd1 100644
--- a/arch/blackfin/mach-bf518/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h
@@ -124,6 +124,7 @@
124#define ANOMALY_05000386 (0) 124#define ANOMALY_05000386 (0)
125#define ANOMALY_05000389 (0) 125#define ANOMALY_05000389 (0)
126#define ANOMALY_05000400 (0) 126#define ANOMALY_05000400 (0)
127#define ANOMALY_05000402 (0)
127#define ANOMALY_05000412 (0) 128#define ANOMALY_05000412 (0)
128#define ANOMALY_05000432 (0) 129#define ANOMALY_05000432 (0)
129#define ANOMALY_05000447 (0) 130#define ANOMALY_05000447 (0)
diff --git a/arch/blackfin/mach-bf518/include/mach/blackfin.h b/arch/blackfin/mach-bf518/include/mach/blackfin.h
index e8e14c2769ed..83421d393148 100644
--- a/arch/blackfin/mach-bf518/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf518/include/mach/blackfin.h
@@ -68,11 +68,6 @@
68#endif 68#endif
69#endif 69#endif
70 70
71/* UART_IIR Register */
72#define STATUS(x) ((x << 1) & 0x06)
73#define STATUS_P1 0x02
74#define STATUS_P0 0x01
75
76#define BFIN_UART_NR_PORTS 2 71#define BFIN_UART_NR_PORTS 2
77 72
78#define OFFSET_THR 0x00 /* Transmit Holding register */ 73#define OFFSET_THR 0x00 /* Transmit Holding register */
@@ -88,11 +83,6 @@
88#define OFFSET_SCR 0x1C /* SCR Scratch Register */ 83#define OFFSET_SCR 0x1C /* SCR Scratch Register */
89#define OFFSET_GCTL 0x24 /* Global Control Register */ 84#define OFFSET_GCTL 0x24 /* Global Control Register */
90 85
91/* DPMC*/
92#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
93#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
94#define STOPCK_OFF STOPCK
95
96/* PLL_DIV Masks */ 86/* PLL_DIV Masks */
97#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */ 87#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
98#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */ 88#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */