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authorMichael Hennerich <michael.hennerich@analog.com>2010-07-05 09:39:16 -0400
committerMike Frysinger <vapier@gentoo.org>2010-08-06 12:55:52 -0400
commit7a4a207e74d6aeb63a38e9a3f0cfc40223d5c40e (patch)
tree21d440f3cf0e3dd2be9daedd345778073d78c2d0 /arch/blackfin/mach-bf518
parent812ae98f0849fbceb32c6d21bcdda42b40264c82 (diff)
Blackfin: BF51x/BF52x: support GPIO Hysteresis/Schmitt Trigger options
Newer parts have optional Hysteresis/Schmitt Trigger options to help with dirty signals. So add some kconfig options for tuning this and enable it by default for people. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf518')
-rw-r--r--arch/blackfin/mach-bf518/Kconfig61
-rw-r--r--arch/blackfin/mach-bf518/include/mach/bf518.h105
2 files changed, 166 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf518/Kconfig b/arch/blackfin/mach-bf518/Kconfig
index 4ab2d166c832..1d9f631a7f94 100644
--- a/arch/blackfin/mach-bf518/Kconfig
+++ b/arch/blackfin/mach-bf518/Kconfig
@@ -62,6 +62,67 @@ config BF518_UART1_PORTG
62 PORT G 62 PORT G
63endchoice 63endchoice
64 64
65comment "Hysteresis/Schmitt Trigger Control"
66config BFIN_HYSTERESIS_CONTROL
67 bool "Enable Hysteresis Control"
68 help
69 The ADSP-BF51x allows to control input hysteresis for Port F,
70 Port G and Port H and other processor signal inputs.
71 The Schmitt trigger enables can be set only for pin groups.
72 Saying Y will overwrite the default reset or boot loader
73 initialization.
74
75menu "PORT F"
76 depends on BFIN_HYSTERESIS_CONTROL
77config GPIO_HYST_PORTF_0_7
78 bool "Enable Hysteresis on PORTF {0...7}"
79config GPIO_HYST_PORTF_8_9
80 bool "Enable Hysteresis on PORTF {8, 9}"
81config GPIO_HYST_PORTF_10
82 bool "Enable Hysteresis on PORTF 10"
83config GPIO_HYST_PORTF_11
84 bool "Enable Hysteresis on PORTF 11"
85config GPIO_HYST_PORTF_12_13
86 bool "Enable Hysteresis on PORTF {12, 13}"
87config GPIO_HYST_PORTF_14_15
88 bool "Enable Hysteresis on PORTF {14, 15}"
89endmenu
90
91menu "PORT G"
92 depends on BFIN_HYSTERESIS_CONTROL
93config GPIO_HYST_PORTG_0
94 bool "Enable Hysteresis on PORTG 0"
95config GPIO_HYST_PORTG_1_4
96 bool "Enable Hysteresis on PORTG {1...4}"
97config GPIO_HYST_PORTG_5_6
98 bool "Enable Hysteresis on PORTG {5, 6}"
99config GPIO_HYST_PORTG_7_8
100 bool "Enable Hysteresis on PORTG {7, 8}"
101config GPIO_HYST_PORTG_9
102 bool "Enable Hysteresis on PORTG 9"
103config GPIO_HYST_PORTG_10
104 bool "Enable Hysteresis on PORTG 10"
105config GPIO_HYST_PORTG_11_13
106 bool "Enable Hysteresis on PORTG {11...13}"
107config GPIO_HYST_PORTG_14_15
108 bool "Enable Hysteresis on PORTG {14, 15}"
109endmenu
110
111menu "PORT H"
112 depends on BFIN_HYSTERESIS_CONTROL
113config GPIO_HYST_PORTH_0_7
114 bool "Enable Hysteresis on PORTH {0...7}"
115
116endmenu
117
118menu "None-GPIO"
119 depends on BFIN_HYSTERESIS_CONTROL
120config NONEGPIO_HYST_NMI_RST_BMODE
121 bool "Enable Hysteresis on {NMI, RESET, BMODE}"
122config NONEGPIO_HYST_JTAG
123 bool "Enable Hysteresis on JTAG"
124endmenu
125
65comment "Interrupt Priority Assignment" 126comment "Interrupt Priority Assignment"
66menu "Priority" 127menu "Priority"
67 128
diff --git a/arch/blackfin/mach-bf518/include/mach/bf518.h b/arch/blackfin/mach-bf518/include/mach/bf518.h
index 856b330ecf0b..6906dee4f4cc 100644
--- a/arch/blackfin/mach-bf518/include/mach/bf518.h
+++ b/arch/blackfin/mach-bf518/include/mach/bf518.h
@@ -85,6 +85,111 @@
85 85
86#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO) 86#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO)
87 87
88/**************************** Hysteresis Settings ****************************/
89
90#ifdef CONFIG_BFIN_HYSTERESIS_CONTROL
91#ifdef CONFIG_GPIO_HYST_PORTF_0_7
92#define HYST_PORTF_0_7 (1 << 0)
93#else
94#define HYST_PORTF_0_7 (0 << 0)
95#endif
96#ifdef CONFIG_GPIO_HYST_PORTF_8_9
97#define HYST_PORTF_8_9 (1 << 2)
98#else
99#define HYST_PORTF_8_9 (0 << 2)
100#endif
101#ifdef CONFIG_GPIO_HYST_PORTF_10
102#define HYST_PORTF_10 (1 << 4)
103#else
104#define HYST_PORTF_10 (0 << 4)
105#endif
106#ifdef CONFIG_GPIO_HYST_PORTF_11
107#define HYST_PORTF_11 (1 << 6)
108#else
109#define HYST_PORTF_11 (0 << 6)
110#endif
111#ifdef CONFIG_GPIO_HYST_PORTF_12_13
112#define HYST_PORTF_12_13 (1 << 8)
113#else
114#define HYST_PORTF_12_13 (0 << 8)
115#endif
116#ifdef CONFIG_GPIO_HYST_PORTF_14_15
117#define HYST_PORTF_14_15 (1 << 10)
118#else
119#define HYST_PORTF_14_15 (0 << 10)
120#endif
121
122#define HYST_PORTF_0_15 (HYST_PORTF_0_7 | HYST_PORTF_8_9 | HYST_PORTF_10 | \
123 HYST_PORTF_11 | HYST_PORTF_12_13 | HYST_PORTF_14_15)
124
125#ifdef CONFIG_GPIO_HYST_PORTG_0
126#define HYST_PORTG_0 (1 << 0)
127#else
128#define HYST_PORTG_0 (0 << 0)
129#endif
130#ifdef CONFIG_GPIO_HYST_PORTG_1_4
131#define HYST_PORTG_1_4 (1 << 2)
132#else
133#define HYST_PORTG_1_4 (0 << 2)
134#endif
135#ifdef CONFIG_GPIO_HYST_PORTG_5_6
136#define HYST_PORTG_5_6 (1 << 4)
137#else
138#define HYST_PORTG_5_6 (0 << 4)
139#endif
140#ifdef CONFIG_GPIO_HYST_PORTG_7_8
141#define HYST_PORTG_7_8 (1 << 6)
142#else
143#define HYST_PORTG_7_8 (0 << 6)
144#endif
145#ifdef CONFIG_GPIO_HYST_PORTG_9
146#define HYST_PORTG_9 (1 << 8)
147#else
148#define HYST_PORTG_9 (0 << 8)
149#endif
150#ifdef CONFIG_GPIO_HYST_PORTG_10
151#define HYST_PORTG_10 (1 << 10)
152#else
153#define HYST_PORTG_10 (0 << 10)
154#endif
155#ifdef CONFIG_GPIO_HYST_PORTG_11_13
156#define HYST_PORTG_11_13 (1 << 12)
157#else
158#define HYST_PORTG_11_13 (0 << 12)
159#endif
160#ifdef CONFIG_GPIO_HYST_PORTG_14_15
161#define HYST_PORTG_14_15 (1 << 14)
162#else
163#define HYST_PORTG_14_15 (0 << 14)
164#endif
165
166#define HYST_PORTG_0_15 (HYST_PORTG_0 | HYST_PORTG_1_4 | HYST_PORTG_5_6 | \
167 HYST_PORTG_7_8 | HYST_PORTG_9 | HYST_PORTG_10 | \
168 HYST_PORTG_11_13 | HYST_PORTG_14_15)
169
170#ifdef CONFIG_GPIO_HYST_PORTH_0_7
171#define HYST_PORTH_0_7 (1 << 0)
172#else
173#define HYST_PORTH_0_7 (0 << 0)
174#endif
175
176#define HYST_PORTH_0_15 (HYST_PORTH_0_7)
177
178#ifdef CONFIG_NONEGPIO_HYST_NMI_RST_BMODE
179#define HYST_NMI_RST_BMODE (1 << 2)
180#else
181#define HYST_NMI_RST_BMODE (0 << 2)
182#endif
183#ifdef CONFIG_NONEGPIO_HYST_JTAG
184#define HYST_JTAG (1 << 4)
185#else
186#define HYST_JTAG (0 << 4)
187#endif
188
189#define HYST_NONEGPIO (HYST_NMI_RST_BMODE | HYST_JTAG)
190#define HYST_NONEGPIO_MASK (0x3C)
191#endif /* CONFIG_BFIN_HYSTERESIS_CONTROL */
192
88#ifdef CONFIG_BF518 193#ifdef CONFIG_BF518
89#define CPU "BF518" 194#define CPU "BF518"
90#define CPUID 0x27e8 195#define CPUID 0x27e8