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authorMike Frysinger <vapier@gentoo.org>2011-05-26 04:03:10 -0400
committerMike Frysinger <vapier@gentoo.org>2011-07-23 01:10:41 -0400
commit2f7d63f909900c555baf36a4c6a11e9bf8e1af18 (patch)
tree1c15e1a2f04300366cdd1d6e056e1a5f18fd55fc /arch/blackfin/mach-bf518/boards
parent9be8631b8a7d11fa6d206fcf0a7a2005ed39f41b (diff)
Blackfin: boards: clean up redundant/dead spi resources
The default for the Blackfin SPI driver is 8 bits and dma disabled, so many of the bfin5xx_spi_chip resources are redundant. So punt those parts. Further, drivers should themselves be declaring 16 bit transfers, so for those that do, and for the ones which no longer do 16 bit transfers, drop the bfin5xx_spi_chip resources. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf518/boards')
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c59
-rw-r--r--arch/blackfin/mach-bf518/boards/tcm-bf518.c47
2 files changed, 0 insertions, 106 deletions
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index c0ccadcfa44e..d78fc2cc7d16 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -187,43 +187,16 @@ static struct flash_platform_data bfin_spi_flash_data = {
187/* SPI flash chip (m25p64) */ 187/* SPI flash chip (m25p64) */
188static struct bfin5xx_spi_chip spi_flash_chip_info = { 188static struct bfin5xx_spi_chip spi_flash_chip_info = {
189 .enable_dma = 0, /* use dma transfer with this chip*/ 189 .enable_dma = 0, /* use dma transfer with this chip*/
190 .bits_per_word = 8,
191}; 190};
192#endif 191#endif
193 192
194#if defined(CONFIG_BFIN_SPI_ADC) \
195 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
196/* SPI ADC chip */
197static struct bfin5xx_spi_chip spi_adc_chip_info = {
198 .enable_dma = 1, /* use dma transfer with this chip*/
199 .bits_per_word = 16,
200};
201#endif
202
203#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
204#if defined(CONFIG_NET_DSA_KSZ8893M) \
205 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
206/* SPI SWITCH CHIP */
207static struct bfin5xx_spi_chip spi_switch_info = {
208 .enable_dma = 0,
209 .bits_per_word = 8,
210};
211#endif
212#endif
213
214#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 193#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
215static struct bfin5xx_spi_chip mmc_spi_chip_info = { 194static struct bfin5xx_spi_chip mmc_spi_chip_info = {
216 .enable_dma = 0, 195 .enable_dma = 0,
217 .bits_per_word = 8,
218}; 196};
219#endif 197#endif
220 198
221#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 199#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
222static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
223 .enable_dma = 0,
224 .bits_per_word = 16,
225};
226
227static const struct ad7877_platform_data bfin_ad7877_ts_info = { 200static const struct ad7877_platform_data bfin_ad7877_ts_info = {
228 .model = 7877, 201 .model = 7877,
229 .vref_delay_usecs = 50, /* internal, no capacitor */ 202 .vref_delay_usecs = 50, /* internal, no capacitor */
@@ -239,21 +212,6 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = {
239}; 212};
240#endif 213#endif
241 214
242#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
243 && defined(CONFIG_SND_SOC_WM8731_SPI)
244static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
245 .enable_dma = 0,
246 .bits_per_word = 16,
247};
248#endif
249
250#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
251static struct bfin5xx_spi_chip spidev_chip_info = {
252 .enable_dma = 0,
253 .bits_per_word = 8,
254};
255#endif
256
257static struct spi_board_info bfin_spi_board_info[] __initdata = { 215static struct spi_board_info bfin_spi_board_info[] __initdata = {
258#if defined(CONFIG_MTD_M25P80) \ 216#if defined(CONFIG_MTD_M25P80) \
259 || defined(CONFIG_MTD_M25P80_MODULE) 217 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -269,18 +227,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
269 }, 227 },
270#endif 228#endif
271 229
272#if defined(CONFIG_BFIN_SPI_ADC) \
273 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
274 {
275 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
276 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
277 .bus_num = 0, /* Framework bus number */
278 .chip_select = 1, /* Framework chip select. */
279 .platform_data = NULL, /* No spi_driver specific config */
280 .controller_data = &spi_adc_chip_info,
281 },
282#endif
283
284#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 230#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
285#if defined(CONFIG_NET_DSA_KSZ8893M) \ 231#if defined(CONFIG_NET_DSA_KSZ8893M) \
286 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) 232 || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
@@ -290,7 +236,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
290 .bus_num = 0, 236 .bus_num = 0,
291 .chip_select = 1, 237 .chip_select = 1,
292 .platform_data = NULL, 238 .platform_data = NULL,
293 .controller_data = &spi_switch_info,
294 .mode = SPI_MODE_3, 239 .mode = SPI_MODE_3,
295 }, 240 },
296#endif 241#endif
@@ -314,7 +259,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
314 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 259 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
315 .bus_num = 0, 260 .bus_num = 0,
316 .chip_select = 2, 261 .chip_select = 2,
317 .controller_data = &spi_ad7877_chip_info,
318 }, 262 },
319#endif 263#endif
320#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ 264#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
@@ -324,7 +268,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
324 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 268 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
325 .bus_num = 0, 269 .bus_num = 0,
326 .chip_select = 5, 270 .chip_select = 5,
327 .controller_data = &spi_wm8731_chip_info,
328 .mode = SPI_MODE_0, 271 .mode = SPI_MODE_0,
329 }, 272 },
330#endif 273#endif
@@ -334,7 +277,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
334 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 277 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
335 .bus_num = 0, 278 .bus_num = 0,
336 .chip_select = 1, 279 .chip_select = 1,
337 .controller_data = &spidev_chip_info,
338 }, 280 },
339#endif 281#endif
340#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 282#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
@@ -343,7 +285,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
343 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 285 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
344 .bus_num = 0, 286 .bus_num = 0,
345 .chip_select = 1, 287 .chip_select = 1,
346 .controller_data = &lq035q1_spi_chip_info,
347 .mode = SPI_CPHA | SPI_CPOL, 288 .mode = SPI_CPHA | SPI_CPOL,
348 }, 289 },
349#endif 290#endif
diff --git a/arch/blackfin/mach-bf518/boards/tcm-bf518.c b/arch/blackfin/mach-bf518/boards/tcm-bf518.c
index 50fc5c89e379..55c127908815 100644
--- a/arch/blackfin/mach-bf518/boards/tcm-bf518.c
+++ b/arch/blackfin/mach-bf518/boards/tcm-bf518.c
@@ -138,32 +138,16 @@ static struct flash_platform_data bfin_spi_flash_data = {
138/* SPI flash chip (m25p64) */ 138/* SPI flash chip (m25p64) */
139static struct bfin5xx_spi_chip spi_flash_chip_info = { 139static struct bfin5xx_spi_chip spi_flash_chip_info = {
140 .enable_dma = 0, /* use dma transfer with this chip*/ 140 .enable_dma = 0, /* use dma transfer with this chip*/
141 .bits_per_word = 8,
142};
143#endif
144
145#if defined(CONFIG_BFIN_SPI_ADC) \
146 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
147/* SPI ADC chip */
148static struct bfin5xx_spi_chip spi_adc_chip_info = {
149 .enable_dma = 1, /* use dma transfer with this chip*/
150 .bits_per_word = 16,
151}; 141};
152#endif 142#endif
153 143
154#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 144#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
155static struct bfin5xx_spi_chip mmc_spi_chip_info = { 145static struct bfin5xx_spi_chip mmc_spi_chip_info = {
156 .enable_dma = 0, 146 .enable_dma = 0,
157 .bits_per_word = 8,
158}; 147};
159#endif 148#endif
160 149
161#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 150#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
162static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
163 .enable_dma = 0,
164 .bits_per_word = 16,
165};
166
167static const struct ad7877_platform_data bfin_ad7877_ts_info = { 151static const struct ad7877_platform_data bfin_ad7877_ts_info = {
168 .model = 7877, 152 .model = 7877,
169 .vref_delay_usecs = 50, /* internal, no capacitor */ 153 .vref_delay_usecs = 50, /* internal, no capacitor */
@@ -179,21 +163,6 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = {
179}; 163};
180#endif 164#endif
181 165
182#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
183 && defined(CONFIG_SND_SOC_WM8731_SPI)
184static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
185 .enable_dma = 0,
186 .bits_per_word = 16,
187};
188#endif
189
190#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
191static struct bfin5xx_spi_chip spidev_chip_info = {
192 .enable_dma = 0,
193 .bits_per_word = 8,
194};
195#endif
196
197static struct spi_board_info bfin_spi_board_info[] __initdata = { 166static struct spi_board_info bfin_spi_board_info[] __initdata = {
198#if defined(CONFIG_MTD_M25P80) \ 167#if defined(CONFIG_MTD_M25P80) \
199 || defined(CONFIG_MTD_M25P80_MODULE) 168 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -209,18 +178,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
209 }, 178 },
210#endif 179#endif
211 180
212#if defined(CONFIG_BFIN_SPI_ADC) \
213 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
214 {
215 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
216 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
217 .bus_num = 0, /* Framework bus number */
218 .chip_select = 1, /* Framework chip select. */
219 .platform_data = NULL, /* No spi_driver specific config */
220 .controller_data = &spi_adc_chip_info,
221 },
222#endif
223
224#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 181#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
225 { 182 {
226 .modalias = "mmc_spi", 183 .modalias = "mmc_spi",
@@ -239,7 +196,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
239 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 196 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
240 .bus_num = 0, 197 .bus_num = 0,
241 .chip_select = 2, 198 .chip_select = 2,
242 .controller_data = &spi_ad7877_chip_info,
243 }, 199 },
244#endif 200#endif
245#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ 201#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
@@ -249,7 +205,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
249 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 205 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
250 .bus_num = 0, 206 .bus_num = 0,
251 .chip_select = 5, 207 .chip_select = 5,
252 .controller_data = &spi_wm8731_chip_info,
253 .mode = SPI_MODE_0, 208 .mode = SPI_MODE_0,
254 }, 209 },
255#endif 210#endif
@@ -259,7 +214,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
259 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 214 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
260 .bus_num = 0, 215 .bus_num = 0,
261 .chip_select = 1, 216 .chip_select = 1,
262 .controller_data = &spidev_chip_info,
263 }, 217 },
264#endif 218#endif
265#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 219#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
@@ -268,7 +222,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
268 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 222 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
269 .bus_num = 0, 223 .bus_num = 0,
270 .chip_select = 1, 224 .chip_select = 1,
271 .controller_data = &lq035q1_spi_chip_info,
272 .mode = SPI_CPHA | SPI_CPOL, 225 .mode = SPI_CPHA | SPI_CPOL,
273 }, 226 },
274#endif 227#endif