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authorMike Frysinger <michael.frysinger@analog.com>2007-06-11 03:31:30 -0400
committerBryan Wu <bryan.wu@analog.com>2007-06-11 03:31:30 -0400
commit51be24c351bc9ee4937121100adb098eeb1effdd (patch)
treeb766c400cab7c51bfc7672cfbc3402bc83be5fb3 /arch/blackfin/lib/outs.S
parent52a078120c33b06a9abb721357adaafc3b55b7c1 (diff)
Blackfin arch: add proper ENDPROC()
add proper ENDPROC() to close out assembly functions so size/type is set properly in the final ELF image Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/lib/outs.S')
-rw-r--r--arch/blackfin/lib/outs.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S
index f8c876fe8930..4c3da8ae094e 100644
--- a/arch/blackfin/lib/outs.S
+++ b/arch/blackfin/lib/outs.S
@@ -40,6 +40,7 @@ ENTRY(_outsl)
40.Llong_loop_s: R0 = [P1++]; 40.Llong_loop_s: R0 = [P1++];
41.Llong_loop_e: [P0] = R0; 41.Llong_loop_e: [P0] = R0;
42 RTS; 42 RTS;
43ENDPROC(_outsl)
43 44
44ENTRY(_outsw) 45ENTRY(_outsw)
45 P0 = R0; /* P0 = port */ 46 P0 = R0; /* P0 = port */
@@ -50,6 +51,7 @@ ENTRY(_outsw)
50.Lword_loop_s: R0 = W[P1++]; 51.Lword_loop_s: R0 = W[P1++];
51.Lword_loop_e: W[P0] = R0; 52.Lword_loop_e: W[P0] = R0;
52 RTS; 53 RTS;
54ENDPROC(_outsw)
53 55
54ENTRY(_outsb) 56ENTRY(_outsb)
55 P0 = R0; /* P0 = port */ 57 P0 = R0; /* P0 = port */
@@ -60,3 +62,4 @@ ENTRY(_outsb)
60.Lbyte_loop_s: R0 = B[P1++]; 62.Lbyte_loop_s: R0 = B[P1++];
61.Lbyte_loop_e: B[P0] = R0; 63.Lbyte_loop_e: B[P0] = R0;
62 RTS; 64 RTS;
65ENDPROC(_outsb)