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authorSonic Zhang <sonic.zhang@analog.com>2007-06-29 04:35:17 -0400
committerBryan Wu <bryan.wu@analog.com>2007-06-29 04:35:17 -0400
commit474f1a667d4bd40b6dcacc6870b70f4d2ba4e155 (patch)
tree42814169b151897ae679c543d0bc11aecde80b86 /arch/blackfin/kernel
parent1c5d2265a82f8d3fa0471a60ca98072b3c53c299 (diff)
Blackfin arch: kgdb specific code
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/kernel')
-rw-r--r--arch/blackfin/kernel/Makefile1
-rw-r--r--arch/blackfin/kernel/kgdb.c421
2 files changed, 422 insertions, 0 deletions
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index b7b6de824011..6fac57f6ce06 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_BF561) += bfin_gpio.o
14obj-$(CONFIG_MODULES) += module.o 14obj-$(CONFIG_MODULES) += module.o
15obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o 15obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o
16obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o 16obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o
17obj-$(CONFIG_KGDB) += kgdb.o
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
new file mode 100644
index 000000000000..a9c15515bfd7
--- /dev/null
+++ b/arch/blackfin/kernel/kgdb.c
@@ -0,0 +1,421 @@
1/*
2 * File: arch/blackfin/kernel/kgdb.c
3 * Based on:
4 * Author: Sonic Zhang
5 *
6 * Created:
7 * Description:
8 *
9 * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
10 *
11 * Modified:
12 * Copyright 2005-2006 Analog Devices Inc.
13 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, see the file COPYING, or write
28 * to the Free Software Foundation, Inc.,
29 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 */
31
32#include <linux/string.h>
33#include <linux/kernel.h>
34#include <linux/sched.h>
35#include <linux/smp.h>
36#include <linux/spinlock.h>
37#include <linux/delay.h>
38#include <linux/ptrace.h> /* for linux pt_regs struct */
39#include <linux/kgdb.h>
40#include <linux/console.h>
41#include <linux/init.h>
42#include <linux/debugger.h>
43#include <linux/errno.h>
44#include <linux/irq.h>
45#include <asm/system.h>
46#include <asm/traps.h>
47#include <asm/blackfin.h>
48
49/* Put the error code here just in case the user cares. */
50int gdb_bf533errcode;
51/* Likewise, the vector number here (since GDB only gets the signal
52 number through the usual means, and that's not very specific). */
53int gdb_bf533vector = -1;
54
55#if KGDB_MAX_NO_CPUS != 8
56#error change the definition of slavecpulocks
57#endif
58
59void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
60{
61 gdb_regs[BFIN_R0] = regs->r0;
62 gdb_regs[BFIN_R1] = regs->r1;
63 gdb_regs[BFIN_R2] = regs->r2;
64 gdb_regs[BFIN_R3] = regs->r3;
65 gdb_regs[BFIN_R4] = regs->r4;
66 gdb_regs[BFIN_R5] = regs->r5;
67 gdb_regs[BFIN_R6] = regs->r6;
68 gdb_regs[BFIN_R7] = regs->r7;
69 gdb_regs[BFIN_P0] = regs->p0;
70 gdb_regs[BFIN_P1] = regs->p1;
71 gdb_regs[BFIN_P2] = regs->p2;
72 gdb_regs[BFIN_P3] = regs->p3;
73 gdb_regs[BFIN_P4] = regs->p4;
74 gdb_regs[BFIN_P5] = regs->p5;
75 gdb_regs[BFIN_SP] = regs->reserved;
76 gdb_regs[BFIN_FP] = regs->fp;
77 gdb_regs[BFIN_I0] = regs->i0;
78 gdb_regs[BFIN_I1] = regs->i1;
79 gdb_regs[BFIN_I2] = regs->i2;
80 gdb_regs[BFIN_I3] = regs->i3;
81 gdb_regs[BFIN_M0] = regs->m0;
82 gdb_regs[BFIN_M1] = regs->m1;
83 gdb_regs[BFIN_M2] = regs->m2;
84 gdb_regs[BFIN_M3] = regs->m3;
85 gdb_regs[BFIN_B0] = regs->b0;
86 gdb_regs[BFIN_B1] = regs->b1;
87 gdb_regs[BFIN_B2] = regs->b2;
88 gdb_regs[BFIN_B3] = regs->b3;
89 gdb_regs[BFIN_L0] = regs->l0;
90 gdb_regs[BFIN_L1] = regs->l1;
91 gdb_regs[BFIN_L2] = regs->l2;
92 gdb_regs[BFIN_L3] = regs->l3;
93 gdb_regs[BFIN_A0_DOT_X] = regs->a0x;
94 gdb_regs[BFIN_A0_DOT_W] = regs->a0w;
95 gdb_regs[BFIN_A1_DOT_X] = regs->a1x;
96 gdb_regs[BFIN_A1_DOT_W] = regs->a1w;
97 gdb_regs[BFIN_ASTAT] = regs->astat;
98 gdb_regs[BFIN_RETS] = regs->rets;
99 gdb_regs[BFIN_LC0] = regs->lc0;
100 gdb_regs[BFIN_LT0] = regs->lt0;
101 gdb_regs[BFIN_LB0] = regs->lb0;
102 gdb_regs[BFIN_LC1] = regs->lc1;
103 gdb_regs[BFIN_LT1] = regs->lt1;
104 gdb_regs[BFIN_LB1] = regs->lb1;
105 gdb_regs[BFIN_CYCLES] = 0;
106 gdb_regs[BFIN_CYCLES2] = 0;
107 gdb_regs[BFIN_USP] = regs->usp;
108 gdb_regs[BFIN_SEQSTAT] = regs->seqstat;
109 gdb_regs[BFIN_SYSCFG] = regs->syscfg;
110 gdb_regs[BFIN_RETI] = regs->pc;
111 gdb_regs[BFIN_RETX] = regs->retx;
112 gdb_regs[BFIN_RETN] = regs->retn;
113 gdb_regs[BFIN_RETE] = regs->rete;
114 gdb_regs[BFIN_PC] = regs->pc;
115 gdb_regs[BFIN_CC] = 0;
116 gdb_regs[BFIN_EXTRA1] = 0;
117 gdb_regs[BFIN_EXTRA2] = 0;
118 gdb_regs[BFIN_EXTRA3] = 0;
119 gdb_regs[BFIN_IPEND] = regs->ipend;
120}
121
122/*
123 * Extracts ebp, esp and eip values understandable by gdb from the values
124 * saved by switch_to.
125 * thread.esp points to ebp. flags and ebp are pushed in switch_to hence esp
126 * prior to entering switch_to is 8 greater then the value that is saved.
127 * If switch_to changes, change following code appropriately.
128 */
129void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
130{
131 gdb_regs[BFIN_SP] = p->thread.ksp;
132 gdb_regs[BFIN_PC] = p->thread.pc;
133 gdb_regs[BFIN_SEQSTAT] = p->thread.seqstat;
134}
135
136void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs)
137{
138 regs->r0 = gdb_regs[BFIN_R0];
139 regs->r1 = gdb_regs[BFIN_R1];
140 regs->r2 = gdb_regs[BFIN_R2];
141 regs->r3 = gdb_regs[BFIN_R3];
142 regs->r4 = gdb_regs[BFIN_R4];
143 regs->r5 = gdb_regs[BFIN_R5];
144 regs->r6 = gdb_regs[BFIN_R6];
145 regs->r7 = gdb_regs[BFIN_R7];
146 regs->p0 = gdb_regs[BFIN_P0];
147 regs->p1 = gdb_regs[BFIN_P1];
148 regs->p2 = gdb_regs[BFIN_P2];
149 regs->p3 = gdb_regs[BFIN_P3];
150 regs->p4 = gdb_regs[BFIN_P4];
151 regs->p5 = gdb_regs[BFIN_P5];
152 regs->fp = gdb_regs[BFIN_FP];
153 regs->i0 = gdb_regs[BFIN_I0];
154 regs->i1 = gdb_regs[BFIN_I1];
155 regs->i2 = gdb_regs[BFIN_I2];
156 regs->i3 = gdb_regs[BFIN_I3];
157 regs->m0 = gdb_regs[BFIN_M0];
158 regs->m1 = gdb_regs[BFIN_M1];
159 regs->m2 = gdb_regs[BFIN_M2];
160 regs->m3 = gdb_regs[BFIN_M3];
161 regs->b0 = gdb_regs[BFIN_B0];
162 regs->b1 = gdb_regs[BFIN_B1];
163 regs->b2 = gdb_regs[BFIN_B2];
164 regs->b3 = gdb_regs[BFIN_B3];
165 regs->l0 = gdb_regs[BFIN_L0];
166 regs->l1 = gdb_regs[BFIN_L1];
167 regs->l2 = gdb_regs[BFIN_L2];
168 regs->l3 = gdb_regs[BFIN_L3];
169 regs->a0x = gdb_regs[BFIN_A0_DOT_X];
170 regs->a0w = gdb_regs[BFIN_A0_DOT_W];
171 regs->a1x = gdb_regs[BFIN_A1_DOT_X];
172 regs->a1w = gdb_regs[BFIN_A1_DOT_W];
173 regs->rets = gdb_regs[BFIN_RETS];
174 regs->lc0 = gdb_regs[BFIN_LC0];
175 regs->lt0 = gdb_regs[BFIN_LT0];
176 regs->lb0 = gdb_regs[BFIN_LB0];
177 regs->lc1 = gdb_regs[BFIN_LC1];
178 regs->lt1 = gdb_regs[BFIN_LT1];
179 regs->lb1 = gdb_regs[BFIN_LB1];
180 regs->usp = gdb_regs[BFIN_USP];
181 regs->syscfg = gdb_regs[BFIN_SYSCFG];
182 regs->retx = gdb_regs[BFIN_PC];
183 regs->retn = gdb_regs[BFIN_RETN];
184 regs->rete = gdb_regs[BFIN_RETE];
185 regs->pc = gdb_regs[BFIN_PC];
186
187#if 0 /* can't change these */
188 regs->astat = gdb_regs[BFIN_ASTAT];
189 regs->seqstat = gdb_regs[BFIN_SEQSTAT];
190 regs->ipend = gdb_regs[BFIN_IPEND];
191#endif
192}
193
194struct hw_breakpoint {
195 unsigned int occupied:1;
196 unsigned int skip:1;
197 unsigned int enabled:1;
198 unsigned int type:1;
199 unsigned int dataacc:2;
200 unsigned short count;
201 unsigned int addr;
202} breakinfo[HW_BREAKPOINT_NUM];
203
204int kgdb_arch_init(void)
205{
206 kgdb_remove_all_hw_break();
207 return 0;
208}
209
210int kgdb_set_hw_break(unsigned long addr)
211{
212 int breakno;
213 for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++)
214 if (!breakinfo[breakno].occupied) {
215 breakinfo[breakno].occupied = 1;
216 breakinfo[breakno].enabled = 1;
217 breakinfo[breakno].type = 1;
218 breakinfo[breakno].addr = addr;
219 return 0;
220 }
221
222 return -ENOSPC;
223}
224
225int kgdb_remove_hw_break(unsigned long addr)
226{
227 int breakno;
228 for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++)
229 if (breakinfo[breakno].addr == addr)
230 memset(&(breakinfo[breakno]), 0, sizeof(struct hw_breakpoint));
231
232 return 0;
233}
234
235void kgdb_remove_all_hw_break(void)
236{
237 memset(breakinfo, 0, sizeof(struct hw_breakpoint)*8);
238}
239
240/*
241void kgdb_show_info(void)
242{
243 printk(KERN_DEBUG "hwd: wpia0=0x%x, wpiacnt0=%d, wpiactl=0x%x, wpstat=0x%x\n",
244 bfin_read_WPIA0(), bfin_read_WPIACNT0(),
245 bfin_read_WPIACTL(), bfin_read_WPSTAT());
246}
247*/
248
249void kgdb_correct_hw_break(void)
250{
251 int breakno;
252 int correctit;
253 uint32_t wpdactl = bfin_read_WPDACTL();
254
255 correctit = 0;
256 for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) {
257 if (breakinfo[breakno].type == 1) {
258 switch (breakno) {
259 case 0:
260 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN0)) {
261 correctit = 1;
262 wpdactl &= ~(WPIREN01|EMUSW0);
263 wpdactl |= WPIAEN0|WPICNTEN0;
264 bfin_write_WPIA0(breakinfo[breakno].addr);
265 bfin_write_WPIACNT0(breakinfo[breakno].skip);
266 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN0)) {
267 correctit = 1;
268 wpdactl &= ~WPIAEN0;
269 }
270 break;
271
272 case 1:
273 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN1)) {
274 correctit = 1;
275 wpdactl &= ~(WPIREN01|EMUSW1);
276 wpdactl |= WPIAEN1|WPICNTEN1;
277 bfin_write_WPIA1(breakinfo[breakno].addr);
278 bfin_write_WPIACNT1(breakinfo[breakno].skip);
279 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN1)) {
280 correctit = 1;
281 wpdactl &= ~WPIAEN1;
282 }
283 break;
284
285 case 2:
286 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN2)) {
287 correctit = 1;
288 wpdactl &= ~(WPIREN23|EMUSW2);
289 wpdactl |= WPIAEN2|WPICNTEN2;
290 bfin_write_WPIA2(breakinfo[breakno].addr);
291 bfin_write_WPIACNT2(breakinfo[breakno].skip);
292 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN2)) {
293 correctit = 1;
294 wpdactl &= ~WPIAEN2;
295 }
296 break;
297
298 case 3:
299 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN3)) {
300 correctit = 1;
301 wpdactl &= ~(WPIREN23|EMUSW3);
302 wpdactl |= WPIAEN3|WPICNTEN3;
303 bfin_write_WPIA3(breakinfo[breakno].addr);
304 bfin_write_WPIACNT3(breakinfo[breakno].skip);
305 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN3)) {
306 correctit = 1;
307 wpdactl &= ~WPIAEN3;
308 }
309 break;
310 case 4:
311 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN4)) {
312 correctit = 1;
313 wpdactl &= ~(WPIREN45|EMUSW4);
314 wpdactl |= WPIAEN4|WPICNTEN4;
315 bfin_write_WPIA4(breakinfo[breakno].addr);
316 bfin_write_WPIACNT4(breakinfo[breakno].skip);
317 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN4)) {
318 correctit = 1;
319 wpdactl &= ~WPIAEN4;
320 }
321 break;
322 case 5:
323 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN5)) {
324 correctit = 1;
325 wpdactl &= ~(WPIREN45|EMUSW5);
326 wpdactl |= WPIAEN5|WPICNTEN5;
327 bfin_write_WPIA5(breakinfo[breakno].addr);
328 bfin_write_WPIACNT5(breakinfo[breakno].skip);
329 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN5)) {
330 correctit = 1;
331 wpdactl &= ~WPIAEN5;
332 }
333 break;
334 }
335 }
336 }
337 if (correctit) {
338 wpdactl &= ~WPAND;
339 wpdactl |= WPPWR;
340 /*printk("correct_hw_break: wpdactl=0x%x\n", wpdactl);*/
341 bfin_write_WPDACTL(wpdactl);
342 CSYNC();
343 /*kgdb_show_info();*/
344 }
345}
346
347void kgdb_disable_hw_debug(struct pt_regs *regs)
348{
349 /* Disable hardware debugging while we are in kgdb */
350 bfin_write_WPIACTL(bfin_read_WPIACTL() & ~0x1);
351 CSYNC();
352}
353
354void kgdb_post_master_code(struct pt_regs *regs, int eVector, int err_code)
355{
356 /* Master processor is completely in the debugger */
357 gdb_bf533vector = eVector;
358 gdb_bf533errcode = err_code;
359}
360
361int kgdb_arch_handle_exception(int exceptionVector, int signo,
362 int err_code, char *remcom_in_buffer,
363 char *remcom_out_buffer,
364 struct pt_regs *linux_regs)
365{
366 long addr;
367 long breakno;
368 char *ptr;
369 int newPC;
370 int wp_status;
371
372 switch (remcom_in_buffer[0]) {
373 case 'c':
374 case 's':
375 if (kgdb_contthread && kgdb_contthread != current) {
376 strcpy(remcom_out_buffer, "E00");
377 break;
378 }
379
380 kgdb_contthread = NULL;
381
382 /* try to read optional parameter, pc unchanged if no parm */
383 ptr = &remcom_in_buffer[1];
384 if (kgdb_hex2long(&ptr, &addr)) {
385 linux_regs->retx = addr;
386 }
387 newPC = linux_regs->retx;
388
389 /* clear the trace bit */
390 linux_regs->syscfg &= 0xfffffffe;
391
392 /* set the trace bit if we're stepping */
393 if (remcom_in_buffer[0] == 's') {
394 linux_regs->syscfg |= 0x1;
395 debugger_step = 1;
396 }
397
398 wp_status = bfin_read_WPSTAT();
399 CSYNC();
400
401 if (exceptionVector == VEC_WATCH) {
402 for (breakno = 0; breakno < 6; ++breakno) {
403 if (wp_status & (1 << breakno)) {
404 breakinfo->skip = 1;
405 break;
406 }
407 }
408 }
409 kgdb_correct_hw_break();
410
411 bfin_write_WPSTAT(0);
412
413 return 0;
414 } /* switch */
415 return -1; /* this means that we do not want to exit from the handler */
416}
417
418struct kgdb_arch arch_kgdb_ops = {
419 .gdb_bpt_instr = {0xa1},
420 .flags = KGDB_HW_BREAKPOINT,
421};