diff options
author | Robin Getz <robin.getz@analog.com> | 2007-10-10 11:55:26 -0400 |
---|---|---|
committer | Bryan Wu <bryan.wu@analog.com> | 2007-10-10 11:55:26 -0400 |
commit | 3bebca2d20796dd3dc62c5d3e74148087c7ce5bd (patch) | |
tree | fdb5eb8eb774fa5e8df41ebbf0e0d2c82b9ff627 /arch/blackfin/kernel | |
parent | a298049180d2c56fc8ac1796b24973bf4f019cc7 (diff) |
Blackfin arch: to do some consolidation of common code and common name spaces
now all BLKFIN should be BFIN, should be no functional changes.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/kernel')
-rw-r--r-- | arch/blackfin/kernel/cacheinit.c | 5 | ||||
-rw-r--r-- | arch/blackfin/kernel/cplbinit.c | 5 | ||||
-rw-r--r-- | arch/blackfin/kernel/process.c | 2 | ||||
-rw-r--r-- | arch/blackfin/kernel/setup.c | 29 |
4 files changed, 22 insertions, 19 deletions
diff --git a/arch/blackfin/kernel/cacheinit.c b/arch/blackfin/kernel/cacheinit.c index 4d41a40e8133..62cbba7364b0 100644 --- a/arch/blackfin/kernel/cacheinit.c +++ b/arch/blackfin/kernel/cacheinit.c | |||
@@ -21,9 +21,10 @@ | |||
21 | 21 | ||
22 | #include <asm/cacheflush.h> | 22 | #include <asm/cacheflush.h> |
23 | #include <asm/blackfin.h> | 23 | #include <asm/blackfin.h> |
24 | #include <asm/cplb.h> | ||
24 | #include <asm/cplbinit.h> | 25 | #include <asm/cplbinit.h> |
25 | 26 | ||
26 | #if defined(CONFIG_BLKFIN_CACHE) | 27 | #if defined(CONFIG_BFIN_ICACHE) |
27 | void bfin_icache_init(void) | 28 | void bfin_icache_init(void) |
28 | { | 29 | { |
29 | unsigned long *table = icplb_table; | 30 | unsigned long *table = icplb_table; |
@@ -44,7 +45,7 @@ void bfin_icache_init(void) | |||
44 | } | 45 | } |
45 | #endif | 46 | #endif |
46 | 47 | ||
47 | #if defined(CONFIG_BLKFIN_DCACHE) | 48 | #if defined(CONFIG_BFIN_DCACHE) |
48 | void bfin_dcache_init(void) | 49 | void bfin_dcache_init(void) |
49 | { | 50 | { |
50 | unsigned long *table = dcplb_table; | 51 | unsigned long *table = dcplb_table; |
diff --git a/arch/blackfin/kernel/cplbinit.c b/arch/blackfin/kernel/cplbinit.c index 3b1c87c9fd51..f2db6a5e2b5b 100644 --- a/arch/blackfin/kernel/cplbinit.c +++ b/arch/blackfin/kernel/cplbinit.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | 24 | ||
25 | #include <asm/blackfin.h> | 25 | #include <asm/blackfin.h> |
26 | #include <asm/cplb.h> | ||
26 | #include <asm/cplbinit.h> | 27 | #include <asm/cplbinit.h> |
27 | 28 | ||
28 | u_long icplb_table[MAX_CPLBS+1]; | 29 | u_long icplb_table[MAX_CPLBS+1]; |
@@ -56,7 +57,7 @@ struct s_cplb { | |||
56 | struct cplb_tab switch_d; | 57 | struct cplb_tab switch_d; |
57 | }; | 58 | }; |
58 | 59 | ||
59 | #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) | 60 | #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) |
60 | static struct cplb_desc cplb_data[] = { | 61 | static struct cplb_desc cplb_data[] = { |
61 | { | 62 | { |
62 | .start = 0, | 63 | .start = 0, |
@@ -230,7 +231,7 @@ static void __fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_en | |||
230 | cplb_data[i].psize, | 231 | cplb_data[i].psize, |
231 | cplb_data[i].i_conf); | 232 | cplb_data[i].i_conf); |
232 | } else { | 233 | } else { |
233 | #if defined(CONFIG_BLKFIN_CACHE) | 234 | #if defined(CONFIG_BFIN_ICACHE) |
234 | if (ANOMALY_05000263 && i == SDRAM_KERN) { | 235 | if (ANOMALY_05000263 && i == SDRAM_KERN) { |
235 | fill_cplbtab(t, | 236 | fill_cplbtab(t, |
236 | cplb_data[i].start, | 237 | cplb_data[i].start, |
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c index 6a7aefe48346..22e790419868 100644 --- a/arch/blackfin/kernel/process.c +++ b/arch/blackfin/kernel/process.c | |||
@@ -136,7 +136,7 @@ void cpu_idle(void) | |||
136 | 136 | ||
137 | void machine_restart(char *__unused) | 137 | void machine_restart(char *__unused) |
138 | { | 138 | { |
139 | #if defined(CONFIG_BLKFIN_CACHE) | 139 | #if defined(CONFIG_BFIN_ICACHE) |
140 | bfin_write_IMEM_CONTROL(0x01); | 140 | bfin_write_IMEM_CONTROL(0x01); |
141 | SSYNC(); | 141 | SSYNC(); |
142 | #endif | 142 | #endif |
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 02c15272f8ef..448e6aab73ac 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <linux/cramfs_fs.h> | 39 | #include <linux/cramfs_fs.h> |
40 | #include <linux/romfs_fs.h> | 40 | #include <linux/romfs_fs.h> |
41 | 41 | ||
42 | #include <asm/cplb.h> | ||
42 | #include <asm/cacheflush.h> | 43 | #include <asm/cacheflush.h> |
43 | #include <asm/blackfin.h> | 44 | #include <asm/blackfin.h> |
44 | #include <asm/cplbinit.h> | 45 | #include <asm/cplbinit.h> |
@@ -66,21 +67,21 @@ char __initdata command_line[COMMAND_LINE_SIZE]; | |||
66 | 67 | ||
67 | void __init bf53x_cache_init(void) | 68 | void __init bf53x_cache_init(void) |
68 | { | 69 | { |
69 | #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) | 70 | #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) |
70 | generate_cpl_tables(); | 71 | generate_cpl_tables(); |
71 | #endif | 72 | #endif |
72 | 73 | ||
73 | #ifdef CONFIG_BLKFIN_CACHE | 74 | #ifdef CONFIG_BFIN_ICACHE |
74 | bfin_icache_init(); | 75 | bfin_icache_init(); |
75 | printk(KERN_INFO "Instruction Cache Enabled\n"); | 76 | printk(KERN_INFO "Instruction Cache Enabled\n"); |
76 | #endif | 77 | #endif |
77 | 78 | ||
78 | #ifdef CONFIG_BLKFIN_DCACHE | 79 | #ifdef CONFIG_BFIN_DCACHE |
79 | bfin_dcache_init(); | 80 | bfin_dcache_init(); |
80 | printk(KERN_INFO "Data Cache Enabled" | 81 | printk(KERN_INFO "Data Cache Enabled" |
81 | # if defined CONFIG_BLKFIN_WB | 82 | # if defined CONFIG_BFIN_WB |
82 | " (write-back)" | 83 | " (write-back)" |
83 | # elif defined CONFIG_BLKFIN_WT | 84 | # elif defined CONFIG_BFIN_WT |
84 | " (write-through)" | 85 | " (write-through)" |
85 | # endif | 86 | # endif |
86 | "\n"); | 87 | "\n"); |
@@ -262,7 +263,7 @@ void __init setup_arch(char **cmdline_p) | |||
262 | && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) | 263 | && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) |
263 | mtd_size = | 264 | mtd_size = |
264 | PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2])); | 265 | PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2])); |
265 | # if (defined(CONFIG_BLKFIN_CACHE) && ANOMALY_05000263) | 266 | # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) |
266 | /* Due to a Hardware Anomaly we need to limit the size of usable | 267 | /* Due to a Hardware Anomaly we need to limit the size of usable |
267 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on | 268 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on |
268 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception | 269 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception |
@@ -291,7 +292,7 @@ void __init setup_arch(char **cmdline_p) | |||
291 | _ebss = memory_mtd_start; /* define _ebss for compatible */ | 292 | _ebss = memory_mtd_start; /* define _ebss for compatible */ |
292 | #endif /* CONFIG_MTD_UCLINUX */ | 293 | #endif /* CONFIG_MTD_UCLINUX */ |
293 | 294 | ||
294 | #if (defined(CONFIG_BLKFIN_CACHE) && ANOMALY_05000263) | 295 | #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) |
295 | /* Due to a Hardware Anomaly we need to limit the size of usable | 296 | /* Due to a Hardware Anomaly we need to limit the size of usable |
296 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on | 297 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on |
297 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception | 298 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception |
@@ -535,9 +536,9 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
535 | seq_printf(m, "I-CACHE:\tOFF\n"); | 536 | seq_printf(m, "I-CACHE:\tOFF\n"); |
536 | if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE)) | 537 | if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE)) |
537 | seq_printf(m, "D-CACHE:\tON" | 538 | seq_printf(m, "D-CACHE:\tON" |
538 | #if defined CONFIG_BLKFIN_WB | 539 | #if defined CONFIG_BFIN_WB |
539 | " (write-back)" | 540 | " (write-back)" |
540 | #elif defined CONFIG_BLKFIN_WT | 541 | #elif defined CONFIG_BFIN_WT |
541 | " (write-through)" | 542 | " (write-through)" |
542 | #endif | 543 | #endif |
543 | "\n"); | 544 | "\n"); |
@@ -566,15 +567,15 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
566 | } | 567 | } |
567 | 568 | ||
568 | 569 | ||
569 | seq_printf(m, "I-CACHE Size:\t%dKB\n", BLKFIN_ICACHESIZE / 1024); | 570 | seq_printf(m, "I-CACHE Size:\t%dKB\n", BFIN_ICACHESIZE / 1024); |
570 | seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size); | 571 | seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size); |
571 | seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n", | 572 | seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n", |
572 | BLKFIN_ISUBBANKS, BLKFIN_IWAYS, BLKFIN_ILINES); | 573 | BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES); |
573 | seq_printf(m, | 574 | seq_printf(m, |
574 | "D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n", | 575 | "D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n", |
575 | dsup_banks, BLKFIN_DSUBBANKS, BLKFIN_DWAYS, | 576 | dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS, |
576 | BLKFIN_DLINES); | 577 | BFIN_DLINES); |
577 | #ifdef CONFIG_BLKFIN_CACHE_LOCK | 578 | #ifdef CONFIG_BFIN_ICACHE_LOCK |
578 | switch (read_iloc()) { | 579 | switch (read_iloc()) { |
579 | case WAY0_L: | 580 | case WAY0_L: |
580 | seq_printf(m, "Way0 Locked-Down\n"); | 581 | seq_printf(m, "Way0 Locked-Down\n"); |