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authorSteven Miao <realmz6@gmail.com>2012-05-24 23:32:03 -0400
committerBob Liu <lliubbo@gmail.com>2012-07-24 01:39:48 -0400
commite70f466067ef980876d6a190426b3670bccee4a7 (patch)
tree4e41f5c571401b9ed26382bf8ce549b8c35d6ee6 /arch/blackfin/kernel
parenta75b3c06c1d400b2b5be25ea2453a5f6b77540ea (diff)
bfin-dma: only use MDMA3 on bf609
Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
Diffstat (limited to 'arch/blackfin/kernel')
-rw-r--r--arch/blackfin/kernel/bfin_dma.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/blackfin/kernel/bfin_dma.c b/arch/blackfin/kernel/bfin_dma.c
index c166939ffb2b..4a32f2dd5ddc 100644
--- a/arch/blackfin/kernel/bfin_dma.c
+++ b/arch/blackfin/kernel/bfin_dma.c
@@ -45,7 +45,7 @@ static int __init blackfin_dma_init(void)
45 atomic_set(&dma_ch[i].chan_status, 0); 45 atomic_set(&dma_ch[i].chan_status, 0);
46 dma_ch[i].regs = dma_io_base_addr[i]; 46 dma_ch[i].regs = dma_io_base_addr[i];
47 } 47 }
48#ifdef CH_MEM_STREAM3_SRC 48#if defined(CH_MEM_STREAM3_SRC) && defined(CONFIG_BF60x)
49 /* Mark MEMDMA Channel 3 as requested since we're using it internally */ 49 /* Mark MEMDMA Channel 3 as requested since we're using it internally */
50 request_dma(CH_MEM_STREAM3_DEST, "Blackfin dma_memcpy"); 50 request_dma(CH_MEM_STREAM3_DEST, "Blackfin dma_memcpy");
51 request_dma(CH_MEM_STREAM3_SRC, "Blackfin dma_memcpy"); 51 request_dma(CH_MEM_STREAM3_SRC, "Blackfin dma_memcpy");
@@ -361,7 +361,7 @@ void __init early_dma_memcpy_done(void)
361 __builtin_bfin_ssync(); 361 __builtin_bfin_ssync();
362} 362}
363 363
364#ifdef CH_MEM_STREAM3_SRC 364#if defined(CH_MEM_STREAM3_SRC) && defined(CONFIG_BF60x)
365#define bfin_read_MDMA_S_CONFIG bfin_read_MDMA_S3_CONFIG 365#define bfin_read_MDMA_S_CONFIG bfin_read_MDMA_S3_CONFIG
366#define bfin_write_MDMA_S_CONFIG bfin_write_MDMA_S3_CONFIG 366#define bfin_write_MDMA_S_CONFIG bfin_write_MDMA_S3_CONFIG
367#define bfin_write_MDMA_S_START_ADDR bfin_write_MDMA_S3_START_ADDR 367#define bfin_write_MDMA_S_START_ADDR bfin_write_MDMA_S3_START_ADDR