diff options
author | Aubrey Li <aubrey.li@analog.com> | 2007-06-14 01:28:47 -0400 |
---|---|---|
committer | Bryan Wu <bryan.wu@analog.com> | 2007-06-14 01:28:47 -0400 |
commit | 5af4c2b367c9c3dcc0cb02880df3a8581bb12a87 (patch) | |
tree | 8099e901d2eebf816cbbae4a0699a79931dae728 /arch/blackfin/kernel | |
parent | 51be24c351bc9ee4937121100adb098eeb1effdd (diff) |
Blackfin arch: try to split up functions like this into smaller units according to LKML review
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/kernel')
-rw-r--r-- | arch/blackfin/kernel/setup.c | 233 |
1 files changed, 121 insertions, 112 deletions
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index d9517e7c792b..0ba5f4a1786c 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c | |||
@@ -471,6 +471,67 @@ close_cplbtab(struct cplb_tab *table) | |||
471 | return 0; | 471 | return 0; |
472 | } | 472 | } |
473 | 473 | ||
474 | /* helper function */ | ||
475 | static void __fill_code_cplbtab(struct cplb_tab *t, int i, | ||
476 | u32 a_start, u32 a_end) | ||
477 | { | ||
478 | if (cplb_data[i].psize) { | ||
479 | fill_cplbtab(t, | ||
480 | cplb_data[i].start, | ||
481 | cplb_data[i].end, | ||
482 | cplb_data[i].psize, | ||
483 | cplb_data[i].i_conf); | ||
484 | } else { | ||
485 | #if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) | ||
486 | if (i == SDRAM_KERN) { | ||
487 | fill_cplbtab(t, | ||
488 | cplb_data[i].start, | ||
489 | cplb_data[i].end, | ||
490 | SIZE_4M, | ||
491 | cplb_data[i].i_conf); | ||
492 | } else { | ||
493 | #endif | ||
494 | fill_cplbtab(t, | ||
495 | cplb_data[i].start, | ||
496 | a_start, | ||
497 | SIZE_1M, | ||
498 | cplb_data[i].i_conf); | ||
499 | fill_cplbtab(t, | ||
500 | a_start, | ||
501 | a_end, | ||
502 | SIZE_4M, | ||
503 | cplb_data[i].i_conf); | ||
504 | fill_cplbtab(t, a_end, | ||
505 | cplb_data[i].end, | ||
506 | SIZE_1M, | ||
507 | cplb_data[i].i_conf); | ||
508 | } | ||
509 | } | ||
510 | } | ||
511 | |||
512 | static void __fill_data_cplbtab(struct cplb_tab *t, int i, | ||
513 | u32 a_start, u32 a_end) | ||
514 | { | ||
515 | if (cplb_data[i].psize) { | ||
516 | fill_cplbtab(t, | ||
517 | cplb_data[i].start, | ||
518 | cplb_data[i].end, | ||
519 | cplb_data[i].psize, | ||
520 | cplb_data[i].d_conf); | ||
521 | } else { | ||
522 | fill_cplbtab(t, | ||
523 | cplb_data[i].start, | ||
524 | a_start, SIZE_1M, | ||
525 | cplb_data[i].d_conf); | ||
526 | fill_cplbtab(t, a_start, | ||
527 | a_end, SIZE_4M, | ||
528 | cplb_data[i].d_conf); | ||
529 | fill_cplbtab(t, a_end, | ||
530 | cplb_data[i].end, | ||
531 | SIZE_1M, | ||
532 | cplb_data[i].d_conf); | ||
533 | } | ||
534 | } | ||
474 | static void __init generate_cpl_tables(void) | 535 | static void __init generate_cpl_tables(void) |
475 | { | 536 | { |
476 | 537 | ||
@@ -540,130 +601,78 @@ static void __init generate_cpl_tables(void) | |||
540 | cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL; | 601 | cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL; |
541 | 602 | ||
542 | for (i = ZERO_P; i <= L2_MEM; i++) { | 603 | for (i = ZERO_P; i <= L2_MEM; i++) { |
604 | if (!cplb_data[i].valid) | ||
605 | continue; | ||
543 | 606 | ||
544 | if (cplb_data[i].valid) { | 607 | as_1m = cplb_data[i].start % SIZE_1M; |
545 | 608 | ||
546 | as_1m = cplb_data[i].start % SIZE_1M; | 609 | /* |
610 | * We need to make sure all sections are properly 1M aligned | ||
611 | * However between Kernel Memory and the Kernel mtd section, | ||
612 | * depending on the rootfs size, there can be overlapping | ||
613 | * memory areas. | ||
614 | */ | ||
547 | 615 | ||
548 | /* We need to make sure all sections are properly 1M aligned | 616 | if (as_1m && i != L1I_MEM && i != L1D_MEM) { |
549 | * However between Kernel Memory and the Kernel mtd section, depending on the | ||
550 | * rootfs size, there can be overlapping memory areas. | ||
551 | */ | ||
552 | |||
553 | if (as_1m && i!=L1I_MEM && i!=L1D_MEM) { | ||
554 | #ifdef CONFIG_MTD_UCLINUX | 617 | #ifdef CONFIG_MTD_UCLINUX |
555 | if (i == SDRAM_RAM_MTD) { | 618 | if (i == SDRAM_RAM_MTD) { |
556 | if ((cplb_data[SDRAM_KERN].end + 1) > cplb_data[SDRAM_RAM_MTD].start) | 619 | if ((cplb_data[SDRAM_KERN].end + 1) > |
557 | cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)) + SIZE_1M; | 620 | cplb_data[SDRAM_RAM_MTD].start) |
558 | else | 621 | cplb_data[SDRAM_RAM_MTD].start = |
559 | cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)); | 622 | (cplb_data[i].start & |
560 | } else | 623 | (-2*SIZE_1M)) + SIZE_1M; |
624 | else | ||
625 | cplb_data[SDRAM_RAM_MTD].start = | ||
626 | (cplb_data[i].start & | ||
627 | (-2*SIZE_1M)); | ||
628 | } else | ||
561 | #endif | 629 | #endif |
562 | printk(KERN_WARNING "Unaligned Start of %s at 0x%X\n", | 630 | printk(KERN_WARNING |
563 | cplb_data[i].name, cplb_data[i].start); | 631 | "Unaligned Start of %s at 0x%X\n", |
564 | } | 632 | cplb_data[i].name, cplb_data[i].start); |
633 | } | ||
565 | 634 | ||
566 | as = cplb_data[i].start % SIZE_4M; | 635 | as = cplb_data[i].start % SIZE_4M; |
567 | ae = cplb_data[i].end % SIZE_4M; | 636 | ae = cplb_data[i].end % SIZE_4M; |
568 | |||
569 | if (as) | ||
570 | a_start = cplb_data[i].start + (SIZE_4M - (as)); | ||
571 | else | ||
572 | a_start = cplb_data[i].start; | ||
573 | |||
574 | a_end = cplb_data[i].end - ae; | ||
575 | |||
576 | for (j = INITIAL_T; j <= SWITCH_T; j++) { | ||
577 | |||
578 | switch (j) { | ||
579 | case INITIAL_T: | ||
580 | if (cplb_data[i].attr & INITIAL_T) { | ||
581 | t_i = &cplb.init_i; | ||
582 | t_d = &cplb.init_d; | ||
583 | process = 1; | ||
584 | } else | ||
585 | process = 0; | ||
586 | break; | ||
587 | case SWITCH_T: | ||
588 | if (cplb_data[i].attr & SWITCH_T) { | ||
589 | t_i = &cplb.switch_i; | ||
590 | t_d = &cplb.switch_d; | ||
591 | process = 1; | ||
592 | } else | ||
593 | process = 0; | ||
594 | break; | ||
595 | default: | ||
596 | process = 0; | ||
597 | break; | ||
598 | } | ||
599 | 637 | ||
600 | if (process) { | 638 | if (as) |
601 | if (cplb_data[i].attr & I_CPLB) { | 639 | a_start = cplb_data[i].start + (SIZE_4M - (as)); |
602 | 640 | else | |
603 | if (cplb_data[i].psize) { | 641 | a_start = cplb_data[i].start; |
604 | fill_cplbtab(t_i, | ||
605 | cplb_data[i].start, | ||
606 | cplb_data[i].end, | ||
607 | cplb_data[i].psize, | ||
608 | cplb_data[i].i_conf); | ||
609 | } else { | ||
610 | /*icplb_table */ | ||
611 | #if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) | ||
612 | if (i == SDRAM_KERN) { | ||
613 | fill_cplbtab(t_i, | ||
614 | cplb_data[i].start, | ||
615 | cplb_data[i].end, | ||
616 | SIZE_4M, | ||
617 | cplb_data[i].i_conf); | ||
618 | } else | ||
619 | #endif | ||
620 | { | ||
621 | fill_cplbtab(t_i, | ||
622 | cplb_data[i].start, | ||
623 | a_start, | ||
624 | SIZE_1M, | ||
625 | cplb_data[i].i_conf); | ||
626 | fill_cplbtab(t_i, | ||
627 | a_start, | ||
628 | a_end, | ||
629 | SIZE_4M, | ||
630 | cplb_data[i].i_conf); | ||
631 | fill_cplbtab(t_i, a_end, | ||
632 | cplb_data[i].end, | ||
633 | SIZE_1M, | ||
634 | cplb_data[i].i_conf); | ||
635 | } | ||
636 | } | ||
637 | 642 | ||
638 | } | 643 | a_end = cplb_data[i].end - ae; |
639 | if (cplb_data[i].attr & D_CPLB) { | ||
640 | |||
641 | if (cplb_data[i].psize) { | ||
642 | fill_cplbtab(t_d, | ||
643 | cplb_data[i].start, | ||
644 | cplb_data[i].end, | ||
645 | cplb_data[i].psize, | ||
646 | cplb_data[i].d_conf); | ||
647 | } else { | ||
648 | /*dcplb_table*/ | ||
649 | fill_cplbtab(t_d, | ||
650 | cplb_data[i].start, | ||
651 | a_start, SIZE_1M, | ||
652 | cplb_data[i].d_conf); | ||
653 | fill_cplbtab(t_d, a_start, | ||
654 | a_end, SIZE_4M, | ||
655 | cplb_data[i].d_conf); | ||
656 | fill_cplbtab(t_d, a_end, | ||
657 | cplb_data[i].end, | ||
658 | SIZE_1M, | ||
659 | cplb_data[i].d_conf); | ||
660 | 644 | ||
661 | } | 645 | for (j = INITIAL_T; j <= SWITCH_T; j++) { |
662 | 646 | ||
663 | } | 647 | switch (j) { |
664 | } | 648 | case INITIAL_T: |
649 | if (cplb_data[i].attr & INITIAL_T) { | ||
650 | t_i = &cplb.init_i; | ||
651 | t_d = &cplb.init_d; | ||
652 | process = 1; | ||
653 | } else | ||
654 | process = 0; | ||
655 | break; | ||
656 | case SWITCH_T: | ||
657 | if (cplb_data[i].attr & SWITCH_T) { | ||
658 | t_i = &cplb.switch_i; | ||
659 | t_d = &cplb.switch_d; | ||
660 | process = 1; | ||
661 | } else | ||
662 | process = 0; | ||
663 | break; | ||
664 | default: | ||
665 | process = 0; | ||
666 | break; | ||
665 | } | 667 | } |
666 | 668 | ||
669 | if (!process) | ||
670 | continue; | ||
671 | if (cplb_data[i].attr & I_CPLB) | ||
672 | __fill_code_cplbtab(t_i, i, a_start, a_end); | ||
673 | |||
674 | if (cplb_data[i].attr & D_CPLB) | ||
675 | __fill_data_cplbtab(t_d, i, a_start, a_end); | ||
667 | } | 676 | } |
668 | } | 677 | } |
669 | 678 | ||