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authorSonic Zhang <sonic.zhang@analog.com>2008-04-23 18:13:37 -0400
committerBryan Wu <cooloney@kernel.org>2008-04-23 18:13:37 -0400
commitb85b82d980526d683dc3b39f2ac1f447fa84a105 (patch)
tree116646f10fc37668b4136aa040136354442eeb54 /arch/blackfin/kernel
parent253bcf4f9b6dde1cfa169bc29655cf177d6a903b (diff)
[Blackfin] arch: fix bug - Section data_l1_cacheline_aligned should be defined in link script of kernel
http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3978 Section data_l1_cacheline_aligned should be defined in link script of kernel, when L1 data sram bank A is not available. In bf536 with all data cache is enabled, there is no L1 data sram. Current link script won't define section data_l1.cacheline_aligned in this case. But, if user select put cacheline_aligned data into l1 sram in kernel menuconfig, these data will be dropped and access to these data will trigger data CPLB exception. Do panic in l1 relocation code as well. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/kernel')
-rw-r--r--arch/blackfin/kernel/setup.c6
-rw-r--r--arch/blackfin/kernel/vmlinux.lds.S5
2 files changed, 8 insertions, 3 deletions
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index fafaccb321fa..c494495af40d 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -107,7 +107,7 @@ void __init bf53x_relocate_l1_mem(void)
107 107
108 l1_code_length = _etext_l1 - _stext_l1; 108 l1_code_length = _etext_l1 - _stext_l1;
109 if (l1_code_length > L1_CODE_LENGTH) 109 if (l1_code_length > L1_CODE_LENGTH)
110 l1_code_length = L1_CODE_LENGTH; 110 panic("L1 Instruction SRAM Overflow\n");
111 /* cannot complain as printk is not available as yet. 111 /* cannot complain as printk is not available as yet.
112 * But we can continue booting and complain later! 112 * But we can continue booting and complain later!
113 */ 113 */
@@ -117,14 +117,14 @@ void __init bf53x_relocate_l1_mem(void)
117 117
118 l1_data_a_length = _ebss_l1 - _sdata_l1; 118 l1_data_a_length = _ebss_l1 - _sdata_l1;
119 if (l1_data_a_length > L1_DATA_A_LENGTH) 119 if (l1_data_a_length > L1_DATA_A_LENGTH)
120 l1_data_a_length = L1_DATA_A_LENGTH; 120 panic("L1 Data SRAM Bank A Overflow\n");
121 121
122 /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */ 122 /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
123 dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length); 123 dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
124 124
125 l1_data_b_length = _ebss_b_l1 - _sdata_b_l1; 125 l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
126 if (l1_data_b_length > L1_DATA_B_LENGTH) 126 if (l1_data_b_length > L1_DATA_B_LENGTH)
127 l1_data_b_length = L1_DATA_B_LENGTH; 127 panic("L1 Data SRAM Bank B Overflow\n");
128 128
129 /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */ 129 /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
130 dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length + 130 dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index 7a1200328aca..288dfdbfb611 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -83,6 +83,11 @@ SECTIONS
83 . = ALIGN(32); 83 . = ALIGN(32);
84 *(.data.cacheline_aligned) 84 *(.data.cacheline_aligned)
85 85
86#if !L1_DATA_A_LENGTH
87 . = ALIGN(32);
88 *(.data_l1.cacheline_aligned)
89#endif
90
86 DATA_DATA 91 DATA_DATA
87 *(.data.*) 92 *(.data.*)
88 CONSTRUCTORS 93 CONSTRUCTORS