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authorSonic Zhang <sonic.zhang@analog.com>2008-07-19 03:42:41 -0400
committerBryan Wu <cooloney@kernel.org>2008-07-19 03:42:41 -0400
commit262c3825a9f3eb0f4f30ebb4b1ee57397bcb3ffc (patch)
treefb5402f0de002d3e7a6671820228a2b9808d831f /arch/blackfin/kernel/vmlinux.lds.S
parentbafcc1b97323261a42d47960db99947bcc1be133 (diff)
Blackfin arch: Extend sram malloc to handle L2 SRAM.
Extend system call to alloc L2 SRAM in application. Automatically move following sections to L2 SRAM: 1. kernel built-in l2 attribute section 2. kernel module l2 attribute section 3. elf-fdpic application l2 attribute section Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/kernel/vmlinux.lds.S')
-rw-r--r--arch/blackfin/kernel/vmlinux.lds.S40
1 files changed, 35 insertions, 5 deletions
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index 3ecc64cab3be..0896e38d6108 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -101,6 +101,11 @@ SECTIONS
101#if !L1_DATA_B_LENGTH 101#if !L1_DATA_B_LENGTH
102 *(.l1.data.B) 102 *(.l1.data.B)
103#endif 103#endif
104#ifndef L2_LENGTH
105 . = ALIGN(32);
106 *(.data_l2.cacheline_aligned)
107 *(.l2.data)
108#endif
104 109
105 DATA_DATA 110 DATA_DATA
106 *(.data.*) 111 *(.data.*)
@@ -182,14 +187,13 @@ SECTIONS
182 *(.l1.data) 187 *(.l1.data)
183 __edata_l1 = .; 188 __edata_l1 = .;
184 189
185 . = ALIGN(4);
186 __sbss_l1 = .;
187 *(.l1.bss)
188
189 . = ALIGN(32); 190 . = ALIGN(32);
190 *(.data_l1.cacheline_aligned) 191 *(.data_l1.cacheline_aligned)
191 192
192 . = ALIGN(4); 193 . = ALIGN(4);
194 __sbss_l1 = .;
195 *(.l1.bss)
196 . = ALIGN(4);
193 __ebss_l1 = .; 197 __ebss_l1 = .;
194 } 198 }
195 199
@@ -203,11 +207,37 @@ SECTIONS
203 . = ALIGN(4); 207 . = ALIGN(4);
204 __sbss_b_l1 = .; 208 __sbss_b_l1 = .;
205 *(.l1.bss.B) 209 *(.l1.bss.B)
206
207 . = ALIGN(4); 210 . = ALIGN(4);
208 __ebss_b_l1 = .; 211 __ebss_b_l1 = .;
209 } 212 }
210 213
214#ifdef L2_LENGTH
215 __l2_lma_start = .;
216
217 .text_data_l2 L2_START : AT(LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1))
218 {
219 . = ALIGN(4);
220 __stext_l2 = .;
221 *(.l1.text)
222 . = ALIGN(4);
223 __etext_l2 = .;
224
225 . = ALIGN(4);
226 __sdata_l2 = .;
227 *(.l1.data)
228 __edata_l2 = .;
229
230 . = ALIGN(32);
231 *(.data_l2.cacheline_aligned)
232
233 . = ALIGN(4);
234 __sbss_l2 = .;
235 *(.l1.bss)
236 . = ALIGN(4);
237 __ebss_l2 = .;
238 }
239#endif
240
211 /* Force trailing alignment of our init section so that when we 241 /* Force trailing alignment of our init section so that when we
212 * free our init memory, we don't leave behind a partial page. 242 * free our init memory, we don't leave behind a partial page.
213 */ 243 */