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authorBryan Wu <bryan.wu@analog.com>2007-05-06 17:50:22 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-07 15:12:58 -0400
commit1394f03221790a988afc3e4b3cb79f2e477246a9 (patch)
tree2c1963c9a4f2d84a5e021307fde240c5d567cf70 /arch/blackfin/kernel/vmlinux.lds.S
parent73243284463a761e04d69d22c7516b2be7de096c (diff)
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/blackfin/kernel/vmlinux.lds.S')
-rw-r--r--arch/blackfin/kernel/vmlinux.lds.S228
1 files changed, 228 insertions, 0 deletions
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
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index 000000000000..6ae9ebbd8e58
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1/*
2 * File: arch/blackfin/kernel/vmlinux.lds.S
3 * Based on: none - original work
4 * Author:
5 *
6 * Created: Tue Sep 21 2004
7 * Description: Master linker script for blackfin architecture
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#define VMLINUX_SYMBOL(_sym_) _##_sym_
31
32#include <asm-generic/vmlinux.lds.h>
33#include <asm/mem_map.h>
34
35
36OUTPUT_FORMAT("elf32-bfin")
37ENTRY(__start)
38_jiffies = _jiffies_64;
39
40MEMORY
41{
42 ram : ORIGIN = CONFIG_BOOT_LOAD, LENGTH = (CONFIG_MEM_SIZE * 1024 * 1024) - (CONFIG_BOOT_LOAD)
43 l1_data_a : ORIGIN = L1_DATA_A_START, LENGTH = L1_DATA_A_LENGTH
44 l1_data_b : ORIGIN = L1_DATA_B_START, LENGTH = L1_DATA_B_LENGTH
45 l1_code : ORIGIN = L1_CODE_START, LENGTH = L1_CODE_LENGTH
46 l1_scratch : ORIGIN = L1_SCRATCH_START, LENGTH = L1_SCRATCH_LENGTH
47}
48
49SECTIONS
50{
51 . = CONFIG_BOOT_LOAD;
52
53 .text :
54 {
55 _text = .;
56 __stext = .;
57 *(.text)
58 SCHED_TEXT
59 *(.text.lock)
60 . = ALIGN(16);
61 ___start___ex_table = .;
62 *(__ex_table)
63 ___stop___ex_table = .;
64
65 *($code)
66 *(.rodata)
67 *(.rodata.*)
68 *(__vermagic) /* Kernel version magic */
69 *(.rodata1)
70 *(.fixup)
71 *(.spinlock.text)
72
73 /* Kernel symbol table: Normal symbols */
74 . = ALIGN(4);
75 ___start___ksymtab = .;
76 *(__ksymtab)
77 ___stop___ksymtab = .;
78
79 /* Kernel symbol table: GPL-only symbols */
80 ___start___ksymtab_gpl = .;
81 *(__ksymtab_gpl)
82 ___stop___ksymtab_gpl = .;
83
84 /* Kernel symbol table: Normal unused symbols */ \
85 ___start___ksymtab_unused = .;
86 *(__ksymtab_unused)
87 ___stop___ksymtab_unused = .;
88
89 /* Kernel symbol table: GPL-only unused symbols */
90 ___start___ksymtab_unused_gpl = .;
91 *(__ksymtab_unused_gpl)
92 ___stop___ksymtab_unused_gpl = .;
93
94
95 /* Kernel symbol table: GPL-future symbols */
96 ___start___ksymtab_gpl_future = .;
97 *(__ksymtab_gpl_future)
98 ___stop___ksymtab_gpl_future = .;
99
100 /* Kernel symbol table: Normal symbols */
101 ___start___kcrctab = .;
102 *(__kcrctab)
103 ___stop___kcrctab = .;
104
105 /* Kernel symbol table: GPL-only symbols */
106 ___start___kcrctab_gpl = .;
107 *(__kcrctab_gpl)
108 ___stop___kcrctab_gpl = .;
109
110 /* Kernel symbol table: GPL-future symbols */
111 ___start___kcrctab_gpl_future = .;
112 *(__kcrctab_gpl_future)
113 ___stop___kcrctab_gpl_future = .;
114
115 /* Kernel symbol table: strings */
116 *(__ksymtab_strings)
117
118 . = ALIGN(4);
119 __etext = .;
120 } > ram
121
122 .init :
123 {
124 . = ALIGN(4096);
125 ___init_begin = .;
126 __sinittext = .;
127 *(.init.text)
128 __einittext = .;
129 *(.init.data)
130 . = ALIGN(16);
131 ___setup_start = .;
132 *(.init.setup)
133 ___setup_end = .;
134 ___start___param = .;
135 *(__param)
136 ___stop___param = .;
137 ___initcall_start = .;
138 INITCALLS
139 ___initcall_end = .;
140 ___con_initcall_start = .;
141 *(.con_initcall.init)
142 ___con_initcall_end = .;
143 ___security_initcall_start = .;
144 *(.security_initcall.init)
145 ___security_initcall_end = .;
146 . = ALIGN(4);
147 ___initramfs_start = .;
148 *(.init.ramfs)
149 ___initramfs_end = .;
150 . = ALIGN(4);
151 ___init_end = .;
152 } > ram
153
154 __l1_lma_start = .;
155
156 .text_l1 :
157 {
158 . = ALIGN(4);
159 __stext_l1 = .;
160 *(.l1.text)
161
162 . = ALIGN(4);
163 __etext_l1 = .;
164 } > l1_code AT > ram
165
166 .data_l1 :
167 {
168 . = ALIGN(4);
169 __sdata_l1 = .;
170 *(.l1.data)
171 __edata_l1 = .;
172
173 . = ALIGN(4);
174 __sbss_l1 = .;
175 *(.l1.bss)
176
177 . = ALIGN(32);
178 *(.data_l1.cacheline_aligned)
179
180 . = ALIGN(4);
181 __ebss_l1 = .;
182 } > l1_data_a AT > ram
183 .data_b_l1 :
184 {
185 . = ALIGN(4);
186 __sdata_b_l1 = .;
187 *(.l1.data.B)
188 __edata_b_l1 = .;
189
190 . = ALIGN(4);
191 __sbss_b_l1 = .;
192 *(.l1.bss.B)
193
194 . = ALIGN(4);
195 __ebss_b_l1 = .;
196 } > l1_data_b AT > ram
197
198 .data :
199 {
200 __sdata = .;
201 . = ALIGN(0x2000);
202 *(.data.init_task)
203 *(.data)
204
205 . = ALIGN(32);
206 *(.data.cacheline_aligned)
207
208 . = ALIGN(0x2000);
209 __edata = .;
210 } > ram
211
212 /DISCARD/ : { /* Exit code and data*/
213 *(.exit.text)
214 *(.exit.data)
215 *(.exitcall.exit)
216 } > ram
217
218 .bss :
219 {
220 . = ALIGN(4);
221 ___bss_start = .;
222 *(.bss)
223 *(COMMON)
224 . = ALIGN(4);
225 ___bss_stop = .;
226 __end = . ;
227 } > ram
228}