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authorMike Frysinger <vapier.adi@gmail.com>2008-11-18 04:48:22 -0500
committerBryan Wu <cooloney@kernel.org>2008-11-18 04:48:22 -0500
commit1b047d8cc58f7f8b50fb9c80b131ef054f091f1b (patch)
tree2337ae0921a2c0cf855cfbcd44b3260dc263a425 /arch/blackfin/kernel/time.c
parent33c8691f45459a41864562ae8d1ec12b4503f200 (diff)
Blackfin arch: cleanup the time.c code
- make the code a bit more readable - kill of warnings/ifdef mess a bit Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/kernel/time.c')
-rw-r--r--arch/blackfin/kernel/time.c101
1 files changed, 36 insertions, 65 deletions
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index 06de2ce67a9e..2ed440b773dc 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -1,32 +1,11 @@
1/* 1/*
2 * File: arch/blackfin/kernel/time.c 2 * arch/blackfin/kernel/time.c
3 * Based on: none - original work
4 * Author:
5 * 3 *
6 * Created: 4 * This file contains the Blackfin-specific time handling details.
7 * Description: This file contains the bfin-specific time handling details. 5 * Most of the stuff is located in the machine specific files.
8 * Most of the stuff is located in the machine specific files.
9 * FIXME: (This file is subject for removal)
10 * 6 *
11 * Modified: 7 * Copyright 2004-2008 Analog Devices Inc.
12 * Copyright 2004-2008 Analog Devices Inc. 8 * Licensed under the GPL-2 or later.
13 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, see the file COPYING, or write
28 * to the Free Software Foundation, Inc.,
29 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 */ 9 */
31 10
32#include <linux/module.h> 11#include <linux/module.h>
@@ -43,18 +22,33 @@
43/* This is an NTP setting */ 22/* This is an NTP setting */
44#define TICK_SIZE (tick_nsec / 1000) 23#define TICK_SIZE (tick_nsec / 1000)
45 24
46static void time_sched_init(irq_handler_t timer_routine);
47static unsigned long gettimeoffset(void);
48
49static struct irqaction bfin_timer_irq = { 25static struct irqaction bfin_timer_irq = {
50 .name = "BFIN Timer Tick", 26 .name = "Blackfin Timer Tick",
51#ifdef CONFIG_IRQ_PER_CPU 27#ifdef CONFIG_IRQ_PER_CPU
52 .flags = IRQF_DISABLED | IRQF_PERCPU, 28 .flags = IRQF_DISABLED | IRQF_PERCPU,
53#else 29#else
54 .flags = IRQF_DISABLED 30 .flags = IRQF_DISABLED
55#endif 31#endif
56}; 32};
57 33
34#ifdef CONFIG_TICK_SOURCE_SYSTMR0
35void setup_system_timer0(void)
36{
37 /* Power down the core timer, just to play safe. */
38 bfin_write_TCNTL(0);
39
40 disable_gptimers(TIMER0bit);
41 set_gptimer_status(0, TIMER_STATUS_TRUN0);
42 while (get_gptimer_status(0) & TIMER_STATUS_TRUN0)
43 udelay(10);
44
45 set_gptimer_config(0, 0x59); /* IRQ enable, periodic, PWM_OUT, SCLKed, OUT PAD disabled */
46 set_gptimer_period(TIMER0_id, get_sclk() / HZ);
47 set_gptimer_pwidth(TIMER0_id, 1);
48 SSYNC();
49 enable_gptimers(TIMER0bit);
50}
51#else
58void setup_core_timer(void) 52void setup_core_timer(void)
59{ 53{
60 u32 tcount; 54 u32 tcount;
@@ -63,10 +57,8 @@ void setup_core_timer(void)
63 bfin_write_TCNTL(1); 57 bfin_write_TCNTL(1);
64 CSYNC(); 58 CSYNC();
65 59
66 /* 60 /* the TSCALE prescaler counter */
67 * the TSCALE prescaler counter. 61 bfin_write_TSCALE(TIME_SCALE - 1);
68 */
69 bfin_write_TSCALE((TIME_SCALE - 1));
70 62
71 tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1); 63 tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1);
72 bfin_write_TPERIOD(tcount); 64 bfin_write_TPERIOD(tcount);
@@ -77,24 +69,6 @@ void setup_core_timer(void)
77 69
78 bfin_write_TCNTL(7); 70 bfin_write_TCNTL(7);
79} 71}
80
81#ifdef CONFIG_TICK_SOURCE_SYSTMR0
82void setup_system_timer0(void)
83{
84 /* Power down the core timer, just to play safe. */
85 bfin_write_TCNTL(0);
86
87 disable_gptimers(TIMER0bit);
88 set_gptimer_status(0, TIMER_STATUS_TRUN0);
89 while (get_gptimer_status(0) & TIMER_STATUS_TRUN0)
90 udelay(10);
91
92 set_gptimer_config(0, 0x59); /* IRQ enable, periodic, PWM_OUT, SCLKed, OUT PAD disabled */
93 set_gptimer_period(TIMER0_id, get_sclk() / HZ);
94 set_gptimer_pwidth(TIMER0_id, 1);
95 SSYNC();
96 enable_gptimers(TIMER0bit);
97}
98#endif 72#endif
99 73
100static void 74static void
@@ -102,13 +76,11 @@ time_sched_init(irqreturn_t(*timer_routine) (int, void *))
102{ 76{
103#ifdef CONFIG_TICK_SOURCE_SYSTMR0 77#ifdef CONFIG_TICK_SOURCE_SYSTMR0
104 setup_system_timer0(); 78 setup_system_timer0();
105#else 79 bfin_timer_irq.handler = timer_routine;
106 setup_core_timer();
107#endif
108 bfin_timer_irq.handler = (irq_handler_t)timer_routine;
109#ifdef CONFIG_TICK_SOURCE_SYSTMR0
110 setup_irq(IRQ_TIMER0, &bfin_timer_irq); 80 setup_irq(IRQ_TIMER0, &bfin_timer_irq);
111#else 81#else
82 setup_core_timer();
83 bfin_timer_irq.handler = timer_routine;
112 setup_irq(IRQ_CORETMR, &bfin_timer_irq); 84 setup_irq(IRQ_CORETMR, &bfin_timer_irq);
113#endif 85#endif
114} 86}
@@ -116,14 +88,15 @@ time_sched_init(irqreturn_t(*timer_routine) (int, void *))
116/* 88/*
117 * Should return useconds since last timer tick 89 * Should return useconds since last timer tick
118 */ 90 */
91#ifndef CONFIG_GENERIC_TIME
119static unsigned long gettimeoffset(void) 92static unsigned long gettimeoffset(void)
120{ 93{
121 unsigned long offset; 94 unsigned long offset;
122 unsigned long clocks_per_jiffy; 95 unsigned long clocks_per_jiffy;
123 96
124#ifdef CONFIG_TICK_SOURCE_SYSTMR0 97#ifdef CONFIG_TICK_SOURCE_SYSTMR0
125 clocks_per_jiffy = bfin_read_TIMER0_PERIOD(); 98 clocks_per_jiffy = bfin_read_TIMER0_PERIOD();
126 offset = bfin_read_TIMER0_COUNTER() / \ 99 offset = bfin_read_TIMER0_COUNTER() / \
127 (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); 100 (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC);
128 101
129 if ((get_gptimer_status(0) & TIMER_STATUS_TIMIL0) && offset < (100000 / HZ / 2)) 102 if ((get_gptimer_status(0) & TIMER_STATUS_TIMIL0) && offset < (100000 / HZ / 2))
@@ -131,7 +104,7 @@ static unsigned long gettimeoffset(void)
131#else 104#else
132 clocks_per_jiffy = bfin_read_TPERIOD(); 105 clocks_per_jiffy = bfin_read_TPERIOD();
133 offset = (clocks_per_jiffy - bfin_read_TCOUNT()) / \ 106 offset = (clocks_per_jiffy - bfin_read_TCOUNT()) / \
134 (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); 107 (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC);
135 108
136 /* Check if we just wrapped the counters and maybe missed a tick */ 109 /* Check if we just wrapped the counters and maybe missed a tick */
137 if ((bfin_read_ILAT() & (1 << IRQ_CORETMR)) 110 if ((bfin_read_ILAT() & (1 << IRQ_CORETMR))
@@ -140,6 +113,7 @@ static unsigned long gettimeoffset(void)
140#endif 113#endif
141 return offset; 114 return offset;
142} 115}
116#endif
143 117
144static inline int set_rtc_mmss(unsigned long nowtime) 118static inline int set_rtc_mmss(unsigned long nowtime)
145{ 119{
@@ -151,9 +125,8 @@ static inline int set_rtc_mmss(unsigned long nowtime)
151 * as well as call the "do_timer()" routine every clocktick 125 * as well as call the "do_timer()" routine every clocktick
152 */ 126 */
153#ifdef CONFIG_CORE_TIMER_IRQ_L1 127#ifdef CONFIG_CORE_TIMER_IRQ_L1
154irqreturn_t timer_interrupt(int irq, void *dummy)__attribute__((l1_text)); 128__attribute__((l1_text))
155#endif 129#endif
156
157irqreturn_t timer_interrupt(int irq, void *dummy) 130irqreturn_t timer_interrupt(int irq, void *dummy)
158{ 131{
159 /* last time the cmos clock got updated */ 132 /* last time the cmos clock got updated */
@@ -165,13 +138,11 @@ irqreturn_t timer_interrupt(int irq, void *dummy)
165#endif 138#endif
166 do_timer(1); 139 do_timer(1);
167 140
168
169 /* 141 /*
170 * If we have an externally synchronized Linux clock, then update 142 * If we have an externally synchronized Linux clock, then update
171 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be 143 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
172 * called as close as possible to 500 ms before the new second starts. 144 * called as close as possible to 500 ms before the new second starts.
173 */ 145 */
174
175 if (ntp_synced() && 146 if (ntp_synced() &&
176 xtime.tv_sec > last_rtc_update + 660 && 147 xtime.tv_sec > last_rtc_update + 660 &&
177 (xtime.tv_nsec / NSEC_PER_USEC) >= 148 (xtime.tv_nsec / NSEC_PER_USEC) >=