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authorPhilippe Gerum <rpm@xenomai.org>2009-06-22 12:22:25 -0400
committerMike Frysinger <vapier@gentoo.org>2009-09-16 21:28:29 -0400
commitd8ca63955a81fd443016ef8813f8e6fd8dea7de4 (patch)
treef1826f0ceb58599ea336559b7a43a60e43e4ffd4 /arch/blackfin/kernel/ipipe.c
parentae4f073c40bf677b03826262e6022b4a251fe437 (diff)
Blackfin: checkpatch --file arch/blackfin/kernel/ipipe.c
Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/kernel/ipipe.c')
-rw-r--r--arch/blackfin/kernel/ipipe.c36
1 files changed, 19 insertions, 17 deletions
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c
index b8d22034b9a6..a7256775fb98 100644
--- a/arch/blackfin/kernel/ipipe.c
+++ b/arch/blackfin/kernel/ipipe.c
@@ -30,10 +30,10 @@
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/errno.h> 31#include <linux/errno.h>
32#include <linux/kthread.h> 32#include <linux/kthread.h>
33#include <asm/unistd.h> 33#include <linux/unistd.h>
34#include <linux/io.h>
34#include <asm/system.h> 35#include <asm/system.h>
35#include <asm/atomic.h> 36#include <asm/atomic.h>
36#include <asm/io.h>
37 37
38DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs); 38DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
39 39
@@ -90,6 +90,7 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
90 struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr(); 90 struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
91 struct ipipe_domain *this_domain, *next_domain; 91 struct ipipe_domain *this_domain, *next_domain;
92 struct list_head *head, *pos; 92 struct list_head *head, *pos;
93 struct ipipe_irqdesc *idesc;
93 int m_ack, s = -1; 94 int m_ack, s = -1;
94 95
95 /* 96 /*
@@ -100,17 +101,20 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
100 */ 101 */
101 m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR); 102 m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR);
102 this_domain = __ipipe_current_domain; 103 this_domain = __ipipe_current_domain;
104 idesc = &this_domain->irqs[irq];
103 105
104 if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control))) 106 if (unlikely(test_bit(IPIPE_STICKY_FLAG, &idesc->control)))
105 head = &this_domain->p_link; 107 head = &this_domain->p_link;
106 else { 108 else {
107 head = __ipipe_pipeline.next; 109 head = __ipipe_pipeline.next;
108 next_domain = list_entry(head, struct ipipe_domain, p_link); 110 next_domain = list_entry(head, struct ipipe_domain, p_link);
109 if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) { 111 idesc = &next_domain->irqs[irq];
110 if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) 112 if (likely(test_bit(IPIPE_WIRED_FLAG, &idesc->control))) {
111 next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq)); 113 if (!m_ack && idesc->acknowledge != NULL)
114 idesc->acknowledge(irq, irq_to_desc(irq));
112 if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status)) 115 if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
113 s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status); 116 s = __test_and_set_bit(IPIPE_STALL_FLAG,
117 &p->status);
114 __ipipe_dispatch_wired(next_domain, irq); 118 __ipipe_dispatch_wired(next_domain, irq);
115 goto out; 119 goto out;
116 } 120 }
@@ -121,14 +125,15 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
121 pos = head; 125 pos = head;
122 while (pos != &__ipipe_pipeline) { 126 while (pos != &__ipipe_pipeline) {
123 next_domain = list_entry(pos, struct ipipe_domain, p_link); 127 next_domain = list_entry(pos, struct ipipe_domain, p_link);
124 if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) { 128 idesc = &next_domain->irqs[irq];
129 if (test_bit(IPIPE_HANDLE_FLAG, &idesc->control)) {
125 __ipipe_set_irq_pending(next_domain, irq); 130 __ipipe_set_irq_pending(next_domain, irq);
126 if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) { 131 if (!m_ack && idesc->acknowledge != NULL) {
127 next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq)); 132 idesc->acknowledge(irq, irq_to_desc(irq));
128 m_ack = 1; 133 m_ack = 1;
129 } 134 }
130 } 135 }
131 if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control)) 136 if (!test_bit(IPIPE_PASS_FLAG, &idesc->control))
132 break; 137 break;
133 pos = next_domain->p_link.next; 138 pos = next_domain->p_link.next;
134 } 139 }
@@ -333,12 +338,9 @@ asmlinkage void __ipipe_sync_root(void)
333 338
334void ___ipipe_sync_pipeline(unsigned long syncmask) 339void ___ipipe_sync_pipeline(unsigned long syncmask)
335{ 340{
336 if (__ipipe_root_domain_p) { 341 if (__ipipe_root_domain_p &&
337 if (test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status))) 342 test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)))
338 return; 343 return;
339 }
340 344
341 __ipipe_sync_stage(syncmask); 345 __ipipe_sync_stage(syncmask);
342} 346}
343
344EXPORT_SYMBOL(show_stack);