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authorMike Frysinger <vapier.adi@gmail.com>2008-03-03 19:44:14 -0500
committerBryan Wu <cooloney@kernel.org>2008-03-03 19:44:14 -0500
commit11b0be7c2c2c142acf73f4efd136a0de7a90ecab (patch)
tree0f15845089b4d37ab120963df399546b7b458209 /arch/blackfin/kernel/fixed_code.S
parent3d7e6cf8f5837c6dace759734c987e03021a4015 (diff)
[Blackfin] arch: fix atomic and32/xor32 comments and ENDPROC markings
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/kernel/fixed_code.S')
-rw-r--r--arch/blackfin/kernel/fixed_code.S12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S
index 90262691b11a..5ed47228a390 100644
--- a/arch/blackfin/kernel/fixed_code.S
+++ b/arch/blackfin/kernel/fixed_code.S
@@ -101,9 +101,9 @@ ENDPROC (_atomic_ior32)
101 101
102.align 16 102.align 16
103 /* 103 /*
104 * Atomic ior, 32 bit. 104 * Atomic and, 32 bit.
105 * Inputs: P0: memory address to use 105 * Inputs: P0: memory address to use
106 * R0: value to ior 106 * R0: value to and
107 * Outputs: R0: new contents of the memory address. 107 * Outputs: R0: new contents of the memory address.
108 * R1: previous contents of the memory address. 108 * R1: previous contents of the memory address.
109 */ 109 */
@@ -112,13 +112,13 @@ ENTRY(_atomic_and32)
112 R0 = R1 & R0; 112 R0 = R1 & R0;
113 [P0] = R0; 113 [P0] = R0;
114 rts; 114 rts;
115ENDPROC (_atomic_ior32) 115ENDPROC (_atomic_and32)
116 116
117.align 16 117.align 16
118 /* 118 /*
119 * Atomic ior, 32 bit. 119 * Atomic xor, 32 bit.
120 * Inputs: P0: memory address to use 120 * Inputs: P0: memory address to use
121 * R0: value to ior 121 * R0: value to xor
122 * Outputs: R0: new contents of the memory address. 122 * Outputs: R0: new contents of the memory address.
123 * R1: previous contents of the memory address. 123 * R1: previous contents of the memory address.
124 */ 124 */
@@ -127,7 +127,7 @@ ENTRY(_atomic_xor32)
127 R0 = R1 ^ R0; 127 R0 = R1 ^ R0;
128 [P0] = R0; 128 [P0] = R0;
129 rts; 129 rts;
130ENDPROC (_atomic_ior32) 130ENDPROC (_atomic_xor32)
131 131
132.align 16 132.align 16
133 /* 133 /*