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authorH. Peter Anvin <hpa@zytor.com>2008-09-04 11:08:42 -0400
committerH. Peter Anvin <hpa@zytor.com>2008-09-04 11:08:42 -0400
commit7203781c98ad9147564d327de6f6513ad8fc0f4e (patch)
tree5c29a2a04a626bf08a0d56fd8a0068b3c92ad284 /arch/blackfin/kernel/cplb-nompu/cplbinit.c
parent671eef85a3e885dff4ce210d8774ad50a91d5967 (diff)
parentaf2e1f276ff08f17192411ea3b71c13a758dfe12 (diff)
Merge branch 'x86/cpu' into x86/core
Conflicts: arch/x86/kernel/cpu/feature_names.c include/asm-x86/cpufeature.h
Diffstat (limited to 'arch/blackfin/kernel/cplb-nompu/cplbinit.c')
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index 224e7cc30bc5..728f708d3981 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -164,17 +164,13 @@ static struct cplb_desc cplb_data[] = {
164 .name = "Asynchronous Memory Banks", 164 .name = "Asynchronous Memory Banks",
165 }, 165 },
166 { 166 {
167#ifdef L2_START
168 .start = L2_START, 167 .start = L2_START,
169 .end = L2_START + L2_LENGTH, 168 .end = L2_START + L2_LENGTH,
170 .psize = SIZE_1M, 169 .psize = SIZE_1M,
171 .attr = SWITCH_T | I_CPLB | D_CPLB, 170 .attr = SWITCH_T | I_CPLB | D_CPLB,
172 .i_conf = L2_MEMORY, 171 .i_conf = L2_MEMORY,
173 .d_conf = L2_MEMORY, 172 .d_conf = L2_MEMORY,
174 .valid = 1, 173 .valid = (L2_LENGTH > 0),
175#else
176 .valid = 0,
177#endif
178 .name = "L2 Memory", 174 .name = "L2 Memory",
179 }, 175 },
180 { 176 {