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authorBarry Song <barry.song@analog.com>2010-01-20 02:25:31 -0500
committerMike Frysinger <vapier@gentoo.org>2010-03-09 00:30:49 -0500
commit726e96561e4704278bc5197238f6459e1a63aa77 (patch)
tree1828b182c0744cb26a9e4e7efb84912175edae25 /arch/blackfin/kernel/cplb-mpu/cplbmgr.c
parent336746ed8ee8ef503ba79bc4b6f0b5a40e8ab3ce (diff)
Blackfin: respect the L1 kconfig optimization in the MPU code
Restore support for CONFIG_EXCPT_IRQ_SYSC_L1 in the MPU CPLB manager. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/kernel/cplb-mpu/cplbmgr.c')
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbmgr.c18
1 files changed, 12 insertions, 6 deletions
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
index 7e6383dc7b20..87b25b1b30ed 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@ -31,6 +31,12 @@ int nr_dcplb_miss[NR_CPUS], nr_icplb_miss[NR_CPUS];
31int nr_icplb_supv_miss[NR_CPUS], nr_dcplb_prot[NR_CPUS]; 31int nr_icplb_supv_miss[NR_CPUS], nr_dcplb_prot[NR_CPUS];
32int nr_cplb_flush[NR_CPUS]; 32int nr_cplb_flush[NR_CPUS];
33 33
34#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
35#define MGR_ATTR __attribute__((l1_text))
36#else
37#define MGR_ATTR
38#endif
39
34/* 40/*
35 * Given the contents of the status register, return the index of the 41 * Given the contents of the status register, return the index of the
36 * CPLB that caused the fault. 42 * CPLB that caused the fault.
@@ -59,7 +65,7 @@ static int icplb_rr_index[NR_CPUS], dcplb_rr_index[NR_CPUS];
59/* 65/*
60 * Find an ICPLB entry to be evicted and return its index. 66 * Find an ICPLB entry to be evicted and return its index.
61 */ 67 */
62static int evict_one_icplb(unsigned int cpu) 68MGR_ATTR static int evict_one_icplb(unsigned int cpu)
63{ 69{
64 int i; 70 int i;
65 for (i = first_switched_icplb; i < MAX_CPLBS; i++) 71 for (i = first_switched_icplb; i < MAX_CPLBS; i++)
@@ -74,7 +80,7 @@ static int evict_one_icplb(unsigned int cpu)
74 return i; 80 return i;
75} 81}
76 82
77static int evict_one_dcplb(unsigned int cpu) 83MGR_ATTR static int evict_one_dcplb(unsigned int cpu)
78{ 84{
79 int i; 85 int i;
80 for (i = first_switched_dcplb; i < MAX_CPLBS; i++) 86 for (i = first_switched_dcplb; i < MAX_CPLBS; i++)
@@ -89,7 +95,7 @@ static int evict_one_dcplb(unsigned int cpu)
89 return i; 95 return i;
90} 96}
91 97
92static noinline int dcplb_miss(unsigned int cpu) 98MGR_ATTR static noinline int dcplb_miss(unsigned int cpu)
93{ 99{
94 unsigned long addr = bfin_read_DCPLB_FAULT_ADDR(); 100 unsigned long addr = bfin_read_DCPLB_FAULT_ADDR();
95 int status = bfin_read_DCPLB_STATUS(); 101 int status = bfin_read_DCPLB_STATUS();
@@ -163,7 +169,7 @@ static noinline int dcplb_miss(unsigned int cpu)
163 return 0; 169 return 0;
164} 170}
165 171
166static noinline int icplb_miss(unsigned int cpu) 172MGR_ATTR static noinline int icplb_miss(unsigned int cpu)
167{ 173{
168 unsigned long addr = bfin_read_ICPLB_FAULT_ADDR(); 174 unsigned long addr = bfin_read_ICPLB_FAULT_ADDR();
169 int status = bfin_read_ICPLB_STATUS(); 175 int status = bfin_read_ICPLB_STATUS();
@@ -269,7 +275,7 @@ static noinline int icplb_miss(unsigned int cpu)
269 return 0; 275 return 0;
270} 276}
271 277
272static noinline int dcplb_protection_fault(unsigned int cpu) 278MGR_ATTR static noinline int dcplb_protection_fault(unsigned int cpu)
273{ 279{
274 int status = bfin_read_DCPLB_STATUS(); 280 int status = bfin_read_DCPLB_STATUS();
275 281
@@ -289,7 +295,7 @@ static noinline int dcplb_protection_fault(unsigned int cpu)
289 return CPLB_PROT_VIOL; 295 return CPLB_PROT_VIOL;
290} 296}
291 297
292int cplb_hdr(int seqstat, struct pt_regs *regs) 298MGR_ATTR int cplb_hdr(int seqstat, struct pt_regs *regs)
293{ 299{
294 int cause = seqstat & 0x3f; 300 int cause = seqstat & 0x3f;
295 unsigned int cpu = raw_smp_processor_id(); 301 unsigned int cpu = raw_smp_processor_id();