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authorMike Frysinger <vapier@gentoo.org>2009-11-15 02:42:34 -0500
committerMike Frysinger <vapier@gentoo.org>2009-12-15 00:15:33 -0500
commit43acb9cdef3e5775f20d88fe6eb845f248c4a83d (patch)
treebb52ac8fb716b7ca93776d93b183517353a4734f /arch/blackfin/include
parent8c0b4351ccec30e2926d0d0742ee1fa145f6e8e3 (diff)
Blackfin: punt dead/unused flash mem_init settings
I don't think these defines were ever used. At any rate, we have common bit defines for all parts as well as a Kconfig option to declare the EBIU async timings, and no one has really complained about this so far. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/include')
-rw-r--r--arch/blackfin/include/asm/mem_init.h153
1 files changed, 0 insertions, 153 deletions
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h
index 4179e329b9c9..7c8fe834ff22 100644
--- a/arch/blackfin/include/asm/mem_init.h
+++ b/arch/blackfin/include/asm/mem_init.h
@@ -295,156 +295,3 @@
295#else 295#else
296#define PLL_BYPASS 0 296#define PLL_BYPASS 0
297#endif 297#endif
298
299/***************************************Currently Not Being Used *********************************/
300
301#if defined(CONFIG_FLASH_SPEED_BWAT) && \
302defined(CONFIG_FLASH_SPEED_BRAT) && \
303defined(CONFIG_FLASH_SPEED_BHT) && \
304defined(CONFIG_FLASH_SPEED_BST) && \
305defined(CONFIG_FLASH_SPEED_BTT)
306
307#define flash_EBIU_AMBCTL_WAT ((CONFIG_FLASH_SPEED_BWAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
308#define flash_EBIU_AMBCTL_RAT ((CONFIG_FLASH_SPEED_BRAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
309#define flash_EBIU_AMBCTL_HT ((CONFIG_FLASH_SPEED_BHT * 4) / (4000000000 / CONFIG_SCLK_HZ))
310#define flash_EBIU_AMBCTL_ST ((CONFIG_FLASH_SPEED_BST * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
311#define flash_EBIU_AMBCTL_TT ((CONFIG_FLASH_SPEED_BTT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
312
313#if (flash_EBIU_AMBCTL_TT > 3)
314#define flash_EBIU_AMBCTL0_TT B0TT_4
315#endif
316#if (flash_EBIU_AMBCTL_TT == 3)
317#define flash_EBIU_AMBCTL0_TT B0TT_3
318#endif
319#if (flash_EBIU_AMBCTL_TT == 2)
320#define flash_EBIU_AMBCTL0_TT B0TT_2
321#endif
322#if (flash_EBIU_AMBCTL_TT < 2)
323#define flash_EBIU_AMBCTL0_TT B0TT_1
324#endif
325
326#if (flash_EBIU_AMBCTL_ST > 3)
327#define flash_EBIU_AMBCTL0_ST B0ST_4
328#endif
329#if (flash_EBIU_AMBCTL_ST == 3)
330#define flash_EBIU_AMBCTL0_ST B0ST_3
331#endif
332#if (flash_EBIU_AMBCTL_ST == 2)
333#define flash_EBIU_AMBCTL0_ST B0ST_2
334#endif
335#if (flash_EBIU_AMBCTL_ST < 2)
336#define flash_EBIU_AMBCTL0_ST B0ST_1
337#endif
338
339#if (flash_EBIU_AMBCTL_HT > 2)
340#define flash_EBIU_AMBCTL0_HT B0HT_3
341#endif
342#if (flash_EBIU_AMBCTL_HT == 2)
343#define flash_EBIU_AMBCTL0_HT B0HT_2
344#endif
345#if (flash_EBIU_AMBCTL_HT == 1)
346#define flash_EBIU_AMBCTL0_HT B0HT_1
347#endif
348#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT == 0)
349#define flash_EBIU_AMBCTL0_HT B0HT_0
350#endif
351#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT != 0)
352#define flash_EBIU_AMBCTL0_HT B0HT_1
353#endif
354
355#if (flash_EBIU_AMBCTL_WAT > 14)
356#define flash_EBIU_AMBCTL0_WAT B0WAT_15
357#endif
358#if (flash_EBIU_AMBCTL_WAT == 14)
359#define flash_EBIU_AMBCTL0_WAT B0WAT_14
360#endif
361#if (flash_EBIU_AMBCTL_WAT == 13)
362#define flash_EBIU_AMBCTL0_WAT B0WAT_13
363#endif
364#if (flash_EBIU_AMBCTL_WAT == 12)
365#define flash_EBIU_AMBCTL0_WAT B0WAT_12
366#endif
367#if (flash_EBIU_AMBCTL_WAT == 11)
368#define flash_EBIU_AMBCTL0_WAT B0WAT_11
369#endif
370#if (flash_EBIU_AMBCTL_WAT == 10)
371#define flash_EBIU_AMBCTL0_WAT B0WAT_10
372#endif
373#if (flash_EBIU_AMBCTL_WAT == 9)
374#define flash_EBIU_AMBCTL0_WAT B0WAT_9
375#endif
376#if (flash_EBIU_AMBCTL_WAT == 8)
377#define flash_EBIU_AMBCTL0_WAT B0WAT_8
378#endif
379#if (flash_EBIU_AMBCTL_WAT == 7)
380#define flash_EBIU_AMBCTL0_WAT B0WAT_7
381#endif
382#if (flash_EBIU_AMBCTL_WAT == 6)
383#define flash_EBIU_AMBCTL0_WAT B0WAT_6
384#endif
385#if (flash_EBIU_AMBCTL_WAT == 5)
386#define flash_EBIU_AMBCTL0_WAT B0WAT_5
387#endif
388#if (flash_EBIU_AMBCTL_WAT == 4)
389#define flash_EBIU_AMBCTL0_WAT B0WAT_4
390#endif
391#if (flash_EBIU_AMBCTL_WAT == 3)
392#define flash_EBIU_AMBCTL0_WAT B0WAT_3
393#endif
394#if (flash_EBIU_AMBCTL_WAT == 2)
395#define flash_EBIU_AMBCTL0_WAT B0WAT_2
396#endif
397#if (flash_EBIU_AMBCTL_WAT == 1)
398#define flash_EBIU_AMBCTL0_WAT B0WAT_1
399#endif
400
401#if (flash_EBIU_AMBCTL_RAT > 14)
402#define flash_EBIU_AMBCTL0_RAT B0RAT_15
403#endif
404#if (flash_EBIU_AMBCTL_RAT == 14)
405#define flash_EBIU_AMBCTL0_RAT B0RAT_14
406#endif
407#if (flash_EBIU_AMBCTL_RAT == 13)
408#define flash_EBIU_AMBCTL0_RAT B0RAT_13
409#endif
410#if (flash_EBIU_AMBCTL_RAT == 12)
411#define flash_EBIU_AMBCTL0_RAT B0RAT_12
412#endif
413#if (flash_EBIU_AMBCTL_RAT == 11)
414#define flash_EBIU_AMBCTL0_RAT B0RAT_11
415#endif
416#if (flash_EBIU_AMBCTL_RAT == 10)
417#define flash_EBIU_AMBCTL0_RAT B0RAT_10
418#endif
419#if (flash_EBIU_AMBCTL_RAT == 9)
420#define flash_EBIU_AMBCTL0_RAT B0RAT_9
421#endif
422#if (flash_EBIU_AMBCTL_RAT == 8)
423#define flash_EBIU_AMBCTL0_RAT B0RAT_8
424#endif
425#if (flash_EBIU_AMBCTL_RAT == 7)
426#define flash_EBIU_AMBCTL0_RAT B0RAT_7
427#endif
428#if (flash_EBIU_AMBCTL_RAT == 6)
429#define flash_EBIU_AMBCTL0_RAT B0RAT_6
430#endif
431#if (flash_EBIU_AMBCTL_RAT == 5)
432#define flash_EBIU_AMBCTL0_RAT B0RAT_5
433#endif
434#if (flash_EBIU_AMBCTL_RAT == 4)
435#define flash_EBIU_AMBCTL0_RAT B0RAT_4
436#endif
437#if (flash_EBIU_AMBCTL_RAT == 3)
438#define flash_EBIU_AMBCTL0_RAT B0RAT_3
439#endif
440#if (flash_EBIU_AMBCTL_RAT == 2)
441#define flash_EBIU_AMBCTL0_RAT B0RAT_2
442#endif
443#if (flash_EBIU_AMBCTL_RAT == 1)
444#define flash_EBIU_AMBCTL0_RAT B0RAT_1
445#endif
446
447#define flash_EBIU_AMBCTL0 \
448 (flash_EBIU_AMBCTL0_WAT | flash_EBIU_AMBCTL0_RAT | flash_EBIU_AMBCTL0_HT | \
449 flash_EBIU_AMBCTL0_ST | flash_EBIU_AMBCTL0_TT | CONFIG_FLASH_SPEED_RDYEN)
450#endif
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