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authorIngo Molnar <mingo@elte.hu>2009-03-26 13:29:40 -0400
committerIngo Molnar <mingo@elte.hu>2009-03-26 13:29:40 -0400
commit5a54bd1307471c1cd0521402fe65e2057edcab2f (patch)
tree25fb6a543db4ccc11b6d5662ed2e7facfce39ae7 /arch/blackfin/include
parentf9f35677d81adb0feedcd6e0e661784805c8facd (diff)
parent8e0ee43bc2c3e19db56a4adaa9a9b04ce885cd84 (diff)
Merge commit 'v2.6.29' into core/header-fixes
Diffstat (limited to 'arch/blackfin/include')
-rw-r--r--arch/blackfin/include/asm/Kbuild1
-rw-r--r--arch/blackfin/include/asm/bfin_sport.h45
-rw-r--r--arch/blackfin/include/asm/checksum.h34
-rw-r--r--arch/blackfin/include/asm/delay.h35
-rw-r--r--arch/blackfin/include/asm/gpio.h58
-rw-r--r--arch/blackfin/include/asm/ipipe.h100
-rw-r--r--arch/blackfin/include/asm/ipipe_base.h12
-rw-r--r--arch/blackfin/include/asm/irq.h36
-rw-r--r--arch/blackfin/include/asm/kgdb.h53
-rw-r--r--arch/blackfin/include/asm/mem_init.h2
-rw-r--r--arch/blackfin/include/asm/pda.h1
-rw-r--r--arch/blackfin/include/asm/reboot.h2
-rw-r--r--arch/blackfin/include/asm/thread_info.h2
13 files changed, 125 insertions, 256 deletions
diff --git a/arch/blackfin/include/asm/Kbuild b/arch/blackfin/include/asm/Kbuild
index 606ecfdcc962..09c31418cc08 100644
--- a/arch/blackfin/include/asm/Kbuild
+++ b/arch/blackfin/include/asm/Kbuild
@@ -1,3 +1,4 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3unifdef-y += bfin_sport.h
3unifdef-y += fixed_code.h 4unifdef-y += fixed_code.h
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h
index fe88a2c19213..65a651db5b07 100644
--- a/arch/blackfin/include/asm/bfin_sport.h
+++ b/arch/blackfin/include/asm/bfin_sport.h
@@ -1,30 +1,9 @@
1/* 1/*
2 * File: include/asm-blackfin/bfin_sport.h 2 * bfin_sport.h - userspace header for bfin sport driver
3 * Based on:
4 * Author: Roy Huang (roy.huang@analog.com)
5 * 3 *
6 * Created: Thu Aug. 24 2006 4 * Copyright 2004-2008 Analog Devices Inc.
7 * Description:
8 * 5 *
9 * Modified: 6 * Licensed under the GPL-2 or later.
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 7 */
29 8
30#ifndef __BFIN_SPORT_H__ 9#ifndef __BFIN_SPORT_H__
@@ -42,11 +21,10 @@
42#define NORM_FORMAT 0x0 21#define NORM_FORMAT 0x0
43#define ALAW_FORMAT 0x2 22#define ALAW_FORMAT 0x2
44#define ULAW_FORMAT 0x3 23#define ULAW_FORMAT 0x3
45struct sport_register;
46 24
47/* Function driver which use sport must initialize the structure */ 25/* Function driver which use sport must initialize the structure */
48struct sport_config { 26struct sport_config {
49 /*TDM (multichannels), I2S or other mode */ 27 /* TDM (multichannels), I2S or other mode */
50 unsigned int mode:3; 28 unsigned int mode:3;
51 29
52 /* if TDM mode is selected, channels must be set */ 30 /* if TDM mode is selected, channels must be set */
@@ -72,12 +50,18 @@ struct sport_config {
72 int serial_clk; 50 int serial_clk;
73 int fsync_clk; 51 int fsync_clk;
74 52
75 unsigned int data_format:2; /*Normal, u-law or a-law */ 53 unsigned int data_format:2; /* Normal, u-law or a-law */
76 54
77 int word_len; /* How length of the word in bits, 3-32 bits */ 55 int word_len; /* How length of the word in bits, 3-32 bits */
78 int dma_enabled; 56 int dma_enabled;
79}; 57};
80 58
59/* Userspace interface */
60#define SPORT_IOC_MAGIC 'P'
61#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
62
63#ifdef __KERNEL__
64
81struct sport_register { 65struct sport_register {
82 unsigned short tcr1; 66 unsigned short tcr1;
83 unsigned short reserved0; 67 unsigned short reserved0;
@@ -117,9 +101,6 @@ struct sport_register {
117 unsigned long mrcs3; 101 unsigned long mrcs3;
118}; 102};
119 103
120#define SPORT_IOC_MAGIC 'P'
121#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
122
123struct sport_dev { 104struct sport_dev {
124 struct cdev cdev; /* Char device structure */ 105 struct cdev cdev; /* Char device structure */
125 106
@@ -149,6 +130,8 @@ struct sport_dev {
149 struct sport_config config; 130 struct sport_config config;
150}; 131};
151 132
133#endif
134
152#define SPORT_TCR1 0 135#define SPORT_TCR1 0
153#define SPORT_TCR2 1 136#define SPORT_TCR2 1
154#define SPORT_TCLKDIV 2 137#define SPORT_TCLKDIV 2
@@ -169,4 +152,4 @@ struct sport_dev {
169#define SPORT_MRCS2 22 152#define SPORT_MRCS2 22
170#define SPORT_MRCS3 23 153#define SPORT_MRCS3 23
171 154
172#endif /*__BFIN_SPORT_H__*/ 155#endif
diff --git a/arch/blackfin/include/asm/checksum.h b/arch/blackfin/include/asm/checksum.h
index f67289a0d8d2..793581fc9556 100644
--- a/arch/blackfin/include/asm/checksum.h
+++ b/arch/blackfin/include/asm/checksum.h
@@ -63,23 +63,23 @@ static inline __wsum
63csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, 63csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
64 unsigned short proto, __wsum sum) 64 unsigned short proto, __wsum sum)
65{ 65{
66 66 unsigned int carry;
67 __asm__ ("%0 = %0 + %1;\n\t" 67
68 "CC = AC0;\n\t" 68 __asm__ ("%0 = %0 + %2;\n\t"
69 "if !CC jump 4;\n\t" 69 "CC = AC0;\n\t"
70 "%0 = %0 + %4;\n\t" 70 "%1 = CC;\n\t"
71 "%0 = %0 + %2;\n\t" 71 "%0 = %0 + %1;\n\t"
72 "CC = AC0;\n\t" 72 "%0 = %0 + %3;\n\t"
73 "if !CC jump 4;\n\t" 73 "CC = AC0;\n\t"
74 "%0 = %0 + %4;\n\t" 74 "%1 = CC;\n\t"
75 "%0 = %0 + %3;\n\t" 75 "%0 = %0 + %1;\n\t"
76 "CC = AC0;\n\t" 76 "%0 = %0 + %4;\n\t"
77 "if !CC jump 4;\n\t" 77 "CC = AC0;\n\t"
78 "%0 = %0 + %4;\n\t" 78 "%1 = CC;\n\t"
79 "NOP;\n\t" 79 "%0 = %0 + %1;\n\t"
80 : "=d" (sum) 80 : "=d" (sum), "=&d" (carry)
81 : "d" (daddr), "d" (saddr), "d" ((ntohs(len)<<16)+proto*256), "d" (1), "0"(sum) 81 : "d" (daddr), "d" (saddr), "d" ((len + proto) << 8), "0"(sum)
82 : "CC"); 82 : "CC");
83 83
84 return (sum); 84 return (sum);
85} 85}
diff --git a/arch/blackfin/include/asm/delay.h b/arch/blackfin/include/asm/delay.h
index 0889c3abb593..c31f91cc1d5d 100644
--- a/arch/blackfin/include/asm/delay.h
+++ b/arch/blackfin/include/asm/delay.h
@@ -13,29 +13,7 @@
13 13
14static inline void __delay(unsigned long loops) 14static inline void __delay(unsigned long loops)
15{ 15{
16 if (ANOMALY_05000312) { 16__asm__ __volatile__ (
17 /* Interrupted loads to loop registers -> bad */
18 unsigned long tmp;
19 __asm__ __volatile__(
20 "[--SP] = LC0;"
21 "[--SP] = LT0;"
22 "[--SP] = LB0;"
23 "LSETUP (1f,1f) LC0 = %1;"
24 "1: NOP;"
25 /* We take advantage of the fact that LC0 is 0 at
26 * the end of the loop. Otherwise we'd need some
27 * NOPs after the CLI here.
28 */
29 "CLI %0;"
30 "LB0 = [SP++];"
31 "LT0 = [SP++];"
32 "LC0 = [SP++];"
33 "STI %0;"
34 : "=d" (tmp)
35 : "a" (loops)
36 );
37 } else
38 __asm__ __volatile__ (
39 "LSETUP(1f, 1f) LC0 = %0;" 17 "LSETUP(1f, 1f) LC0 = %0;"
40 "1: NOP;" 18 "1: NOP;"
41 : 19 :
@@ -47,16 +25,15 @@ static inline void __delay(unsigned long loops)
47#include <linux/param.h> /* needed for HZ */ 25#include <linux/param.h> /* needed for HZ */
48 26
49/* 27/*
50 * Use only for very small delays ( < 1 msec). Should probably use a 28 * close approximation borrowed from m68knommu to avoid 64-bit math
51 * lookup table, really, as the multiplications take much too long with
52 * short delays. This is a "reasonable" implementation, though (and the
53 * first constant multiplications gets optimized away if the delay is
54 * a constant)
55 */ 29 */
30
31#define HZSCALE (268435456 / (1000000/HZ))
32
56static inline void udelay(unsigned long usecs) 33static inline void udelay(unsigned long usecs)
57{ 34{
58 extern unsigned long loops_per_jiffy; 35 extern unsigned long loops_per_jiffy;
59 __delay(usecs * loops_per_jiffy / (1000000 / HZ)); 36 __delay((((usecs * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6);
60} 37}
61 38
62#endif 39#endif
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 9477d82fcad2..d4a082ef75b4 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -27,60 +27,6 @@
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 28 */
29 29
30/*
31* Number BF537/6/4 BF561 BF533/2/1
32* BF527/5/2
33*
34* GPIO_0 PF0 PF0 PF0
35* GPIO_1 PF1 PF1 PF1
36* GPIO_2 PF2 PF2 PF2
37* GPIO_3 PF3 PF3 PF3
38* GPIO_4 PF4 PF4 PF4
39* GPIO_5 PF5 PF5 PF5
40* GPIO_6 PF6 PF6 PF6
41* GPIO_7 PF7 PF7 PF7
42* GPIO_8 PF8 PF8 PF8
43* GPIO_9 PF9 PF9 PF9
44* GPIO_10 PF10 PF10 PF10
45* GPIO_11 PF11 PF11 PF11
46* GPIO_12 PF12 PF12 PF12
47* GPIO_13 PF13 PF13 PF13
48* GPIO_14 PF14 PF14 PF14
49* GPIO_15 PF15 PF15 PF15
50* GPIO_16 PG0 PF16
51* GPIO_17 PG1 PF17
52* GPIO_18 PG2 PF18
53* GPIO_19 PG3 PF19
54* GPIO_20 PG4 PF20
55* GPIO_21 PG5 PF21
56* GPIO_22 PG6 PF22
57* GPIO_23 PG7 PF23
58* GPIO_24 PG8 PF24
59* GPIO_25 PG9 PF25
60* GPIO_26 PG10 PF26
61* GPIO_27 PG11 PF27
62* GPIO_28 PG12 PF28
63* GPIO_29 PG13 PF29
64* GPIO_30 PG14 PF30
65* GPIO_31 PG15 PF31
66* GPIO_32 PH0 PF32
67* GPIO_33 PH1 PF33
68* GPIO_34 PH2 PF34
69* GPIO_35 PH3 PF35
70* GPIO_36 PH4 PF36
71* GPIO_37 PH5 PF37
72* GPIO_38 PH6 PF38
73* GPIO_39 PH7 PF39
74* GPIO_40 PH8 PF40
75* GPIO_41 PH9 PF41
76* GPIO_42 PH10 PF42
77* GPIO_43 PH11 PF43
78* GPIO_44 PH12 PF44
79* GPIO_45 PH13 PF45
80* GPIO_46 PH14 PF46
81* GPIO_47 PH15 PF47
82*/
83
84#ifndef __ARCH_BLACKFIN_GPIO_H__ 30#ifndef __ARCH_BLACKFIN_GPIO_H__
85#define __ARCH_BLACKFIN_GPIO_H__ 31#define __ARCH_BLACKFIN_GPIO_H__
86 32
@@ -295,10 +241,6 @@ int bfin_gpio_direction_output(unsigned gpio, int value);
295int bfin_gpio_get_value(unsigned gpio); 241int bfin_gpio_get_value(unsigned gpio);
296void bfin_gpio_set_value(unsigned gpio, int value); 242void bfin_gpio_set_value(unsigned gpio, int value);
297 243
298#ifndef BF548_FAMILY
299#define bfin_gpio_set_value(gpio, value) set_gpio_data(gpio, value)
300#endif
301
302#ifdef CONFIG_GPIOLIB 244#ifdef CONFIG_GPIOLIB
303#include <asm-generic/gpio.h> /* cansleep wrappers */ 245#include <asm-generic/gpio.h> /* cansleep wrappers */
304 246
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h
index 76f53d8b9a0d..343b56361ec9 100644
--- a/arch/blackfin/include/asm/ipipe.h
+++ b/arch/blackfin/include/asm/ipipe.h
@@ -35,9 +35,9 @@
35#include <asm/atomic.h> 35#include <asm/atomic.h>
36#include <asm/traps.h> 36#include <asm/traps.h>
37 37
38#define IPIPE_ARCH_STRING "1.8-00" 38#define IPIPE_ARCH_STRING "1.9-00"
39#define IPIPE_MAJOR_NUMBER 1 39#define IPIPE_MAJOR_NUMBER 1
40#define IPIPE_MINOR_NUMBER 8 40#define IPIPE_MINOR_NUMBER 9
41#define IPIPE_PATCH_NUMBER 0 41#define IPIPE_PATCH_NUMBER 0
42 42
43#ifdef CONFIG_SMP 43#ifdef CONFIG_SMP
@@ -83,9 +83,9 @@ struct ipipe_sysinfo {
83 "%2 = CYCLES2\n" \ 83 "%2 = CYCLES2\n" \
84 "CC = %2 == %0\n" \ 84 "CC = %2 == %0\n" \
85 "if ! CC jump 1b\n" \ 85 "if ! CC jump 1b\n" \
86 : "=r" (((unsigned long *)&t)[1]), \ 86 : "=d,a" (((unsigned long *)&t)[1]), \
87 "=r" (((unsigned long *)&t)[0]), \ 87 "=d,a" (((unsigned long *)&t)[0]), \
88 "=r" (__cy2) \ 88 "=d,a" (__cy2) \
89 : /*no input*/ : "CC"); \ 89 : /*no input*/ : "CC"); \
90 t; \ 90 t; \
91 }) 91 })
@@ -118,35 +118,40 @@ void __ipipe_disable_irqdesc(struct ipipe_domain *ipd,
118 118
119#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq)) 119#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq))
120 120
121#define __ipipe_lock_root() \ 121static inline int __ipipe_check_tickdev(const char *devname)
122 set_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) 122{
123 return 1;
124}
123 125
124#define __ipipe_unlock_root() \ 126static inline void __ipipe_lock_root(void)
125 clear_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags) 127{
128 set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
129}
130
131static inline void __ipipe_unlock_root(void)
132{
133 clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
134}
126 135
127void __ipipe_enable_pipeline(void); 136void __ipipe_enable_pipeline(void);
128 137
129#define __ipipe_hook_critical_ipi(ipd) do { } while (0) 138#define __ipipe_hook_critical_ipi(ipd) do { } while (0)
130 139
131#define __ipipe_sync_pipeline(syncmask) \ 140#define __ipipe_sync_pipeline ___ipipe_sync_pipeline
132 do { \ 141void ___ipipe_sync_pipeline(unsigned long syncmask);
133 struct ipipe_domain *ipd = ipipe_current_domain; \
134 if (likely(ipd != ipipe_root_domain || !test_bit(IPIPE_ROOTLOCK_FLAG, &ipd->flags))) \
135 __ipipe_sync_stage(syncmask); \
136 } while (0)
137 142
138void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs); 143void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs);
139 144
140int __ipipe_get_irq_priority(unsigned irq); 145int __ipipe_get_irq_priority(unsigned irq);
141 146
142int __ipipe_get_irqthread_priority(unsigned irq);
143
144void __ipipe_stall_root_raw(void); 147void __ipipe_stall_root_raw(void);
145 148
146void __ipipe_unstall_root_raw(void); 149void __ipipe_unstall_root_raw(void);
147 150
148void __ipipe_serial_debug(const char *fmt, ...); 151void __ipipe_serial_debug(const char *fmt, ...);
149 152
153asmlinkage void __ipipe_call_irqtail(unsigned long addr);
154
150DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs); 155DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
151 156
152extern unsigned long __ipipe_core_clock; 157extern unsigned long __ipipe_core_clock;
@@ -162,42 +167,25 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul)
162 167
163#define __ipipe_run_irqtail() /* Must be a macro */ \ 168#define __ipipe_run_irqtail() /* Must be a macro */ \
164 do { \ 169 do { \
165 asmlinkage void __ipipe_call_irqtail(void); \
166 unsigned long __pending; \ 170 unsigned long __pending; \
167 CSYNC(); \ 171 CSYNC(); \
168 __pending = bfin_read_IPEND(); \ 172 __pending = bfin_read_IPEND(); \
169 if (__pending & 0x8000) { \ 173 if (__pending & 0x8000) { \
170 __pending &= ~0x8010; \ 174 __pending &= ~0x8010; \
171 if (__pending && (__pending & (__pending - 1)) == 0) \ 175 if (__pending && (__pending & (__pending - 1)) == 0) \
172 __ipipe_call_irqtail(); \ 176 __ipipe_call_irqtail(__ipipe_irq_tail_hook); \
173 } \ 177 } \
174 } while (0) 178 } while (0)
175 179
176#define __ipipe_run_isr(ipd, irq) \ 180#define __ipipe_run_isr(ipd, irq) \
177 do { \ 181 do { \
178 if (ipd == ipipe_root_domain) { \ 182 if (ipd == ipipe_root_domain) { \
179 /* \ 183 local_irq_enable_hw(); \
180 * Note: the I-pipe implements a threaded interrupt model on \ 184 if (ipipe_virtual_irq_p(irq)) \
181 * this arch for Linux external IRQs. The interrupt handler we \
182 * call here only wakes up the associated IRQ thread. \
183 */ \
184 if (ipipe_virtual_irq_p(irq)) { \
185 /* No irqtail here; virtual interrupts have no effect \
186 on IPEND so there is no need for processing \
187 deferral. */ \
188 local_irq_enable_nohead(ipd); \
189 ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ 185 ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
190 local_irq_disable_nohead(ipd); \ 186 else \
191 } else \
192 /* \
193 * No need to run the irqtail here either; \
194 * we can't be preempted by hw IRQs, so \
195 * non-Linux IRQs cannot stack over the short \
196 * thread wakeup code. Which in turn means \
197 * that no irqtail condition could be pending \
198 * for domains above Linux in the pipeline. \
199 */ \
200 ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \ 187 ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \
188 local_irq_disable_hw(); \
201 } else { \ 189 } else { \
202 __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ 190 __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
203 local_irq_enable_nohead(ipd); \ 191 local_irq_enable_nohead(ipd); \
@@ -217,42 +205,24 @@ void ipipe_init_irq_threads(void);
217 205
218int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); 206int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
219 207
220#define IS_SYSIRQ(irq) ((irq) > IRQ_CORETMR && (irq) <= SYS_IRQS) 208#ifdef CONFIG_GENERIC_CLOCKEVENTS
221#define IS_GPIOIRQ(irq) ((irq) >= GPIO_IRQ_BASE && (irq) < NR_IRQS) 209#define IRQ_SYSTMR IRQ_CORETMR
222 210#define IRQ_PRIOTMR IRQ_CORETMR
211#else
223#define IRQ_SYSTMR IRQ_TIMER0 212#define IRQ_SYSTMR IRQ_TIMER0
224#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0 213#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0
214#endif
225 215
226#if defined(CONFIG_BF531) || defined(CONFIG_BF532) || defined(CONFIG_BF533) 216#ifdef CONFIG_BF561
227#define PRIO_GPIODEMUX(irq) CONFIG_PFA
228#elif defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537)
229#define PRIO_GPIODEMUX(irq) CONFIG_IRQ_PROG_INTA
230#elif defined(CONFIG_BF52x)
231#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PORTF_INTA ? CONFIG_IRQ_PORTF_INTA : \
232 (irq) == IRQ_PORTG_INTA ? CONFIG_IRQ_PORTG_INTA : \
233 (irq) == IRQ_PORTH_INTA ? CONFIG_IRQ_PORTH_INTA : \
234 -1)
235#elif defined(CONFIG_BF561)
236#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PROG0_INTA ? CONFIG_IRQ_PROG0_INTA : \
237 (irq) == IRQ_PROG1_INTA ? CONFIG_IRQ_PROG1_INTA : \
238 (irq) == IRQ_PROG2_INTA ? CONFIG_IRQ_PROG2_INTA : \
239 -1)
240#define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val) 217#define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val)
241#define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val) 218#define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val)
242#define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val) 219#define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val)
243#define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS() 220#define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS()
244#elif defined(CONFIG_BF54x) 221#elif defined(CONFIG_BF54x)
245#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PINT0 ? CONFIG_IRQ_PINT0 : \
246 (irq) == IRQ_PINT1 ? CONFIG_IRQ_PINT1 : \
247 (irq) == IRQ_PINT2 ? CONFIG_IRQ_PINT2 : \
248 (irq) == IRQ_PINT3 ? CONFIG_IRQ_PINT3 : \
249 -1)
250#define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val) 222#define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val)
251#define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val) 223#define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val)
252#define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val) 224#define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val)
253#define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val) 225#define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val)
254#else
255# error "no PRIO_GPIODEMUX() for this part"
256#endif 226#endif
257 227
258#define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0) 228#define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0)
@@ -275,4 +245,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
275 245
276#endif /* !CONFIG_IPIPE */ 246#endif /* !CONFIG_IPIPE */
277 247
248#define ipipe_update_tick_evtdev(evtdev) do { } while (0)
249
278#endif /* !__ASM_BLACKFIN_IPIPE_H */ 250#endif /* !__ASM_BLACKFIN_IPIPE_H */
diff --git a/arch/blackfin/include/asm/ipipe_base.h b/arch/blackfin/include/asm/ipipe_base.h
index cb1025aeabcf..3e8acbd1a3be 100644
--- a/arch/blackfin/include/asm/ipipe_base.h
+++ b/arch/blackfin/include/asm/ipipe_base.h
@@ -1,5 +1,5 @@
1/* -*- linux-c -*- 1/* -*- linux-c -*-
2 * include/asm-blackfin/_baseipipe.h 2 * include/asm-blackfin/ipipe_base.h
3 * 3 *
4 * Copyright (C) 2007 Philippe Gerum. 4 * Copyright (C) 2007 Philippe Gerum.
5 * 5 *
@@ -27,8 +27,9 @@
27#define IPIPE_NR_XIRQS NR_IRQS 27#define IPIPE_NR_XIRQS NR_IRQS
28#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */ 28#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */
29 29
30/* Blackfin-specific, global domain flags */ 30/* Blackfin-specific, per-cpu pipeline status */
31#define IPIPE_ROOTLOCK_FLAG 1 /* Lock pipeline for root */ 31#define IPIPE_SYNCDEFER_FLAG 15
32#define IPIPE_SYNCDEFER_MASK (1L << IPIPE_SYNCDEFER_MASK)
32 33
33 /* Blackfin traps -- i.e. exception vector numbers */ 34 /* Blackfin traps -- i.e. exception vector numbers */
34#define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */ 35#define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */
@@ -48,11 +49,6 @@
48 49
49#ifndef __ASSEMBLY__ 50#ifndef __ASSEMBLY__
50 51
51#include <linux/bitops.h>
52
53extern int test_bit(int nr, const void *addr);
54
55
56extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ 52extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */
57 53
58static inline void __ipipe_stall_root(void) 54static inline void __ipipe_stall_root(void)
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index 3d977909ce7d..7645e85a5f6f 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -61,20 +61,38 @@ void __ipipe_restore_root(unsigned long flags);
61#define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags)) 61#define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags))
62#define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x) 62#define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x)
63 63
64#define local_save_flags(x) \ 64#define local_save_flags(x) \
65 do { \ 65 do { \
66 (x) = __ipipe_test_root() ? \ 66 (x) = __ipipe_test_root() ? \
67 __all_masked_irq_flags : bfin_irq_flags; \ 67 __all_masked_irq_flags : bfin_irq_flags; \
68 barrier(); \
68 } while (0) 69 } while (0)
69 70
70#define local_irq_save(x) \ 71#define local_irq_save(x) \
71 do { \ 72 do { \
72 (x) = __ipipe_test_and_stall_root(); \ 73 (x) = __ipipe_test_and_stall_root() ? \
74 __all_masked_irq_flags : bfin_irq_flags; \
75 barrier(); \
76 } while (0)
77
78static inline void local_irq_restore(unsigned long x)
79{
80 barrier();
81 __ipipe_restore_root(x == __all_masked_irq_flags);
82}
83
84#define local_irq_disable() \
85 do { \
86 __ipipe_stall_root(); \
87 barrier(); \
73 } while (0) 88 } while (0)
74 89
75#define local_irq_restore(x) __ipipe_restore_root(x) 90static inline void local_irq_enable(void)
76#define local_irq_disable() __ipipe_stall_root() 91{
77#define local_irq_enable() __ipipe_unstall_root() 92 barrier();
93 __ipipe_unstall_root();
94}
95
78#define irqs_disabled() __ipipe_test_root() 96#define irqs_disabled() __ipipe_test_root()
79 97
80#define local_save_flags_hw(x) \ 98#define local_save_flags_hw(x) \
diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h
index 26ebac6646d8..c8b256d2ea30 100644
--- a/arch/blackfin/include/asm/kgdb.h
+++ b/arch/blackfin/include/asm/kgdb.h
@@ -1,32 +1,8 @@
1/* 1/* Blackfin KGDB header
2 * File: include/asm-blackfin/kgdb.h
3 * Based on:
4 * Author: Sonic Zhang
5 *
6 * Created:
7 * Description:
8 *
9 * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
10 *
11 * Modified:
12 * Copyright 2005-2006 Analog Devices Inc.
13 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 * 2 *
16 * This program is free software; you can redistribute it and/or modify 3 * Copyright 2005-2009 Analog Devices Inc.
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 * 4 *
21 * This program is distributed in the hope that it will be useful, 5 * Licensed under the GPL-2 or later.
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, see the file COPYING, or write
28 * to the Free Software Foundation, Inc.,
29 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 */ 6 */
31 7
32#ifndef __ASM_BLACKFIN_KGDB_H__ 8#ifndef __ASM_BLACKFIN_KGDB_H__
@@ -37,17 +13,18 @@
37/* gdb locks */ 13/* gdb locks */
38#define KGDB_MAX_NO_CPUS 8 14#define KGDB_MAX_NO_CPUS 8
39 15
40/************************************************************************/ 16/*
41/* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/ 17 * BUFMAX defines the maximum number of characters in inbound/outbound buffers.
42/* at least NUMREGBYTES*2 are needed for register packets */ 18 * At least NUMREGBYTES*2 are needed for register packets.
43/* Longer buffer is needed to list all threads */ 19 * Longer buffer is needed to list all threads.
20 */
44#define BUFMAX 2048 21#define BUFMAX 2048
45 22
46/* 23/*
47 * Note that this register image is different from 24 * Note that this register image is different from
48 * the register image that Linux produces at interrupt time. 25 * the register image that Linux produces at interrupt time.
49 * 26 *
50 * Linux's register image is defined by struct pt_regs in ptrace.h. 27 * Linux's register image is defined by struct pt_regs in ptrace.h.
51 */ 28 */
52enum regnames { 29enum regnames {
53 /* Core Registers */ 30 /* Core Registers */
@@ -104,14 +81,14 @@ enum regnames {
104 BFIN_RETX, 81 BFIN_RETX,
105 BFIN_RETN, 82 BFIN_RETN,
106 BFIN_RETE, 83 BFIN_RETE,
107 84
108 /* Pseudo Registers */ 85 /* Pseudo Registers */
109 BFIN_PC, 86 BFIN_PC,
110 BFIN_CC, 87 BFIN_CC,
111 BFIN_EXTRA1, /* Address of .text section. */ 88 BFIN_EXTRA1, /* Address of .text section. */
112 BFIN_EXTRA2, /* Address of .data section. */ 89 BFIN_EXTRA2, /* Address of .data section. */
113 BFIN_EXTRA3, /* Address of .bss section. */ 90 BFIN_EXTRA3, /* Address of .bss section. */
114 BFIN_FDPIC_EXEC, 91 BFIN_FDPIC_EXEC,
115 BFIN_FDPIC_INTERP, 92 BFIN_FDPIC_INTERP,
116 93
117 /* MMRs */ 94 /* MMRs */
@@ -126,7 +103,7 @@ enum regnames {
126 103
127static inline void arch_kgdb_breakpoint(void) 104static inline void arch_kgdb_breakpoint(void)
128{ 105{
129 asm(" EXCPT 2;"); 106 asm("EXCPT 2;");
130} 107}
131#define BREAK_INSTR_SIZE 2 108#define BREAK_INSTR_SIZE 2
132#define CACHE_FLUSH_IS_SAFE 1 109#define CACHE_FLUSH_IS_SAFE 1
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h
index 255a9316ad36..61f7487fbf12 100644
--- a/arch/blackfin/include/asm/mem_init.h
+++ b/arch/blackfin/include/asm/mem_init.h
@@ -115,7 +115,7 @@
115#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) 115#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
116 116
117/* Enable SCLK Out */ 117/* Enable SCLK Out */
118#define mem_SDGCTL (0x80000000 | SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS) 118#define mem_SDGCTL (SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
119#else 119#else
120#define mem_SDRRC CONFIG_MEM_SDRRC 120#define mem_SDRRC CONFIG_MEM_SDRRC
121#define mem_SDGCTL CONFIG_MEM_SDGCTL 121#define mem_SDGCTL CONFIG_MEM_SDGCTL
diff --git a/arch/blackfin/include/asm/pda.h b/arch/blackfin/include/asm/pda.h
index bd8d4a7efeb2..a67142740df0 100644
--- a/arch/blackfin/include/asm/pda.h
+++ b/arch/blackfin/include/asm/pda.h
@@ -59,6 +59,7 @@ struct blackfin_pda { /* Per-processor Data Area */
59 unsigned long icplb_fault_addr; 59 unsigned long icplb_fault_addr;
60 unsigned long retx; 60 unsigned long retx;
61 unsigned long seqstat; 61 unsigned long seqstat;
62 unsigned int __nmi_count; /* number of times NMI asserted on this CPU */
62}; 63};
63 64
64extern struct blackfin_pda cpu_pda[]; 65extern struct blackfin_pda cpu_pda[];
diff --git a/arch/blackfin/include/asm/reboot.h b/arch/blackfin/include/asm/reboot.h
index 4856d62b7467..ae1e36329bec 100644
--- a/arch/blackfin/include/asm/reboot.h
+++ b/arch/blackfin/include/asm/reboot.h
@@ -15,6 +15,6 @@ extern void native_machine_halt(void);
15extern void native_machine_power_off(void); 15extern void native_machine_power_off(void);
16 16
17/* common reboot workarounds */ 17/* common reboot workarounds */
18extern void bfin_gpio_reset_spi0_ssel1(void); 18extern void bfin_reset_boot_spi_cs(unsigned short pin);
19 19
20#endif 20#endif
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h
index e721ce55956c..2920087516f2 100644
--- a/arch/blackfin/include/asm/thread_info.h
+++ b/arch/blackfin/include/asm/thread_info.h
@@ -122,6 +122,7 @@ static inline struct thread_info *current_thread_info(void)
122#define TIF_MEMDIE 4 122#define TIF_MEMDIE 4
123#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ 123#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
124#define TIF_FREEZE 6 /* is freezing for suspend */ 124#define TIF_FREEZE 6 /* is freezing for suspend */
125#define TIF_IRQ_SYNC 7 /* sync pipeline stage */
125 126
126/* as above, but as bit values */ 127/* as above, but as bit values */
127#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 128#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
@@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void)
130#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 131#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
131#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 132#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
132#define _TIF_FREEZE (1<<TIF_FREEZE) 133#define _TIF_FREEZE (1<<TIF_FREEZE)
134#define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC)
133 135
134#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ 136#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
135 137
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 12:46:43 -0500