aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/include
diff options
context:
space:
mode:
authorDan Williams <dan.j.williams@intel.com>2009-09-08 20:55:21 -0400
committerDan Williams <dan.j.williams@intel.com>2009-09-08 20:55:21 -0400
commitbbb20089a3275a19e475dbc21320c3742e3ca423 (patch)
tree216fdc1cbef450ca688135c5b8969169482d9a48 /arch/blackfin/include
parent3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff)
parent657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff)
Merge branch 'dmaengine' into async-tx-next
Conflicts: crypto/async_tx/async_xor.c drivers/dma/ioat/dma_v2.h drivers/dma/ioat/pci.c drivers/md/raid5.c
Diffstat (limited to 'arch/blackfin/include')
-rw-r--r--arch/blackfin/include/asm/atomic.h111
-rw-r--r--arch/blackfin/include/asm/auxvec.h5
-rw-r--r--arch/blackfin/include/asm/bfin-global.h11
-rw-r--r--arch/blackfin/include/asm/bitops.h197
-rw-r--r--arch/blackfin/include/asm/bitsperlong.h1
-rw-r--r--arch/blackfin/include/asm/blackfin.h1
-rw-r--r--arch/blackfin/include/asm/bug.h57
-rw-r--r--arch/blackfin/include/asm/bugs.h17
-rw-r--r--arch/blackfin/include/asm/cache.h11
-rw-r--r--arch/blackfin/include/asm/cacheflush.h49
-rw-r--r--arch/blackfin/include/asm/cplb.h45
-rw-r--r--arch/blackfin/include/asm/cpu.h1
-rw-r--r--arch/blackfin/include/asm/cputime.h5
-rw-r--r--arch/blackfin/include/asm/current.h24
-rw-r--r--arch/blackfin/include/asm/device.h6
-rw-r--r--arch/blackfin/include/asm/dma-mapping.h13
-rw-r--r--arch/blackfin/include/asm/dma.h10
-rw-r--r--arch/blackfin/include/asm/elf.h86
-rw-r--r--arch/blackfin/include/asm/emergency-restart.h5
-rw-r--r--arch/blackfin/include/asm/entry.h92
-rw-r--r--arch/blackfin/include/asm/errno.h7
-rw-r--r--arch/blackfin/include/asm/fb.h13
-rw-r--r--arch/blackfin/include/asm/ftrace.h14
-rw-r--r--arch/blackfin/include/asm/futex.h5
-rw-r--r--arch/blackfin/include/asm/gptimers.h43
-rw-r--r--arch/blackfin/include/asm/hardirq.h42
-rw-r--r--arch/blackfin/include/asm/hw_irq.h7
-rw-r--r--arch/blackfin/include/asm/io.h30
-rw-r--r--arch/blackfin/include/asm/ioctls.h84
-rw-r--r--arch/blackfin/include/asm/ipcbuf.h31
-rw-r--r--arch/blackfin/include/asm/ipipe.h33
-rw-r--r--arch/blackfin/include/asm/ipipe_base.h30
-rw-r--r--arch/blackfin/include/asm/irq.h271
-rw-r--r--arch/blackfin/include/asm/irqflags.h215
-rw-r--r--arch/blackfin/include/asm/kmap_types.h22
-rw-r--r--arch/blackfin/include/asm/local.h5
-rw-r--r--arch/blackfin/include/asm/mem_init.h88
-rw-r--r--arch/blackfin/include/asm/mem_map.h97
-rw-r--r--arch/blackfin/include/asm/mman.h44
-rw-r--r--arch/blackfin/include/asm/msgbuf.h32
-rw-r--r--arch/blackfin/include/asm/mutex-dec.h112
-rw-r--r--arch/blackfin/include/asm/mutex.h2
-rw-r--r--arch/blackfin/include/asm/page.h85
-rw-r--r--arch/blackfin/include/asm/param.h23
-rw-r--r--arch/blackfin/include/asm/pda.h2
-rw-r--r--arch/blackfin/include/asm/percpu.h5
-rw-r--r--arch/blackfin/include/asm/pgalloc.h9
-rw-r--r--arch/blackfin/include/asm/poll.h21
-rw-r--r--arch/blackfin/include/asm/posix_types.h56
-rw-r--r--arch/blackfin/include/asm/processor.h39
-rw-r--r--arch/blackfin/include/asm/resource.h5
-rw-r--r--arch/blackfin/include/asm/sections.h11
-rw-r--r--arch/blackfin/include/asm/sembuf.h26
-rw-r--r--arch/blackfin/include/asm/serial.h6
-rw-r--r--arch/blackfin/include/asm/setup.h18
-rw-r--r--arch/blackfin/include/asm/shmbuf.h43
-rw-r--r--arch/blackfin/include/asm/shmparam.h7
-rw-r--r--arch/blackfin/include/asm/signal.h157
-rw-r--r--arch/blackfin/include/asm/socket.h60
-rw-r--r--arch/blackfin/include/asm/sockios.h14
-rw-r--r--arch/blackfin/include/asm/spinlock.h6
-rw-r--r--arch/blackfin/include/asm/statfs.h5
-rw-r--r--arch/blackfin/include/asm/swab.h6
-rw-r--r--arch/blackfin/include/asm/system.h8
-rw-r--r--arch/blackfin/include/asm/termbits.h199
-rw-r--r--arch/blackfin/include/asm/termios.h95
-rw-r--r--arch/blackfin/include/asm/time.h1
-rw-r--r--arch/blackfin/include/asm/tlbflush.h57
-rw-r--r--arch/blackfin/include/asm/topology.h5
-rw-r--r--arch/blackfin/include/asm/traps.h4
-rw-r--r--arch/blackfin/include/asm/types.h37
-rw-r--r--arch/blackfin/include/asm/uaccess.h54
-rw-r--r--arch/blackfin/include/asm/ucontext.h18
-rw-r--r--arch/blackfin/include/asm/unaligned.h12
-rw-r--r--arch/blackfin/include/asm/unistd.h4
-rw-r--r--arch/blackfin/include/asm/user.h90
76 files changed, 851 insertions, 2311 deletions
diff --git a/arch/blackfin/include/asm/atomic.h b/arch/blackfin/include/asm/atomic.h
index 94b2a9b19451..88f36d599fe8 100644
--- a/arch/blackfin/include/asm/atomic.h
+++ b/arch/blackfin/include/asm/atomic.h
@@ -1,24 +1,21 @@
1#ifndef __ARCH_BLACKFIN_ATOMIC__ 1#ifndef __ARCH_BLACKFIN_ATOMIC__
2#define __ARCH_BLACKFIN_ATOMIC__ 2#define __ARCH_BLACKFIN_ATOMIC__
3 3
4#ifndef CONFIG_SMP
5# include <asm-generic/atomic.h>
6#else
7
4#include <linux/types.h> 8#include <linux/types.h>
5#include <asm/system.h> /* local_irq_XXX() */ 9#include <asm/system.h> /* local_irq_XXX() */
6 10
7/* 11/*
8 * Atomic operations that C can't guarantee us. Useful for 12 * Atomic operations that C can't guarantee us. Useful for
9 * resource counting etc.. 13 * resource counting etc..
10 *
11 * Generally we do not concern about SMP BFIN systems, so we don't have
12 * to deal with that.
13 *
14 * Tony Kou (tonyko@lineo.ca) Lineo Inc. 2001
15 */ 14 */
16 15
17#define ATOMIC_INIT(i) { (i) } 16#define ATOMIC_INIT(i) { (i) }
18#define atomic_set(v, i) (((v)->counter) = i) 17#define atomic_set(v, i) (((v)->counter) = i)
19 18
20#ifdef CONFIG_SMP
21
22#define atomic_read(v) __raw_uncached_fetch_asm(&(v)->counter) 19#define atomic_read(v) __raw_uncached_fetch_asm(&(v)->counter)
23 20
24asmlinkage int __raw_uncached_fetch_asm(const volatile int *ptr); 21asmlinkage int __raw_uncached_fetch_asm(const volatile int *ptr);
@@ -84,100 +81,6 @@ static inline int atomic_test_mask(int mask, atomic_t *v)
84#define smp_mb__before_atomic_inc() barrier() 81#define smp_mb__before_atomic_inc() barrier()
85#define smp_mb__after_atomic_inc() barrier() 82#define smp_mb__after_atomic_inc() barrier()
86 83
87#else /* !CONFIG_SMP */
88
89#define atomic_read(v) ((v)->counter)
90
91static inline void atomic_add(int i, atomic_t *v)
92{
93 long flags;
94
95 local_irq_save_hw(flags);
96 v->counter += i;
97 local_irq_restore_hw(flags);
98}
99
100static inline void atomic_sub(int i, atomic_t *v)
101{
102 long flags;
103
104 local_irq_save_hw(flags);
105 v->counter -= i;
106 local_irq_restore_hw(flags);
107
108}
109
110static inline int atomic_add_return(int i, atomic_t *v)
111{
112 int __temp = 0;
113 long flags;
114
115 local_irq_save_hw(flags);
116 v->counter += i;
117 __temp = v->counter;
118 local_irq_restore_hw(flags);
119
120
121 return __temp;
122}
123
124static inline int atomic_sub_return(int i, atomic_t *v)
125{
126 int __temp = 0;
127 long flags;
128
129 local_irq_save_hw(flags);
130 v->counter -= i;
131 __temp = v->counter;
132 local_irq_restore_hw(flags);
133
134 return __temp;
135}
136
137static inline void atomic_inc(volatile atomic_t *v)
138{
139 long flags;
140
141 local_irq_save_hw(flags);
142 v->counter++;
143 local_irq_restore_hw(flags);
144}
145
146static inline void atomic_dec(volatile atomic_t *v)
147{
148 long flags;
149
150 local_irq_save_hw(flags);
151 v->counter--;
152 local_irq_restore_hw(flags);
153}
154
155static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
156{
157 long flags;
158
159 local_irq_save_hw(flags);
160 v->counter &= ~mask;
161 local_irq_restore_hw(flags);
162}
163
164static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
165{
166 long flags;
167
168 local_irq_save_hw(flags);
169 v->counter |= mask;
170 local_irq_restore_hw(flags);
171}
172
173/* Atomic operations are already serializing */
174#define smp_mb__before_atomic_dec() barrier()
175#define smp_mb__after_atomic_dec() barrier()
176#define smp_mb__before_atomic_inc() barrier()
177#define smp_mb__after_atomic_inc() barrier()
178
179#endif /* !CONFIG_SMP */
180
181#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) 84#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
182#define atomic_dec_return(v) atomic_sub_return(1,(v)) 85#define atomic_dec_return(v) atomic_sub_return(1,(v))
183#define atomic_inc_return(v) atomic_add_return(1,(v)) 86#define atomic_inc_return(v) atomic_add_return(1,(v))
@@ -208,6 +111,8 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
208#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) 111#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
209#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) 112#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
210 113
211#include <asm-generic/atomic.h> 114#include <asm-generic/atomic-long.h>
115
116#endif
212 117
213#endif /* __ARCH_BLACKFIN_ATOMIC __ */ 118#endif
diff --git a/arch/blackfin/include/asm/auxvec.h b/arch/blackfin/include/asm/auxvec.h
index 215506cd87b7..41fa68b71287 100644
--- a/arch/blackfin/include/asm/auxvec.h
+++ b/arch/blackfin/include/asm/auxvec.h
@@ -1,4 +1 @@
1#ifndef __ASMBFIN_AUXVEC_H #include <asm-generic/auxvec.h>
2#define __ASMBFIN_AUXVEC_H
3
4#endif
diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h
index daffc0684e75..e39277ea43e8 100644
--- a/arch/blackfin/include/asm/bfin-global.h
+++ b/arch/blackfin/include/asm/bfin-global.h
@@ -31,7 +31,7 @@
31 31
32#ifndef __ASSEMBLY__ 32#ifndef __ASSEMBLY__
33 33
34#include <asm-generic/sections.h> 34#include <asm/sections.h>
35#include <asm/ptrace.h> 35#include <asm/ptrace.h>
36#include <asm/user.h> 36#include <asm/user.h>
37#include <linux/linkage.h> 37#include <linux/linkage.h>
@@ -99,15 +99,6 @@ extern const char bfin_board_name[];
99extern unsigned long bfin_sic_iwr[]; 99extern unsigned long bfin_sic_iwr[];
100extern unsigned vr_wakeup; 100extern unsigned vr_wakeup;
101extern u16 _bfin_swrst; /* shadow for Software Reset Register (SWRST) */ 101extern u16 _bfin_swrst; /* shadow for Software Reset Register (SWRST) */
102extern unsigned long _ramstart, _ramend, _rambase;
103extern unsigned long memory_start, memory_end, physical_mem_end;
104extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[],
105 _ebss_l1[], _l1_lma_start[], _sdata_b_l1[], _sbss_b_l1[], _ebss_b_l1[],
106 _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[],
107 _ebss_l2[], _l2_lma_start[];
108
109/* only used when MTD_UCLINUX */
110extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size;
111 102
112#ifdef CONFIG_BFIN_ICACHE_LOCK 103#ifdef CONFIG_BFIN_ICACHE_LOCK
113extern void cache_grab_lock(int way); 104extern void cache_grab_lock(int way);
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h
index 21b036eadab1..daffa71576d4 100644
--- a/arch/blackfin/include/asm/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
@@ -1,26 +1,22 @@
1#ifndef _BLACKFIN_BITOPS_H 1#ifndef _BLACKFIN_BITOPS_H
2#define _BLACKFIN_BITOPS_H 2#define _BLACKFIN_BITOPS_H
3 3
4/* 4#ifndef CONFIG_SMP
5 * Copyright 1992, Linus Torvalds. 5# include <asm-generic/bitops.h>
6 */ 6#else
7
8#include <linux/compiler.h>
9#include <asm/byteorder.h> /* swab32 */
10
11#ifdef __KERNEL__
12 7
13#ifndef _LINUX_BITOPS_H 8#ifndef _LINUX_BITOPS_H
14#error only <linux/bitops.h> can be included directly 9#error only <linux/bitops.h> can be included directly
15#endif 10#endif
16 11
12#include <linux/compiler.h>
13#include <asm/byteorder.h> /* swab32 */
14
17#include <asm-generic/bitops/ffs.h> 15#include <asm-generic/bitops/ffs.h>
18#include <asm-generic/bitops/__ffs.h> 16#include <asm-generic/bitops/__ffs.h>
19#include <asm-generic/bitops/sched.h> 17#include <asm-generic/bitops/sched.h>
20#include <asm-generic/bitops/ffz.h> 18#include <asm-generic/bitops/ffz.h>
21 19
22#ifdef CONFIG_SMP
23
24#include <linux/linkage.h> 20#include <linux/linkage.h>
25 21
26asmlinkage int __raw_bit_set_asm(volatile unsigned long *addr, int nr); 22asmlinkage int __raw_bit_set_asm(volatile unsigned long *addr, int nr);
@@ -79,188 +75,13 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
79 return __raw_bit_test_toggle_asm(a, nr & 0x1f); 75 return __raw_bit_test_toggle_asm(a, nr & 0x1f);
80} 76}
81 77
82#else /* !CONFIG_SMP */
83
84#include <asm/system.h> /* save_flags */
85
86static inline void set_bit(int nr, volatile unsigned long *addr)
87{
88 int *a = (int *)addr;
89 int mask;
90 unsigned long flags;
91 a += nr >> 5;
92 mask = 1 << (nr & 0x1f);
93 local_irq_save_hw(flags);
94 *a |= mask;
95 local_irq_restore_hw(flags);
96}
97
98static inline void clear_bit(int nr, volatile unsigned long *addr)
99{
100 int *a = (int *)addr;
101 int mask;
102 unsigned long flags;
103 a += nr >> 5;
104 mask = 1 << (nr & 0x1f);
105 local_irq_save_hw(flags);
106 *a &= ~mask;
107 local_irq_restore_hw(flags);
108}
109
110static inline void change_bit(int nr, volatile unsigned long *addr)
111{
112 int mask, flags;
113 unsigned long *ADDR = (unsigned long *)addr;
114
115 ADDR += nr >> 5;
116 mask = 1 << (nr & 31);
117 local_irq_save_hw(flags);
118 *ADDR ^= mask;
119 local_irq_restore_hw(flags);
120}
121
122static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
123{
124 int mask, retval;
125 volatile unsigned int *a = (volatile unsigned int *)addr;
126 unsigned long flags;
127
128 a += nr >> 5;
129 mask = 1 << (nr & 0x1f);
130 local_irq_save_hw(flags);
131 retval = (mask & *a) != 0;
132 *a |= mask;
133 local_irq_restore_hw(flags);
134
135 return retval;
136}
137
138static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
139{
140 int mask, retval;
141 volatile unsigned int *a = (volatile unsigned int *)addr;
142 unsigned long flags;
143
144 a += nr >> 5;
145 mask = 1 << (nr & 0x1f);
146 local_irq_save_hw(flags);
147 retval = (mask & *a) != 0;
148 *a &= ~mask;
149 local_irq_restore_hw(flags);
150
151 return retval;
152}
153
154static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
155{
156 int mask, retval;
157 volatile unsigned int *a = (volatile unsigned int *)addr;
158 unsigned long flags;
159
160 a += nr >> 5;
161 mask = 1 << (nr & 0x1f);
162 local_irq_save_hw(flags);
163 retval = (mask & *a) != 0;
164 *a ^= mask;
165 local_irq_restore_hw(flags);
166 return retval;
167}
168
169#endif /* CONFIG_SMP */
170
171/* 78/*
172 * clear_bit() doesn't provide any barrier for the compiler. 79 * clear_bit() doesn't provide any barrier for the compiler.
173 */ 80 */
174#define smp_mb__before_clear_bit() barrier() 81#define smp_mb__before_clear_bit() barrier()
175#define smp_mb__after_clear_bit() barrier() 82#define smp_mb__after_clear_bit() barrier()
176 83
177static inline void __set_bit(int nr, volatile unsigned long *addr) 84#include <asm-generic/bitops/non-atomic.h>
178{
179 int *a = (int *)addr;
180 int mask;
181
182 a += nr >> 5;
183 mask = 1 << (nr & 0x1f);
184 *a |= mask;
185}
186
187static inline void __clear_bit(int nr, volatile unsigned long *addr)
188{
189 int *a = (int *)addr;
190 int mask;
191
192 a += nr >> 5;
193 mask = 1 << (nr & 0x1f);
194 *a &= ~mask;
195}
196
197static inline void __change_bit(int nr, volatile unsigned long *addr)
198{
199 int mask;
200 unsigned long *ADDR = (unsigned long *)addr;
201
202 ADDR += nr >> 5;
203 mask = 1 << (nr & 31);
204 *ADDR ^= mask;
205}
206
207static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
208{
209 int mask, retval;
210 volatile unsigned int *a = (volatile unsigned int *)addr;
211
212 a += nr >> 5;
213 mask = 1 << (nr & 0x1f);
214 retval = (mask & *a) != 0;
215 *a |= mask;
216 return retval;
217}
218
219static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
220{
221 int mask, retval;
222 volatile unsigned int *a = (volatile unsigned int *)addr;
223
224 a += nr >> 5;
225 mask = 1 << (nr & 0x1f);
226 retval = (mask & *a) != 0;
227 *a &= ~mask;
228 return retval;
229}
230
231static inline int __test_and_change_bit(int nr,
232 volatile unsigned long *addr)
233{
234 int mask, retval;
235 volatile unsigned int *a = (volatile unsigned int *)addr;
236
237 a += nr >> 5;
238 mask = 1 << (nr & 0x1f);
239 retval = (mask & *a) != 0;
240 *a ^= mask;
241 return retval;
242}
243
244static inline int __test_bit(int nr, const void *addr)
245{
246 int *a = (int *)addr;
247 int mask;
248
249 a += nr >> 5;
250 mask = 1 << (nr & 0x1f);
251 return ((mask & *a) != 0);
252}
253
254#ifndef CONFIG_SMP
255/*
256 * This routine doesn't need irq save and restore ops in UP
257 * context.
258 */
259static inline int test_bit(int nr, const void *addr)
260{
261 return __test_bit(nr, addr);
262}
263#endif
264 85
265#include <asm-generic/bitops/find.h> 86#include <asm-generic/bitops/find.h>
266#include <asm-generic/bitops/hweight.h> 87#include <asm-generic/bitops/hweight.h>
@@ -271,10 +92,10 @@ static inline int test_bit(int nr, const void *addr)
271 92
272#include <asm-generic/bitops/minix.h> 93#include <asm-generic/bitops/minix.h>
273 94
274#endif /* __KERNEL__ */
275
276#include <asm-generic/bitops/fls.h> 95#include <asm-generic/bitops/fls.h>
277#include <asm-generic/bitops/__fls.h> 96#include <asm-generic/bitops/__fls.h>
278#include <asm-generic/bitops/fls64.h> 97#include <asm-generic/bitops/fls64.h>
279 98
99#endif /* CONFIG_SMP */
100
280#endif /* _BLACKFIN_BITOPS_H */ 101#endif /* _BLACKFIN_BITOPS_H */
diff --git a/arch/blackfin/include/asm/bitsperlong.h b/arch/blackfin/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/blackfin/include/asm/bitsperlong.h
@@ -0,0 +1 @@
#include <asm-generic/bitsperlong.h>
diff --git a/arch/blackfin/include/asm/blackfin.h b/arch/blackfin/include/asm/blackfin.h
index 8bb2cb139756..4d4439583396 100644
--- a/arch/blackfin/include/asm/blackfin.h
+++ b/arch/blackfin/include/asm/blackfin.h
@@ -86,6 +86,7 @@ static inline void CSYNC(void)
86 86
87#endif /* __ASSEMBLY__ */ 87#endif /* __ASSEMBLY__ */
88 88
89#include <asm/mem_map.h>
89#include <mach/blackfin.h> 90#include <mach/blackfin.h>
90#include <asm/bfin-global.h> 91#include <asm/bfin-global.h>
91 92
diff --git a/arch/blackfin/include/asm/bug.h b/arch/blackfin/include/asm/bug.h
index 6d3e11b1fc57..655e49540e41 100644
--- a/arch/blackfin/include/asm/bug.h
+++ b/arch/blackfin/include/asm/bug.h
@@ -2,13 +2,58 @@
2#define _BLACKFIN_BUG_H 2#define _BLACKFIN_BUG_H
3 3
4#ifdef CONFIG_BUG 4#ifdef CONFIG_BUG
5#define HAVE_ARCH_BUG
6 5
7#define BUG() do { \ 6#define BFIN_BUG_OPCODE 0xefcd
8 dump_bfin_trace_buffer(); \ 7
9 printk(KERN_EMERG "BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \ 8#ifdef CONFIG_DEBUG_BUGVERBOSE
10 panic("BUG!"); \ 9
11} while (0) 10#define _BUG_OR_WARN(flags) \
11 asm volatile( \
12 "1: .hword %0\n" \
13 " .section __bug_table,\"a\",@progbits\n" \
14 "2: .long 1b\n" \
15 " .long %1\n" \
16 " .short %2\n" \
17 " .short %3\n" \
18 " .org 2b + %4\n" \
19 " .previous" \
20 : \
21 : "i"(BFIN_BUG_OPCODE), "i"(__FILE__), \
22 "i"(__LINE__), "i"(flags), \
23 "i"(sizeof(struct bug_entry)))
24
25#else
26
27#define _BUG_OR_WARN(flags) \
28 asm volatile( \
29 "1: .hword %0\n" \
30 " .section __bug_table,\"a\",@progbits\n" \
31 "2: .long 1b\n" \
32 " .short %1\n" \
33 " .org 2b + %2\n" \
34 " .previous" \
35 : \
36 : "i"(BFIN_BUG_OPCODE), "i"(flags), \
37 "i"(sizeof(struct bug_entry)))
38
39#endif /* CONFIG_DEBUG_BUGVERBOSE */
40
41#define BUG() \
42 do { \
43 _BUG_OR_WARN(0); \
44 for (;;); \
45 } while (0)
46
47#define WARN_ON(condition) \
48 ({ \
49 int __ret_warn_on = !!(condition); \
50 if (unlikely(__ret_warn_on)) \
51 _BUG_OR_WARN(BUGFLAG_WARNING); \
52 unlikely(__ret_warn_on); \
53 })
54
55#define HAVE_ARCH_BUG
56#define HAVE_ARCH_WARN_ON
12 57
13#endif 58#endif
14 59
diff --git a/arch/blackfin/include/asm/bugs.h b/arch/blackfin/include/asm/bugs.h
index 9093c9c1fb81..61791e1ad9f5 100644
--- a/arch/blackfin/include/asm/bugs.h
+++ b/arch/blackfin/include/asm/bugs.h
@@ -1,16 +1 @@
1/* #include <asm-generic/bugs.h>
2 * include/asm-blackfin/bugs.h
3 *
4 * Copyright (C) 1994 Linus Torvalds
5 */
6
7/*
8 * This is included by init/main.c to check for architecture-dependent bugs.
9 *
10 * Needs:
11 * void check_bugs(void);
12 */
13
14static void check_bugs(void)
15{
16}
diff --git a/arch/blackfin/include/asm/cache.h b/arch/blackfin/include/asm/cache.h
index 86637814cf25..477050ad5c53 100644
--- a/arch/blackfin/include/asm/cache.h
+++ b/arch/blackfin/include/asm/cache.h
@@ -34,9 +34,13 @@
34#define L1_CACHE_SHIFT_MAX 5 34#define L1_CACHE_SHIFT_MAX 5
35 35
36#if defined(CONFIG_SMP) && \ 36#if defined(CONFIG_SMP) && \
37 !defined(CONFIG_BFIN_CACHE_COHERENT) && \ 37 !defined(CONFIG_BFIN_CACHE_COHERENT)
38 defined(CONFIG_BFIN_DCACHE) 38# if defined(CONFIG_BFIN_ICACHEABLE) || defined(CONFIG_BFIN_L2_ICACHEABLE)
39#define __ARCH_SYNC_CORE_DCACHE 39# define __ARCH_SYNC_CORE_ICACHE
40# endif
41# if defined(CONFIG_BFIN_DCACHEABLE) || defined(CONFIG_BFIN_L2_DCACHEABLE)
42# define __ARCH_SYNC_CORE_DCACHE
43# endif
40#ifndef __ASSEMBLY__ 44#ifndef __ASSEMBLY__
41asmlinkage void __raw_smp_mark_barrier_asm(void); 45asmlinkage void __raw_smp_mark_barrier_asm(void);
42asmlinkage void __raw_smp_check_barrier_asm(void); 46asmlinkage void __raw_smp_check_barrier_asm(void);
@@ -51,6 +55,7 @@ static inline void smp_check_barrier(void)
51} 55}
52 56
53void resync_core_dcache(void); 57void resync_core_dcache(void);
58void resync_core_icache(void);
54#endif 59#endif
55#endif 60#endif
56 61
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h
index 1b040f5b4feb..7e55549e180f 100644
--- a/arch/blackfin/include/asm/cacheflush.h
+++ b/arch/blackfin/include/asm/cacheflush.h
@@ -30,12 +30,14 @@
30#ifndef _BLACKFIN_CACHEFLUSH_H 30#ifndef _BLACKFIN_CACHEFLUSH_H
31#define _BLACKFIN_CACHEFLUSH_H 31#define _BLACKFIN_CACHEFLUSH_H
32 32
33extern void blackfin_icache_dcache_flush_range(unsigned long start_address, unsigned long end_address); 33#include <asm/blackfin.h> /* for SSYNC() */
34
34extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address); 35extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address);
35extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address); 36extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address);
36extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address); 37extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address);
37extern void blackfin_dflush_page(void *page); 38extern void blackfin_dflush_page(void *page);
38extern void blackfin_invalidate_entire_dcache(void); 39extern void blackfin_invalidate_entire_dcache(void);
40extern void blackfin_invalidate_entire_icache(void);
39 41
40#define flush_dcache_mmap_lock(mapping) do { } while (0) 42#define flush_dcache_mmap_lock(mapping) do { } while (0)
41#define flush_dcache_mmap_unlock(mapping) do { } while (0) 43#define flush_dcache_mmap_unlock(mapping) do { } while (0)
@@ -54,32 +56,28 @@ extern void blackfin_invalidate_entire_dcache(void);
54 56
55static inline void flush_icache_range(unsigned start, unsigned end) 57static inline void flush_icache_range(unsigned start, unsigned end)
56{ 58{
57#if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_ICACHE) 59#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
58 60 blackfin_dcache_flush_range(start, end);
59# if defined(CONFIG_BFIN_WT) 61#endif
60 blackfin_icache_flush_range((start), (end));
61 flush_icache_range_others(start, end);
62# else
63 blackfin_icache_dcache_flush_range((start), (end));
64# endif
65
66#else
67 62
68# if defined(CONFIG_BFIN_ICACHE) 63 /* Make sure all write buffers in the data side of the core
69 blackfin_icache_flush_range((start), (end)); 64 * are flushed before trying to invalidate the icache. This
65 * needs to be after the data flush and before the icache
66 * flush so that the SSYNC does the right thing in preventing
67 * the instruction prefetcher from hitting things in cached
68 * memory at the wrong time -- it runs much further ahead than
69 * the pipeline.
70 */
71 SSYNC();
72#if defined(CONFIG_BFIN_ICACHE)
73 blackfin_icache_flush_range(start, end);
70 flush_icache_range_others(start, end); 74 flush_icache_range_others(start, end);
71# endif
72# if defined(CONFIG_BFIN_DCACHE)
73 blackfin_dcache_flush_range((start), (end));
74# endif
75
76#endif 75#endif
77} 76}
78 77
79#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 78#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
80do { memcpy(dst, src, len); \ 79do { memcpy(dst, src, len); \
81 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \ 80 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
82 flush_icache_range_others((unsigned long) (dst), (unsigned long) (dst) + (len));\
83} while (0) 81} while (0)
84 82
85#define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len) 83#define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len)
@@ -89,9 +87,9 @@ do { memcpy(dst, src, len); \
89#else 87#else
90# define invalidate_dcache_range(start,end) do { } while (0) 88# define invalidate_dcache_range(start,end) do { } while (0)
91#endif 89#endif
92#if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_WB) 90#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
93# define flush_dcache_range(start,end) blackfin_dcache_flush_range((start), (end)) 91# define flush_dcache_range(start,end) blackfin_dcache_flush_range((start), (end))
94# define flush_dcache_page(page) blackfin_dflush_page(page_address(page)) 92# define flush_dcache_page(page) blackfin_dflush_page(page_address(page))
95#else 93#else
96# define flush_dcache_range(start,end) do { } while (0) 94# define flush_dcache_range(start,end) do { } while (0)
97# define flush_dcache_page(page) do { } while (0) 95# define flush_dcache_page(page) do { } while (0)
@@ -100,9 +98,9 @@ do { memcpy(dst, src, len); \
100extern unsigned long reserved_mem_dcache_on; 98extern unsigned long reserved_mem_dcache_on;
101extern unsigned long reserved_mem_icache_on; 99extern unsigned long reserved_mem_icache_on;
102 100
103static inline int bfin_addr_dcachable(unsigned long addr) 101static inline int bfin_addr_dcacheable(unsigned long addr)
104{ 102{
105#ifdef CONFIG_BFIN_DCACHE 103#ifdef CONFIG_BFIN_EXTMEM_DCACHEABLE
106 if (addr < (_ramend - DMA_UNCACHED_REGION)) 104 if (addr < (_ramend - DMA_UNCACHED_REGION))
107 return 1; 105 return 1;
108#endif 106#endif
@@ -111,6 +109,11 @@ static inline int bfin_addr_dcachable(unsigned long addr)
111 addr >= _ramend && addr < physical_mem_end) 109 addr >= _ramend && addr < physical_mem_end)
112 return 1; 110 return 1;
113 111
112#ifdef CONFIG_BFIN_L2_DCACHEABLE
113 if (addr >= L2_START && addr < L2_START + L2_LENGTH)
114 return 1;
115#endif
116
114 return 0; 117 return 0;
115} 118}
116 119
diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h
index ad566ff9ad16..c5dacf8f8cf9 100644
--- a/arch/blackfin/include/asm/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
@@ -37,8 +37,6 @@
37#define L1_IMEMORY ( CPLB_USER_RD | CPLB_VALID | CPLB_LOCK) 37#define L1_IMEMORY ( CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
38#define SDRAM_INON_CHBL ( CPLB_USER_RD | CPLB_VALID) 38#define SDRAM_INON_CHBL ( CPLB_USER_RD | CPLB_VALID)
39 39
40/*Use the menuconfig cache policy here - CONFIG_BFIN_WT/CONFIG_BFIN_WB*/
41
42#if ANOMALY_05000158 40#if ANOMALY_05000158
43#define ANOMALY_05000158_WORKAROUND 0x200 41#define ANOMALY_05000158_WORKAROUND 0x200
44#else 42#else
@@ -47,35 +45,42 @@
47 45
48#define CPLB_COMMON (CPLB_DIRTY | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND) 46#define CPLB_COMMON (CPLB_DIRTY | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
49 47
50#ifdef CONFIG_BFIN_WB /*Write Back Policy */ 48#ifdef CONFIG_BFIN_EXTMEM_WRITEBACK
51#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_COMMON) 49#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_COMMON)
52#else /*Write Through */ 50#elif defined(CONFIG_BFIN_EXTMEM_WRITETHROUGH)
53#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON) 51#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON)
52#else
53#define SDRAM_DGENERIC (CPLB_COMMON)
54#endif 54#endif
55 55
56#define SDRAM_DNON_CHBL (CPLB_COMMON)
57#define SDRAM_EBIU (CPLB_COMMON)
58#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
59
56#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON) 60#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
57 61
58#ifdef CONFIG_SMP 62#ifdef CONFIG_SMP
59#define L2_ATTR (INITIAL_T | I_CPLB | D_CPLB) 63#define L2_ATTR (INITIAL_T | I_CPLB | D_CPLB)
60#define L2_IMEMORY (CPLB_COMMON | CPLB_LOCK) 64#define L2_IMEMORY (CPLB_COMMON | PAGE_SIZE_1MB)
61#define L2_DMEMORY (CPLB_COMMON | CPLB_LOCK) 65#define L2_DMEMORY (CPLB_LOCK | CPLB_COMMON | PAGE_SIZE_1MB)
62 66
63#else 67#else
64#ifdef CONFIG_BFIN_L2_CACHEABLE 68#define L2_ATTR (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB)
65#define L2_IMEMORY (SDRAM_IGENERIC) 69# if defined(CONFIG_BFIN_L2_ICACHEABLE)
66#define L2_DMEMORY (SDRAM_DGENERIC) 70# define L2_IMEMORY (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | PAGE_SIZE_1MB)
67#else 71# else
68#define L2_IMEMORY (CPLB_COMMON) 72# define L2_IMEMORY ( CPLB_USER_RD | CPLB_VALID | PAGE_SIZE_1MB)
69#define L2_DMEMORY (CPLB_COMMON) 73# endif
70#endif /* CONFIG_BFIN_L2_CACHEABLE */ 74
71 75# if defined(CONFIG_BFIN_L2_WRITEBACK)
72#define L2_ATTR (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB) 76# define L2_DMEMORY (CPLB_L1_CHBL | CPLB_COMMON | PAGE_SIZE_1MB)
77# elif defined(CONFIG_BFIN_L2_WRITETHROUGH)
78# define L2_DMEMORY (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON | PAGE_SIZE_1MB)
79# else
80# define L2_DMEMORY (CPLB_COMMON | PAGE_SIZE_1MB)
81# endif
73#endif /* CONFIG_SMP */ 82#endif /* CONFIG_SMP */
74 83
75#define SDRAM_DNON_CHBL (CPLB_COMMON)
76#define SDRAM_EBIU (CPLB_COMMON)
77#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
78
79#define SIZE_1K 0x00000400 /* 1K */ 84#define SIZE_1K 0x00000400 /* 1K */
80#define SIZE_4K 0x00001000 /* 4K */ 85#define SIZE_4K 0x00001000 /* 4K */
81#define SIZE_1M 0x00100000 /* 1M */ 86#define SIZE_1M 0x00100000 /* 1M */
diff --git a/arch/blackfin/include/asm/cpu.h b/arch/blackfin/include/asm/cpu.h
index c2594ef877f6..565b8136855e 100644
--- a/arch/blackfin/include/asm/cpu.h
+++ b/arch/blackfin/include/asm/cpu.h
@@ -34,6 +34,7 @@ struct blackfin_cpudata {
34 unsigned int dmemctl; 34 unsigned int dmemctl;
35 unsigned long loops_per_jiffy; 35 unsigned long loops_per_jiffy;
36 unsigned long dcache_invld_count; 36 unsigned long dcache_invld_count;
37 unsigned long icache_invld_count;
37}; 38};
38 39
39DECLARE_PER_CPU(struct blackfin_cpudata, cpu_data); 40DECLARE_PER_CPU(struct blackfin_cpudata, cpu_data);
diff --git a/arch/blackfin/include/asm/cputime.h b/arch/blackfin/include/asm/cputime.h
index 2b19705f9885..6d68ad7e0ea3 100644
--- a/arch/blackfin/include/asm/cputime.h
+++ b/arch/blackfin/include/asm/cputime.h
@@ -1,6 +1 @@
1#ifndef __BLACKFIN_CPUTIME_H
2#define __BLACKFIN_CPUTIME_H
3
4#include <asm-generic/cputime.h> #include <asm-generic/cputime.h>
5
6#endif /* __BLACKFIN_CPUTIME_H */
diff --git a/arch/blackfin/include/asm/current.h b/arch/blackfin/include/asm/current.h
index 31918d29122c..4c51401b5537 100644
--- a/arch/blackfin/include/asm/current.h
+++ b/arch/blackfin/include/asm/current.h
@@ -1,23 +1 @@
1#ifndef _BLACKFIN_CURRENT_H #include <asm-generic/current.h>
2#define _BLACKFIN_CURRENT_H
3/*
4 * current.h
5 * (C) Copyright 2000, Lineo, David McCullough <davidm@lineo.com>
6 *
7 * rather than dedicate a register (as the m68k source does), we
8 * just keep a global, we should probably just change it all to be
9 * current and lose _current_task.
10 */
11#include <linux/thread_info.h>
12
13struct task_struct;
14
15static inline struct task_struct *get_current(void) __attribute__ ((__const__));
16static inline struct task_struct *get_current(void)
17{
18 return (current_thread_info()->task);
19}
20
21#define current (get_current())
22
23#endif /* _BLACKFIN_CURRENT_H */
diff --git a/arch/blackfin/include/asm/device.h b/arch/blackfin/include/asm/device.h
index d8f9872b0e2d..f0a4c256403b 100644
--- a/arch/blackfin/include/asm/device.h
+++ b/arch/blackfin/include/asm/device.h
@@ -1,7 +1 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h> #include <asm-generic/device.h>
7
diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h
index d7d9148e433c..ed6b1f3cccce 100644
--- a/arch/blackfin/include/asm/dma-mapping.h
+++ b/arch/blackfin/include/asm/dma-mapping.h
@@ -95,4 +95,17 @@ static inline void dma_sync_single_for_device(struct device *dev,
95 enum dma_data_direction dir) 95 enum dma_data_direction dir)
96{ 96{
97} 97}
98
99static inline void dma_sync_sg_for_cpu(struct device *dev,
100 struct scatterlist *sg,
101 int nents, enum dma_data_direction dir)
102{
103}
104
105static inline void dma_sync_sg_for_device(struct device *dev,
106 struct scatterlist *sg,
107 int nents, enum dma_data_direction dir)
108{
109}
110
98#endif /* _BLACKFIN_DMA_MAPPING_H */ 111#endif /* _BLACKFIN_DMA_MAPPING_H */
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index e4f7b8043f02..c9a59622e23f 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -206,10 +206,16 @@ static inline unsigned long get_dma_curr_addr(unsigned int channel)
206 206
207static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize) 207static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize)
208{ 208{
209 /* Make sure the internal data buffers in the core are drained
210 * so that the DMA descriptors are completely written when the
211 * DMA engine goes to fetch them below.
212 */
213 SSYNC();
214
215 dma_ch[channel].regs->next_desc_ptr = sg;
209 dma_ch[channel].regs->cfg = 216 dma_ch[channel].regs->cfg =
210 (dma_ch[channel].regs->cfg & ~(0xf << 8)) | 217 (dma_ch[channel].regs->cfg & ~(0xf << 8)) |
211 ((ndsize & 0xf) << 8); 218 ((ndsize & 0xf) << 8);
212 dma_ch[channel].regs->next_desc_ptr = sg;
213} 219}
214 220
215static inline int dma_channel_active(unsigned int channel) 221static inline int dma_channel_active(unsigned int channel)
@@ -253,5 +259,7 @@ static inline void clear_dma_irqstat(unsigned int channel)
253void *dma_memcpy(void *dest, const void *src, size_t count); 259void *dma_memcpy(void *dest, const void *src, size_t count);
254void *safe_dma_memcpy(void *dest, const void *src, size_t count); 260void *safe_dma_memcpy(void *dest, const void *src, size_t count);
255void blackfin_dma_early_init(void); 261void blackfin_dma_early_init(void);
262void early_dma_memcpy(void *dest, const void *src, size_t count);
263void early_dma_memcpy_done(void);
256 264
257#endif 265#endif
diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h
index cdbfcfc30f6a..5a87baf0659d 100644
--- a/arch/blackfin/include/asm/elf.h
+++ b/arch/blackfin/include/asm/elf.h
@@ -20,7 +20,7 @@
20 20
21typedef unsigned long elf_greg_t; 21typedef unsigned long elf_greg_t;
22 22
23#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) 23#define ELF_NGREG 40 /* (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) */
24typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 24typedef elf_greg_t elf_gregset_t[ELF_NGREG];
25 25
26typedef struct user_bfinfp_struct elf_fpregset_t; 26typedef struct user_bfinfp_struct elf_fpregset_t;
@@ -55,50 +55,50 @@ do { \
55#define ELF_FDPIC_CORE_EFLAGS EF_BFIN_FDPIC 55#define ELF_FDPIC_CORE_EFLAGS EF_BFIN_FDPIC
56#define ELF_EXEC_PAGESIZE 4096 56#define ELF_EXEC_PAGESIZE 4096
57 57
58#define R_unused0 0 /* relocation type 0 is not defined */ 58#define R_BFIN_UNUSED0 0 /* relocation type 0 is not defined */
59#define R_pcrel5m2 1 /*LSETUP part a */ 59#define R_BFIN_PCREL5M2 1 /* LSETUP part a */
60#define R_unused1 2 /* relocation type 2 is not defined */ 60#define R_BFIN_UNUSED1 2 /* relocation type 2 is not defined */
61#define R_pcrel10 3 /* type 3, if cc jump <target> */ 61#define R_BFIN_PCREL10 3 /* type 3, if cc jump <target> */
62#define R_pcrel12_jump 4 /* type 4, jump <target> */ 62#define R_BFIN_PCREL12_JUMP 4 /* type 4, jump <target> */
63#define R_rimm16 5 /* type 0x5, rN = <target> */ 63#define R_BFIN_RIMM16 5 /* type 0x5, rN = <target> */
64#define R_luimm16 6 /* # 0x6, preg.l=<target> Load imm 16 to lower half */ 64#define R_BFIN_LUIMM16 6 /* # 0x6, preg.l=<target> Load imm 16 to lower half */
65#define R_huimm16 7 /* # 0x7, preg.h=<target> Load imm 16 to upper half */ 65#define R_BFIN_HUIMM16 7 /* # 0x7, preg.h=<target> Load imm 16 to upper half */
66#define R_pcrel12_jump_s 8 /* # 0x8 jump.s <target> */ 66#define R_BFIN_PCREL12_JUMP_S 8 /* # 0x8 jump.s <target> */
67#define R_pcrel24_jump_x 9 /* # 0x9 jump.x <target> */ 67#define R_BFIN_PCREL24_JUMP_X 9 /* # 0x9 jump.x <target> */
68#define R_pcrel24 10 /* # 0xa call <target> , not expandable */ 68#define R_BFIN_PCREL24 10 /* # 0xa call <target> , not expandable */
69#define R_unusedb 11 /* # 0xb not generated */ 69#define R_BFIN_UNUSEDB 11 /* # 0xb not generated */
70#define R_unusedc 12 /* # 0xc not used */ 70#define R_BFIN_UNUSEDC 12 /* # 0xc not used */
71#define R_pcrel24_jump_l 13 /*0xd jump.l <target> */ 71#define R_BFIN_PCREL24_JUMP_L 13 /* 0xd jump.l <target> */
72#define R_pcrel24_call_x 14 /* 0xE, call.x <target> if <target> is above 24 bit limit call through P1 */ 72#define R_BFIN_PCREL24_CALL_X 14 /* 0xE, call.x <target> if <target> is above 24 bit limit call through P1 */
73#define R_var_eq_symb 15 /* 0xf, linker should treat it same as 0x12 */ 73#define R_BFIN_VAR_EQ_SYMB 15 /* 0xf, linker should treat it same as 0x12 */
74#define R_byte_data 16 /* 0x10, .byte var = symbol */ 74#define R_BFIN_BYTE_DATA 16 /* 0x10, .byte var = symbol */
75#define R_byte2_data 17 /* 0x11, .byte2 var = symbol */ 75#define R_BFIN_BYTE2_DATA 17 /* 0x11, .byte2 var = symbol */
76#define R_byte4_data 18 /* 0x12, .byte4 var = symbol and .var var=symbol */ 76#define R_BFIN_BYTE4_DATA 18 /* 0x12, .byte4 var = symbol and .var var=symbol */
77#define R_pcrel11 19 /* 0x13, lsetup part b */ 77#define R_BFIN_PCREL11 19 /* 0x13, lsetup part b */
78#define R_unused14 20 /* 0x14, undefined */ 78#define R_BFIN_UNUSED14 20 /* 0x14, undefined */
79#define R_unused15 21 /* not generated by VDSP 3.5 */ 79#define R_BFIN_UNUSED15 21 /* not generated by VDSP 3.5 */
80 80
81/* arithmetic relocations */ 81/* arithmetic relocations */
82#define R_push 0xE0 82#define R_BFIN_PUSH 0xE0
83#define R_const 0xE1 83#define R_BFIN_CONST 0xE1
84#define R_add 0xE2 84#define R_BFIN_ADD 0xE2
85#define R_sub 0xE3 85#define R_BFIN_SUB 0xE3
86#define R_mult 0xE4 86#define R_BFIN_MULT 0xE4
87#define R_div 0xE5 87#define R_BFIN_DIV 0xE5
88#define R_mod 0xE6 88#define R_BFIN_MOD 0xE6
89#define R_lshift 0xE7 89#define R_BFIN_LSHIFT 0xE7
90#define R_rshift 0xE8 90#define R_BFIN_RSHIFT 0xE8
91#define R_and 0xE9 91#define R_BFIN_AND 0xE9
92#define R_or 0xEA 92#define R_BFIN_OR 0xEA
93#define R_xor 0xEB 93#define R_BFIN_XOR 0xEB
94#define R_land 0xEC 94#define R_BFIN_LAND 0xEC
95#define R_lor 0xED 95#define R_BFIN_LOR 0xED
96#define R_len 0xEE 96#define R_BFIN_LEN 0xEE
97#define R_neg 0xEF 97#define R_BFIN_NEG 0xEF
98#define R_comp 0xF0 98#define R_BFIN_COMP 0xF0
99#define R_page 0xF1 99#define R_BFIN_PAGE 0xF1
100#define R_hwpage 0xF2 100#define R_BFIN_HWPAGE 0xF2
101#define R_addr 0xF3 101#define R_BFIN_ADDR 0xF3
102 102
103/* This is the location that an ET_DYN program is loaded if exec'ed. Typical 103/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
104 use of this is to invoke "./ld.so someprog" to test out a new version of 104 use of this is to invoke "./ld.so someprog" to test out a new version of
diff --git a/arch/blackfin/include/asm/emergency-restart.h b/arch/blackfin/include/asm/emergency-restart.h
index 27f6c785d103..3711bd9d50bd 100644
--- a/arch/blackfin/include/asm/emergency-restart.h
+++ b/arch/blackfin/include/asm/emergency-restart.h
@@ -1,6 +1 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h> #include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/blackfin/include/asm/entry.h b/arch/blackfin/include/asm/entry.h
index b30a2968e274..ec58efc130e6 100644
--- a/arch/blackfin/include/asm/entry.h
+++ b/arch/blackfin/include/asm/entry.h
@@ -35,21 +35,39 @@
35#else 35#else
36# define LOAD_IPIPE_IPEND 36# define LOAD_IPIPE_IPEND
37#endif 37#endif
38
39#ifndef CONFIG_EXACT_HWERR
40/* As a debugging aid - we save IPEND when DEBUG_KERNEL is on,
41 * otherwise it is a waste of cycles.
42 */
43# ifndef CONFIG_DEBUG_KERNEL
44#define INTERRUPT_ENTRY(N) \
45 [--sp] = SYSCFG; \
46 [--sp] = P0; /*orig_p0*/ \
47 [--sp] = R0; /*orig_r0*/ \
48 [--sp] = (R7:0,P5:0); \
49 R0 = (N); \
50 LOAD_IPIPE_IPEND \
51 jump __common_int_entry;
52# else /* CONFIG_DEBUG_KERNEL */
38#define INTERRUPT_ENTRY(N) \ 53#define INTERRUPT_ENTRY(N) \
39 [--sp] = SYSCFG; \ 54 [--sp] = SYSCFG; \
40 \
41 [--sp] = P0; /*orig_p0*/ \ 55 [--sp] = P0; /*orig_p0*/ \
42 [--sp] = R0; /*orig_r0*/ \ 56 [--sp] = R0; /*orig_r0*/ \
43 [--sp] = (R7:0,P5:0); \ 57 [--sp] = (R7:0,P5:0); \
58 p0.l = lo(IPEND); \
59 p0.h = hi(IPEND); \
60 r1 = [p0]; \
44 R0 = (N); \ 61 R0 = (N); \
45 LOAD_IPIPE_IPEND \ 62 LOAD_IPIPE_IPEND \
46 jump __common_int_entry; 63 jump __common_int_entry;
64# endif /* CONFIG_DEBUG_KERNEL */
47 65
48/* For timer interrupts, we need to save IPEND, since the user_mode 66/* For timer interrupts, we need to save IPEND, since the user_mode
49 macro accesses it to determine where to account time. */ 67 *macro accesses it to determine where to account time.
68 */
50#define TIMER_INTERRUPT_ENTRY(N) \ 69#define TIMER_INTERRUPT_ENTRY(N) \
51 [--sp] = SYSCFG; \ 70 [--sp] = SYSCFG; \
52 \
53 [--sp] = P0; /*orig_p0*/ \ 71 [--sp] = P0; /*orig_p0*/ \
54 [--sp] = R0; /*orig_r0*/ \ 72 [--sp] = R0; /*orig_r0*/ \
55 [--sp] = (R7:0,P5:0); \ 73 [--sp] = (R7:0,P5:0); \
@@ -58,6 +76,74 @@
58 r1 = [p0]; \ 76 r1 = [p0]; \
59 R0 = (N); \ 77 R0 = (N); \
60 jump __common_int_entry; 78 jump __common_int_entry;
79#else /* CONFIG_EXACT_HWERR is defined */
80
81/* if we want hardware error to be exact, we need to do a SSYNC (which forces
82 * read/writes to complete to the memory controllers), and check to see that
83 * caused a pending HW error condition. If so, we assume it was caused by user
84 * space, by setting the same interrupt that we are in (so it goes off again)
85 * and context restore, and a RTI (without servicing anything). This should
86 * cause the pending HWERR to fire, and when that is done, this interrupt will
87 * be re-serviced properly.
88 * As you can see by the code - we actually need to do two SSYNCS - one to
89 * make sure the read/writes complete, and another to make sure the hardware
90 * error is recognized by the core.
91 */
92#define INTERRUPT_ENTRY(N) \
93 SSYNC; \
94 SSYNC; \
95 [--sp] = SYSCFG; \
96 [--sp] = P0; /*orig_p0*/ \
97 [--sp] = R0; /*orig_r0*/ \
98 [--sp] = (R7:0,P5:0); \
99 R1 = ASTAT; \
100 P0.L = LO(ILAT); \
101 P0.H = HI(ILAT); \
102 R0 = [P0]; \
103 CC = BITTST(R0, EVT_IVHW_P); \
104 IF CC JUMP 1f; \
105 ASTAT = R1; \
106 p0.l = lo(IPEND); \
107 p0.h = hi(IPEND); \
108 r1 = [p0]; \
109 R0 = (N); \
110 LOAD_IPIPE_IPEND \
111 jump __common_int_entry; \
1121: ASTAT = R1; \
113 RAISE N; \
114 (R7:0, P5:0) = [SP++]; \
115 SP += 0x8; \
116 SYSCFG = [SP++]; \
117 CSYNC; \
118 RTI;
119
120#define TIMER_INTERRUPT_ENTRY(N) \
121 SSYNC; \
122 SSYNC; \
123 [--sp] = SYSCFG; \
124 [--sp] = P0; /*orig_p0*/ \
125 [--sp] = R0; /*orig_r0*/ \
126 [--sp] = (R7:0,P5:0); \
127 R1 = ASTAT; \
128 P0.L = LO(ILAT); \
129 P0.H = HI(ILAT); \
130 R0 = [P0]; \
131 CC = BITTST(R0, EVT_IVHW_P); \
132 IF CC JUMP 1f; \
133 ASTAT = R1; \
134 p0.l = lo(IPEND); \
135 p0.h = hi(IPEND); \
136 r1 = [p0]; \
137 R0 = (N); \
138 jump __common_int_entry; \
1391: ASTAT = R1; \
140 RAISE N; \
141 (R7:0, P5:0) = [SP++]; \
142 SP += 0x8; \
143 SYSCFG = [SP++]; \
144 CSYNC; \
145 RTI;
146#endif /* CONFIG_EXACT_HWERR */
61 147
62/* This one pushes RETI without using CLI. Interrupts are enabled. */ 148/* This one pushes RETI without using CLI. Interrupts are enabled. */
63#define SAVE_CONTEXT_SYSCALL save_context_syscall 149#define SAVE_CONTEXT_SYSCALL save_context_syscall
diff --git a/arch/blackfin/include/asm/errno.h b/arch/blackfin/include/asm/errno.h
index 164e4f39bb57..4c82b503d92f 100644
--- a/arch/blackfin/include/asm/errno.h
+++ b/arch/blackfin/include/asm/errno.h
@@ -1,6 +1 @@
1#ifndef _BFIN_ERRNO_H #include <asm-generic/errno.h>
2#define _BFIN_ERRNO_H
3
4#include<asm-generic/errno.h>
5
6#endif /* _BFIN_ERRNO_H */
diff --git a/arch/blackfin/include/asm/fb.h b/arch/blackfin/include/asm/fb.h
index c7df38030992..3a4988e8df45 100644
--- a/arch/blackfin/include/asm/fb.h
+++ b/arch/blackfin/include/asm/fb.h
@@ -1,12 +1 @@
1#ifndef _ASM_FB_H_ #include <asm-generic/fb.h>
2#define _ASM_FB_H_
3#include <linux/fb.h>
4
5#define fb_pgprotect(...) do {} while (0)
6
7static inline int fb_is_primary_device(struct fb_info *info)
8{
9 return 0;
10}
11
12#endif /* _ASM_FB_H_ */
diff --git a/arch/blackfin/include/asm/ftrace.h b/arch/blackfin/include/asm/ftrace.h
index 40a8c178f10d..8643680f0f78 100644
--- a/arch/blackfin/include/asm/ftrace.h
+++ b/arch/blackfin/include/asm/ftrace.h
@@ -1 +1,13 @@
1/* empty */ 1/*
2 * Blackfin ftrace code
3 *
4 * Copyright 2009 Analog Devices Inc.
5 * Licensed under the GPL-2 or later.
6 */
7
8#ifndef __ASM_BFIN_FTRACE_H__
9#define __ASM_BFIN_FTRACE_H__
10
11#define MCOUNT_INSN_SIZE 8 /* sizeof mcount call: LINK + CALL */
12
13#endif
diff --git a/arch/blackfin/include/asm/futex.h b/arch/blackfin/include/asm/futex.h
index 6a332a9f099c..0b745828f42b 100644
--- a/arch/blackfin/include/asm/futex.h
+++ b/arch/blackfin/include/asm/futex.h
@@ -1,6 +1 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#include <asm-generic/futex.h> #include <asm-generic/futex.h>
5
6#endif
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h
index b0f847ae4bf4..89f08decb8e0 100644
--- a/arch/blackfin/include/asm/gptimers.h
+++ b/arch/blackfin/include/asm/gptimers.h
@@ -30,6 +30,7 @@
30# else 30# else
31# define MAX_BLACKFIN_GPTIMERS 11 31# define MAX_BLACKFIN_GPTIMERS 11
32# define TIMER8_GROUP_REG TIMER_ENABLE1 32# define TIMER8_GROUP_REG TIMER_ENABLE1
33# define TIMER_GROUP2 1
33# endif 34# endif
34# define TIMER0_GROUP_REG TIMER_ENABLE0 35# define TIMER0_GROUP_REG TIMER_ENABLE0
35#endif 36#endif
@@ -40,10 +41,12 @@
40# define MAX_BLACKFIN_GPTIMERS 12 41# define MAX_BLACKFIN_GPTIMERS 12
41# define TIMER0_GROUP_REG TMRS8_ENABLE 42# define TIMER0_GROUP_REG TMRS8_ENABLE
42# define TIMER8_GROUP_REG TMRS4_ENABLE 43# define TIMER8_GROUP_REG TMRS4_ENABLE
44# define TIMER_GROUP2 1
43#endif 45#endif
44/* 46/*
45 * All others: 3 timers: 47 * All others: 3 timers:
46 */ 48 */
49#define TIMER_GROUP1 0
47#if !defined(MAX_BLACKFIN_GPTIMERS) 50#if !defined(MAX_BLACKFIN_GPTIMERS)
48# define MAX_BLACKFIN_GPTIMERS 3 51# define MAX_BLACKFIN_GPTIMERS 3
49# define TIMER0_GROUP_REG TIMER_ENABLE 52# define TIMER0_GROUP_REG TIMER_ENABLE
@@ -109,8 +112,8 @@
109#define TIMER_ERR_PROG_PER 0x8000 112#define TIMER_ERR_PROG_PER 0x8000
110#define TIMER_ERR_PROG_PW 0xC000 113#define TIMER_ERR_PROG_PW 0xC000
111#define TIMER_EMU_RUN 0x0200 114#define TIMER_EMU_RUN 0x0200
112#define TIMER_TOGGLE_HI 0x0100 115#define TIMER_TOGGLE_HI 0x0100
113#define TIMER_CLK_SEL 0x0080 116#define TIMER_CLK_SEL 0x0080
114#define TIMER_OUT_DIS 0x0040 117#define TIMER_OUT_DIS 0x0040
115#define TIMER_TIN_SEL 0x0020 118#define TIMER_TIN_SEL 0x0020
116#define TIMER_IRQ_ENA 0x0010 119#define TIMER_IRQ_ENA 0x0010
@@ -169,23 +172,25 @@
169 172
170/* The actual gptimer API */ 173/* The actual gptimer API */
171 174
172void set_gptimer_pwidth (int timer_id, uint32_t width); 175void set_gptimer_pwidth(int timer_id, uint32_t width);
173uint32_t get_gptimer_pwidth (int timer_id); 176uint32_t get_gptimer_pwidth(int timer_id);
174void set_gptimer_period (int timer_id, uint32_t period); 177void set_gptimer_period(int timer_id, uint32_t period);
175uint32_t get_gptimer_period (int timer_id); 178uint32_t get_gptimer_period(int timer_id);
176uint32_t get_gptimer_count (int timer_id); 179uint32_t get_gptimer_count(int timer_id);
177uint16_t get_gptimer_intr (int timer_id); 180int get_gptimer_intr(int timer_id);
178void clear_gptimer_intr (int timer_id); 181void clear_gptimer_intr(int timer_id);
179uint16_t get_gptimer_over (int timer_id); 182int get_gptimer_over(int timer_id);
180void clear_gptimer_over (int timer_id); 183void clear_gptimer_over(int timer_id);
181void set_gptimer_config (int timer_id, uint16_t config); 184void set_gptimer_config(int timer_id, uint16_t config);
182uint16_t get_gptimer_config (int timer_id); 185uint16_t get_gptimer_config(int timer_id);
183void set_gptimer_pulse_hi (int timer_id); 186int get_gptimer_run(int timer_id);
187void set_gptimer_pulse_hi(int timer_id);
184void clear_gptimer_pulse_hi(int timer_id); 188void clear_gptimer_pulse_hi(int timer_id);
185void enable_gptimers (uint16_t mask); 189void enable_gptimers(uint16_t mask);
186void disable_gptimers (uint16_t mask); 190void disable_gptimers(uint16_t mask);
187uint16_t get_enabled_gptimers (void); 191void disable_gptimers_sync(uint16_t mask);
188uint32_t get_gptimer_status (int group); 192uint16_t get_enabled_gptimers(void);
189void set_gptimer_status (int group, uint32_t value); 193uint32_t get_gptimer_status(int group);
194void set_gptimer_status(int group, uint32_t value);
190 195
191#endif 196#endif
diff --git a/arch/blackfin/include/asm/hardirq.h b/arch/blackfin/include/asm/hardirq.h
index 717181a1749b..cbd52f86bb9f 100644
--- a/arch/blackfin/include/asm/hardirq.h
+++ b/arch/blackfin/include/asm/hardirq.h
@@ -1,47 +1,11 @@
1#ifndef __BFIN_HARDIRQ_H 1#ifndef __BFIN_HARDIRQ_H
2#define __BFIN_HARDIRQ_H 2#define __BFIN_HARDIRQ_H
3 3
4#include <linux/cache.h>
5#include <linux/threads.h>
6#include <asm/irq.h>
7
8typedef struct {
9 unsigned int __softirq_pending;
10 unsigned int __syscall_count;
11 struct task_struct *__ksoftirqd_task;
12} ____cacheline_aligned irq_cpustat_t;
13
14#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
15
16/*
17 * We put the hardirq and softirq counter into the preemption
18 * counter. The bitmask has the following meaning:
19 *
20 * - bits 0-7 are the preemption count (max preemption depth: 256)
21 * - bits 8-15 are the softirq count (max # of softirqs: 256)
22 * - bits 16-23 are the hardirq count (max # of hardirqs: 256)
23 *
24 * - ( bit 26 is the PREEMPT_ACTIVE flag. )
25 *
26 * PREEMPT_MASK: 0x000000ff
27 * HARDIRQ_MASK: 0x0000ff00
28 * SOFTIRQ_MASK: 0x00ff0000
29 */
30
31#if NR_IRQS > 256
32#define HARDIRQ_BITS 9
33#else
34#define HARDIRQ_BITS 8
35#endif
36
37#ifdef NR_IRQS
38# if (1 << HARDIRQ_BITS) < NR_IRQS
39# error HARDIRQ_BITS is too low!
40# endif
41#endif
42
43#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 4#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1
44 5
45extern void ack_bad_irq(unsigned int irq); 6extern void ack_bad_irq(unsigned int irq);
7#define ack_bad_irq ack_bad_irq
8
9#include <asm-generic/hardirq.h>
46 10
47#endif 11#endif
diff --git a/arch/blackfin/include/asm/hw_irq.h b/arch/blackfin/include/asm/hw_irq.h
index 5b51eaec012c..1f5ef7da0045 100644
--- a/arch/blackfin/include/asm/hw_irq.h
+++ b/arch/blackfin/include/asm/hw_irq.h
@@ -1,6 +1 @@
1#ifndef __ASM_BFIN_HW_IRQ_H #include <asm-generic/hw_irq.h>
2#define __ASM_BFIN_HW_IRQ_H
3
4/* Dummy include. */
5
6#endif
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h
index 63b2d8c78570..37053eca200e 100644
--- a/arch/blackfin/include/asm/io.h
+++ b/arch/blackfin/include/asm/io.h
@@ -80,19 +80,22 @@ static inline unsigned int readl(const volatile void __iomem *addr)
80#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) 80#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
81#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) 81#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
82 82
83#define inb(addr) readb(addr) 83/* Convert "I/O port addresses" to actual addresses. i.e. ugly casts. */
84#define inw(addr) readw(addr) 84#define __io(port) ((void *)(unsigned long)(port))
85#define inl(addr) readl(addr) 85
86#define outb(x,addr) ((void) writeb(x,addr)) 86#define inb(port) readb(__io(port))
87#define outw(x,addr) ((void) writew(x,addr)) 87#define inw(port) readw(__io(port))
88#define outl(x,addr) ((void) writel(x,addr)) 88#define inl(port) readl(__io(port))
89 89#define outb(x,port) writeb(x,__io(port))
90#define inb_p(addr) inb(addr) 90#define outw(x,port) writew(x,__io(port))
91#define inw_p(addr) inw(addr) 91#define outl(x,port) writel(x,__io(port))
92#define inl_p(addr) inl(addr) 92
93#define outb_p(x,addr) outb(x,addr) 93#define inb_p(port) inb(__io(port))
94#define outw_p(x,addr) outw(x,addr) 94#define inw_p(port) inw(__io(port))
95#define outl_p(x,addr) outl(x,addr) 95#define inl_p(port) inl(__io(port))
96#define outb_p(x,port) outb(x,__io(port))
97#define outw_p(x,port) outw(x,__io(port))
98#define outl_p(x,port) outl(x,__io(port))
96 99
97#define ioread8_rep(a,d,c) readsb(a,d,c) 100#define ioread8_rep(a,d,c) readsb(a,d,c)
98#define ioread16_rep(a,d,c) readsw(a,d,c) 101#define ioread16_rep(a,d,c) readsw(a,d,c)
@@ -219,7 +222,6 @@ extern void blkfin_inv_cache_all(void);
219#define ioport_unmap(addr) 222#define ioport_unmap(addr)
220 223
221/* Pages to physical address... */ 224/* Pages to physical address... */
222#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
223#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT) 225#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT)
224 226
225#define phys_to_virt(vaddr) ((void *) (vaddr)) 227#define phys_to_virt(vaddr) ((void *) (vaddr))
diff --git a/arch/blackfin/include/asm/ioctls.h b/arch/blackfin/include/asm/ioctls.h
index 895e3173165d..eca8d75b0a8a 100644
--- a/arch/blackfin/include/asm/ioctls.h
+++ b/arch/blackfin/include/asm/ioctls.h
@@ -1,87 +1,7 @@
1#ifndef __ARCH_BFIN_IOCTLS_H__ 1#ifndef __ARCH_BFIN_IOCTLS_H__
2#define __ARCH_BFIN_IOCTLS_H__ 2#define __ARCH_BFIN_IOCTLS_H__
3 3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T', 0x2A, struct termios2)
51#define TCSETS2 _IOW('T', 0x2B, struct termios2)
52#define TCSETSW2 _IOW('T', 0x2C, struct termios2)
53#define TCSETSF2 _IOW('T', 0x2D, struct termios2)
54/* Get Pty Number (of pty-mux device) */
55#define TIOCGPTN _IOR('T', 0x30, unsigned int)
56#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */
57
58#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
59#define FIOCLEX 0x5451
60#define FIOASYNC 0x5452
61#define TIOCSERCONFIG 0x5453
62#define TIOCSERGWILD 0x5454
63#define TIOCSERSWILD 0x5455
64#define TIOCGLCKTRMIOS 0x5456
65#define TIOCSLCKTRMIOS 0x5457
66#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
67#define TIOCSERGETLSR 0x5459 /* Get line status register */
68#define TIOCSERGETMULTI 0x545A /* Get multiport config */
69#define TIOCSERSETMULTI 0x545B /* Set multiport config */
70
71#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
72#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
73
74#define FIOQSIZE 0x545E 4#define FIOQSIZE 0x545E
5#include <asm-generic/ioctls.h>
75 6
76/* Used for packet mode */ 7#endif
77#define TIOCPKT_DATA 0
78#define TIOCPKT_FLUSHREAD 1
79#define TIOCPKT_FLUSHWRITE 2
80#define TIOCPKT_STOP 4
81#define TIOCPKT_START 8
82#define TIOCPKT_NOSTOP 16
83#define TIOCPKT_DOSTOP 32
84
85#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
86
87#endif /* __ARCH_BFIN_IOCTLS_H__ */
diff --git a/arch/blackfin/include/asm/ipcbuf.h b/arch/blackfin/include/asm/ipcbuf.h
index 8f0899cdf4d2..84c7e51cb6d0 100644
--- a/arch/blackfin/include/asm/ipcbuf.h
+++ b/arch/blackfin/include/asm/ipcbuf.h
@@ -1,30 +1 @@
1/* Changes origined from m68k version. Lineo Inc. May 2001 */ #include <asm-generic/ipcbuf.h>
2
3#ifndef __BFIN_IPCBUF_H__
4#define __BFIN_IPCBUF_H__
5
6/*
7 * The user_ipc_perm structure for m68k architecture.
8 * Note extra padding because this structure is passed back and forth
9 * between kernel and user space.
10 *
11 * Pad space is left for:
12 * - 32-bit mode_t and seq
13 * - 2 miscellaneous 32-bit values
14 */
15
16struct ipc64_perm {
17 __kernel_key_t key;
18 __kernel_uid32_t uid;
19 __kernel_gid32_t gid;
20 __kernel_uid32_t cuid;
21 __kernel_gid32_t cgid;
22 __kernel_mode_t mode;
23 unsigned short __pad1;
24 unsigned short seq;
25 unsigned short __pad2;
26 unsigned long __unused1;
27 unsigned long __unused2;
28};
29
30#endif /* __BFIN_IPCBUF_H__ */
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h
index 343b56361ec9..87ba9ad399cb 100644
--- a/arch/blackfin/include/asm/ipipe.h
+++ b/arch/blackfin/include/asm/ipipe.h
@@ -35,9 +35,9 @@
35#include <asm/atomic.h> 35#include <asm/atomic.h>
36#include <asm/traps.h> 36#include <asm/traps.h>
37 37
38#define IPIPE_ARCH_STRING "1.9-00" 38#define IPIPE_ARCH_STRING "1.11-00"
39#define IPIPE_MAJOR_NUMBER 1 39#define IPIPE_MAJOR_NUMBER 1
40#define IPIPE_MINOR_NUMBER 9 40#define IPIPE_MINOR_NUMBER 11
41#define IPIPE_PATCH_NUMBER 0 41#define IPIPE_PATCH_NUMBER 0
42 42
43#ifdef CONFIG_SMP 43#ifdef CONFIG_SMP
@@ -54,10 +54,11 @@ do { \
54 54
55#define task_hijacked(p) \ 55#define task_hijacked(p) \
56 ({ \ 56 ({ \
57 int __x__ = ipipe_current_domain != ipipe_root_domain; \ 57 int __x__ = __ipipe_root_domain_p; \
58 /* We would need to clear the SYNC flag for the root domain */ \ 58 __clear_bit(IPIPE_SYNC_FLAG, &ipipe_root_cpudom_var(status)); \
59 /* over the current processor in SMP mode. */ \ 59 if (__x__) \
60 local_irq_enable_hw(); __x__; \ 60 local_irq_enable_hw(); \
61 !__x__; \
61 }) 62 })
62 63
63struct ipipe_domain; 64struct ipipe_domain;
@@ -179,23 +180,24 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul)
179 180
180#define __ipipe_run_isr(ipd, irq) \ 181#define __ipipe_run_isr(ipd, irq) \
181 do { \ 182 do { \
182 if (ipd == ipipe_root_domain) { \ 183 if (!__ipipe_pipeline_head_p(ipd)) \
183 local_irq_enable_hw(); \ 184 local_irq_enable_hw(); \
184 if (ipipe_virtual_irq_p(irq)) \ 185 if (ipd == ipipe_root_domain) { \
186 if (unlikely(ipipe_virtual_irq_p(irq))) { \
187 irq_enter(); \
185 ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ 188 ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
186 else \ 189 irq_exit(); \
190 } else \
187 ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \ 191 ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \
188 local_irq_disable_hw(); \
189 } else { \ 192 } else { \
190 __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ 193 __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
191 local_irq_enable_nohead(ipd); \
192 ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ 194 ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
193 /* Attempt to exit the outer interrupt level before \ 195 /* Attempt to exit the outer interrupt level before \
194 * starting the deferred IRQ processing. */ \ 196 * starting the deferred IRQ processing. */ \
195 local_irq_disable_nohead(ipd); \
196 __ipipe_run_irqtail(); \ 197 __ipipe_run_irqtail(); \
197 __set_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ 198 __set_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
198 } \ 199 } \
200 local_irq_disable_hw(); \
199 } while (0) 201 } while (0)
200 202
201#define __ipipe_syscall_watched_p(p, sc) \ 203#define __ipipe_syscall_watched_p(p, sc) \
@@ -205,7 +207,7 @@ void ipipe_init_irq_threads(void);
205 207
206int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); 208int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
207 209
208#ifdef CONFIG_GENERIC_CLOCKEVENTS 210#ifdef CONFIG_TICKSOURCE_CORETMR
209#define IRQ_SYSTMR IRQ_CORETMR 211#define IRQ_SYSTMR IRQ_CORETMR
210#define IRQ_PRIOTMR IRQ_CORETMR 212#define IRQ_PRIOTMR IRQ_CORETMR
211#else 213#else
@@ -238,8 +240,13 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
238#define ipipe_init_irq_threads() do { } while (0) 240#define ipipe_init_irq_threads() do { } while (0)
239#define ipipe_start_irq_thread(irq, desc) 0 241#define ipipe_start_irq_thread(irq, desc) 0
240 242
243#ifndef CONFIG_TICKSOURCE_GPTMR0
241#define IRQ_SYSTMR IRQ_CORETMR 244#define IRQ_SYSTMR IRQ_CORETMR
242#define IRQ_PRIOTMR IRQ_CORETMR 245#define IRQ_PRIOTMR IRQ_CORETMR
246#else
247#define IRQ_SYSTMR IRQ_TIMER0
248#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0
249#endif
243 250
244#define __ipipe_root_tick_p(regs) 1 251#define __ipipe_root_tick_p(regs) 1
245 252
diff --git a/arch/blackfin/include/asm/ipipe_base.h b/arch/blackfin/include/asm/ipipe_base.h
index 3e8acbd1a3be..490098f532a7 100644
--- a/arch/blackfin/include/asm/ipipe_base.h
+++ b/arch/blackfin/include/asm/ipipe_base.h
@@ -51,23 +51,23 @@
51 51
52extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ 52extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */
53 53
54static inline void __ipipe_stall_root(void) 54#define __ipipe_stall_root() \
55{ 55 do { \
56 volatile unsigned long *p = &__ipipe_root_status; 56 volatile unsigned long *p = &__ipipe_root_status; \
57 set_bit(0, p); 57 set_bit(0, p); \
58} 58 } while (0)
59 59
60static inline unsigned long __ipipe_test_and_stall_root(void) 60#define __ipipe_test_and_stall_root() \
61{ 61 ({ \
62 volatile unsigned long *p = &__ipipe_root_status; 62 volatile unsigned long *p = &__ipipe_root_status; \
63 return test_and_set_bit(0, p); 63 test_and_set_bit(0, p); \
64} 64 })
65 65
66static inline unsigned long __ipipe_test_root(void) 66#define __ipipe_test_root() \
67{ 67 ({ \
68 const unsigned long *p = &__ipipe_root_status; 68 const unsigned long *p = &__ipipe_root_status; \
69 return test_bit(0, p); 69 test_bit(0, p); \
70} 70 })
71 71
72#endif /* !__ASSEMBLY__ */ 72#endif /* !__ASSEMBLY__ */
73 73
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index 7645e85a5f6f..42a15f5ce0d0 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -17,270 +17,10 @@
17#ifndef _BFIN_IRQ_H_ 17#ifndef _BFIN_IRQ_H_
18#define _BFIN_IRQ_H_ 18#define _BFIN_IRQ_H_
19 19
20/* SYS_IRQS and NR_IRQS are defined in <mach-bf5xx/irq.h>*/ 20#include <linux/irqflags.h>
21#include <mach/irq.h>
22#include <asm/pda.h>
23#include <asm/processor.h>
24
25#ifdef CONFIG_SMP
26/* Forward decl needed due to cdef inter dependencies */
27static inline uint32_t __pure bfin_dspid(void);
28# define blackfin_core_id() (bfin_dspid() & 0xff)
29# define bfin_irq_flags cpu_pda[blackfin_core_id()].imask
30#else
31extern unsigned long bfin_irq_flags;
32#endif
33
34#ifdef CONFIG_IPIPE
35
36#include <linux/ipipe_trace.h>
37
38void __ipipe_unstall_root(void);
39
40void __ipipe_restore_root(unsigned long flags);
41
42#ifdef CONFIG_DEBUG_HWERR
43# define __all_masked_irq_flags 0x3f
44# define __save_and_cli_hw(x) \
45 __asm__ __volatile__( \
46 "cli %0;" \
47 "sti %1;" \
48 : "=&d"(x) \
49 : "d" (0x3F) \
50 )
51#else
52# define __all_masked_irq_flags 0x1f
53# define __save_and_cli_hw(x) \
54 __asm__ __volatile__( \
55 "cli %0;" \
56 : "=&d"(x) \
57 )
58#endif
59
60#define irqs_enabled_from_flags_hw(x) ((x) != __all_masked_irq_flags)
61#define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags))
62#define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x)
63
64#define local_save_flags(x) \
65 do { \
66 (x) = __ipipe_test_root() ? \
67 __all_masked_irq_flags : bfin_irq_flags; \
68 barrier(); \
69 } while (0)
70
71#define local_irq_save(x) \
72 do { \
73 (x) = __ipipe_test_and_stall_root() ? \
74 __all_masked_irq_flags : bfin_irq_flags; \
75 barrier(); \
76 } while (0)
77
78static inline void local_irq_restore(unsigned long x)
79{
80 barrier();
81 __ipipe_restore_root(x == __all_masked_irq_flags);
82}
83
84#define local_irq_disable() \
85 do { \
86 __ipipe_stall_root(); \
87 barrier(); \
88 } while (0)
89
90static inline void local_irq_enable(void)
91{
92 barrier();
93 __ipipe_unstall_root();
94}
95
96#define irqs_disabled() __ipipe_test_root()
97
98#define local_save_flags_hw(x) \
99 __asm__ __volatile__( \
100 "cli %0;" \
101 "sti %0;" \
102 : "=d"(x) \
103 )
104
105#define irqs_disabled_hw() \
106 ({ \
107 unsigned long flags; \
108 local_save_flags_hw(flags); \
109 !irqs_enabled_from_flags_hw(flags); \
110 })
111
112static inline unsigned long raw_mangle_irq_bits(int virt, unsigned long real)
113{
114 /* Merge virtual and real interrupt mask bits into a single
115 32bit word. */
116 return (real & ~(1 << 31)) | ((virt != 0) << 31);
117}
118
119static inline int raw_demangle_irq_bits(unsigned long *x)
120{
121 int virt = (*x & (1 << 31)) != 0;
122 *x &= ~(1L << 31);
123 return virt;
124}
125
126#ifdef CONFIG_IPIPE_TRACE_IRQSOFF
127
128#define local_irq_disable_hw() \
129 do { \
130 int _tmp_dummy; \
131 if (!irqs_disabled_hw()) \
132 ipipe_trace_begin(0x80000000); \
133 __asm__ __volatile__ ("cli %0;" : "=d" (_tmp_dummy) : ); \
134 } while (0)
135
136#define local_irq_enable_hw() \
137 do { \
138 if (irqs_disabled_hw()) \
139 ipipe_trace_end(0x80000000); \
140 __asm__ __volatile__ ("sti %0;" : : "d"(bfin_irq_flags)); \
141 } while (0)
142
143#define local_irq_save_hw(x) \
144 do { \
145 __save_and_cli_hw(x); \
146 if (local_test_iflag_hw(x)) \
147 ipipe_trace_begin(0x80000001); \
148 } while (0)
149
150#define local_irq_restore_hw(x) \
151 do { \
152 if (local_test_iflag_hw(x)) { \
153 ipipe_trace_end(0x80000001); \
154 local_irq_enable_hw_notrace(); \
155 } \
156 } while (0)
157
158#define local_irq_disable_hw_notrace() \
159 do { \
160 int _tmp_dummy; \
161 __asm__ __volatile__ ("cli %0;" : "=d" (_tmp_dummy) : ); \
162 } while (0)
163
164#define local_irq_enable_hw_notrace() \
165 __asm__ __volatile__( \
166 "sti %0;" \
167 : \
168 : "d"(bfin_irq_flags) \
169 )
170
171#define local_irq_save_hw_notrace(x) __save_and_cli_hw(x)
172 21
173#define local_irq_restore_hw_notrace(x) \ 22/* SYS_IRQS and NR_IRQS are defined in <mach-bf5xx/irq.h> */
174 do { \ 23#include <mach/irq.h>
175 if (local_test_iflag_hw(x)) \
176 local_irq_enable_hw_notrace(); \
177 } while (0)
178
179#else /* CONFIG_IPIPE_TRACE_IRQSOFF */
180
181#define local_irq_enable_hw() \
182 __asm__ __volatile__( \
183 "sti %0;" \
184 : \
185 : "d"(bfin_irq_flags) \
186 )
187
188#define local_irq_disable_hw() \
189 do { \
190 int _tmp_dummy; \
191 __asm__ __volatile__ ( \
192 "cli %0;" \
193 : "=d" (_tmp_dummy)); \
194 } while (0)
195
196#define local_irq_restore_hw(x) \
197 do { \
198 if (irqs_enabled_from_flags_hw(x)) \
199 local_irq_enable_hw(); \
200 } while (0)
201
202#define local_irq_save_hw(x) __save_and_cli_hw(x)
203
204#define local_irq_disable_hw_notrace() local_irq_disable_hw()
205#define local_irq_enable_hw_notrace() local_irq_enable_hw()
206#define local_irq_save_hw_notrace(x) local_irq_save_hw(x)
207#define local_irq_restore_hw_notrace(x) local_irq_restore_hw(x)
208
209#endif /* CONFIG_IPIPE_TRACE_IRQSOFF */
210
211#else /* !CONFIG_IPIPE */
212
213/*
214 * Interrupt configuring macros.
215 */
216#define local_irq_disable() \
217 do { \
218 int __tmp_dummy; \
219 __asm__ __volatile__( \
220 "cli %0;" \
221 : "=d" (__tmp_dummy) \
222 ); \
223 } while (0)
224
225#define local_irq_enable() \
226 __asm__ __volatile__( \
227 "sti %0;" \
228 : \
229 : "d" (bfin_irq_flags) \
230 )
231
232#ifdef CONFIG_DEBUG_HWERR
233# define __save_and_cli(x) \
234 __asm__ __volatile__( \
235 "cli %0;" \
236 "sti %1;" \
237 : "=&d" (x) \
238 : "d" (0x3F) \
239 )
240#else
241# define __save_and_cli(x) \
242 __asm__ __volatile__( \
243 "cli %0;" \
244 : "=&d" (x) \
245 )
246#endif
247
248#define local_save_flags(x) \
249 __asm__ __volatile__( \
250 "cli %0;" \
251 "sti %0;" \
252 : "=d" (x) \
253 )
254
255#ifdef CONFIG_DEBUG_HWERR
256#define irqs_enabled_from_flags(x) (((x) & ~0x3f) != 0)
257#else
258#define irqs_enabled_from_flags(x) ((x) != 0x1f)
259#endif
260
261#define local_irq_restore(x) \
262 do { \
263 if (irqs_enabled_from_flags(x)) \
264 local_irq_enable(); \
265 } while (0)
266
267/* For spinlocks etc */
268#define local_irq_save(x) __save_and_cli(x)
269
270#define irqs_disabled() \
271({ \
272 unsigned long flags; \
273 local_save_flags(flags); \
274 !irqs_enabled_from_flags(flags); \
275})
276
277#define local_irq_save_hw(x) local_irq_save(x)
278#define local_irq_restore_hw(x) local_irq_restore(x)
279#define local_irq_enable_hw() local_irq_enable()
280#define local_irq_disable_hw() local_irq_disable()
281#define irqs_disabled_hw() irqs_disabled()
282
283#endif /* !CONFIG_IPIPE */
284 24
285#if ANOMALY_05000244 && defined(CONFIG_BFIN_ICACHE) 25#if ANOMALY_05000244 && defined(CONFIG_BFIN_ICACHE)
286# define NOP_PAD_ANOMALY_05000244 "nop; nop;" 26# define NOP_PAD_ANOMALY_05000244 "nop; nop;"
@@ -298,9 +38,6 @@ static inline int raw_demangle_irq_bits(unsigned long *x)
298 : "d" (bfin_irq_flags) \ 38 : "d" (bfin_irq_flags) \
299 ) 39 )
300 40
301static inline int irq_canonicalize(int irq) 41#include <asm-generic/irq.h>
302{
303 return irq;
304}
305 42
306#endif /* _BFIN_IRQ_H_ */ 43#endif /* _BFIN_IRQ_H_ */
diff --git a/arch/blackfin/include/asm/irqflags.h b/arch/blackfin/include/asm/irqflags.h
new file mode 100644
index 000000000000..9b19a19d9ae9
--- /dev/null
+++ b/arch/blackfin/include/asm/irqflags.h
@@ -0,0 +1,215 @@
1/*
2 * interface to Blackfin CEC
3 *
4 * Copyright 2009 Analog Devices Inc.
5 * Licensed under the GPL-2 or later.
6 */
7
8#ifndef __ASM_BFIN_IRQFLAGS_H__
9#define __ASM_BFIN_IRQFLAGS_H__
10
11#ifdef CONFIG_SMP
12# include <asm/pda.h>
13# include <asm/processor.h>
14/* Forward decl needed due to cdef inter dependencies */
15static inline uint32_t __pure bfin_dspid(void);
16# define blackfin_core_id() (bfin_dspid() & 0xff)
17# define bfin_irq_flags cpu_pda[blackfin_core_id()].imask
18#else
19extern unsigned long bfin_irq_flags;
20#endif
21
22static inline void bfin_sti(unsigned long flags)
23{
24 asm volatile("sti %0;" : : "d" (flags));
25}
26
27static inline unsigned long bfin_cli(void)
28{
29 unsigned long flags;
30 asm volatile("cli %0;" : "=d" (flags));
31 return flags;
32}
33
34#ifdef CONFIG_IPIPE
35
36#include <linux/ipipe_base.h>
37#include <linux/ipipe_trace.h>
38
39#ifdef CONFIG_DEBUG_HWERR
40# define bfin_no_irqs 0x3f
41#else
42# define bfin_no_irqs 0x1f
43#endif
44
45#define raw_local_irq_disable() \
46 do { \
47 ipipe_check_context(ipipe_root_domain); \
48 __ipipe_stall_root(); \
49 barrier(); \
50 } while (0)
51
52static inline void raw_local_irq_enable(void)
53{
54 barrier();
55 ipipe_check_context(ipipe_root_domain);
56 __ipipe_unstall_root();
57}
58
59#define raw_local_save_flags_ptr(x) \
60 do { \
61 *(x) = __ipipe_test_root() ? bfin_no_irqs : bfin_irq_flags; \
62 } while (0)
63
64#define raw_local_save_flags(x) raw_local_save_flags_ptr(&(x))
65
66#define raw_irqs_disabled_flags(x) ((x) == bfin_no_irqs)
67
68#define raw_local_irq_save_ptr(x) \
69 do { \
70 *(x) = __ipipe_test_and_stall_root() ? bfin_no_irqs : bfin_irq_flags; \
71 barrier(); \
72 } while (0)
73
74#define raw_local_irq_save(x) \
75 do { \
76 ipipe_check_context(ipipe_root_domain); \
77 raw_local_irq_save_ptr(&(x)); \
78 } while (0)
79
80static inline unsigned long raw_mangle_irq_bits(int virt, unsigned long real)
81{
82 /*
83 * Merge virtual and real interrupt mask bits into a single
84 * 32bit word.
85 */
86 return (real & ~(1 << 31)) | ((virt != 0) << 31);
87}
88
89static inline int raw_demangle_irq_bits(unsigned long *x)
90{
91 int virt = (*x & (1 << 31)) != 0;
92 *x &= ~(1L << 31);
93 return virt;
94}
95
96static inline void local_irq_disable_hw_notrace(void)
97{
98 bfin_cli();
99}
100
101static inline void local_irq_enable_hw_notrace(void)
102{
103 bfin_sti(bfin_irq_flags);
104}
105
106#define local_save_flags_hw(flags) \
107 do { \
108 (flags) = bfin_read_IMASK(); \
109 } while (0)
110
111#define irqs_disabled_flags_hw(flags) (((flags) & ~0x3f) == 0)
112
113#define irqs_disabled_hw() \
114 ({ \
115 unsigned long flags; \
116 local_save_flags_hw(flags); \
117 irqs_disabled_flags_hw(flags); \
118 })
119
120static inline void local_irq_save_ptr_hw(unsigned long *flags)
121{
122 *flags = bfin_cli();
123#ifdef CONFIG_DEBUG_HWERR
124 bfin_sti(0x3f);
125#endif
126}
127
128#define local_irq_save_hw_notrace(flags) \
129 do { \
130 local_irq_save_ptr_hw(&(flags)); \
131 } while (0)
132
133static inline void local_irq_restore_hw_notrace(unsigned long flags)
134{
135 if (!irqs_disabled_flags_hw(flags))
136 local_irq_enable_hw_notrace();
137}
138
139#ifdef CONFIG_IPIPE_TRACE_IRQSOFF
140# define local_irq_disable_hw() \
141 do { \
142 if (!irqs_disabled_hw()) { \
143 local_irq_disable_hw_notrace(); \
144 ipipe_trace_begin(0x80000000); \
145 } \
146 } while (0)
147# define local_irq_enable_hw() \
148 do { \
149 if (irqs_disabled_hw()) { \
150 ipipe_trace_end(0x80000000); \
151 local_irq_enable_hw_notrace(); \
152 } \
153 } while (0)
154# define local_irq_save_hw(flags) \
155 do { \
156 local_save_flags_hw(flags); \
157 if (!irqs_disabled_flags_hw(flags)) { \
158 local_irq_disable_hw_notrace(); \
159 ipipe_trace_begin(0x80000001); \
160 } \
161 } while (0)
162# define local_irq_restore_hw(flags) \
163 do { \
164 if (!irqs_disabled_flags_hw(flags)) { \
165 ipipe_trace_end(0x80000001); \
166 local_irq_enable_hw_notrace(); \
167 } \
168 } while (0)
169#else /* !CONFIG_IPIPE_TRACE_IRQSOFF */
170# define local_irq_disable_hw() local_irq_disable_hw_notrace()
171# define local_irq_enable_hw() local_irq_enable_hw_notrace()
172# define local_irq_save_hw(flags) local_irq_save_hw_notrace(flags)
173# define local_irq_restore_hw(flags) local_irq_restore_hw_notrace(flags)
174#endif /* !CONFIG_IPIPE_TRACE_IRQSOFF */
175
176#else /* CONFIG_IPIPE */
177
178static inline void raw_local_irq_disable(void)
179{
180 bfin_cli();
181}
182static inline void raw_local_irq_enable(void)
183{
184 bfin_sti(bfin_irq_flags);
185}
186
187#define raw_local_save_flags(flags) do { (flags) = bfin_read_IMASK(); } while (0)
188
189#define raw_irqs_disabled_flags(flags) (((flags) & ~0x3f) == 0)
190
191static inline unsigned long __raw_local_irq_save(void)
192{
193 unsigned long flags = bfin_cli();
194#ifdef CONFIG_DEBUG_HWERR
195 bfin_sti(0x3f);
196#endif
197 return flags;
198}
199#define raw_local_irq_save(flags) do { (flags) = __raw_local_irq_save(); } while (0)
200
201#define local_irq_save_hw(flags) raw_local_irq_save(flags)
202#define local_irq_restore_hw(flags) raw_local_irq_restore(flags)
203#define local_irq_enable_hw() raw_local_irq_enable()
204#define local_irq_disable_hw() raw_local_irq_disable()
205#define irqs_disabled_hw() irqs_disabled()
206
207#endif /* !CONFIG_IPIPE */
208
209static inline void raw_local_irq_restore(unsigned long flags)
210{
211 if (!raw_irqs_disabled_flags(flags))
212 raw_local_irq_enable();
213}
214
215#endif
diff --git a/arch/blackfin/include/asm/kmap_types.h b/arch/blackfin/include/asm/kmap_types.h
index e215f7104974..3575c64af42a 100644
--- a/arch/blackfin/include/asm/kmap_types.h
+++ b/arch/blackfin/include/asm/kmap_types.h
@@ -1,21 +1 @@
1#ifndef _ASM_KMAP_TYPES_H #include <asm-generic/kmap_types.h>
2#define _ASM_KMAP_TYPES_H
3
4enum km_type {
5 KM_BOUNCE_READ,
6 KM_SKB_SUNRPC_DATA,
7 KM_SKB_DATA_SOFTIRQ,
8 KM_USER0,
9 KM_USER1,
10 KM_BIO_SRC_IRQ,
11 KM_BIO_DST_IRQ,
12 KM_PTE0,
13 KM_PTE1,
14 KM_IRQ0,
15 KM_IRQ1,
16 KM_SOFTIRQ0,
17 KM_SOFTIRQ1,
18 KM_TYPE_NR
19};
20
21#endif
diff --git a/arch/blackfin/include/asm/local.h b/arch/blackfin/include/asm/local.h
index 75afffbc6421..c11c530f74d0 100644
--- a/arch/blackfin/include/asm/local.h
+++ b/arch/blackfin/include/asm/local.h
@@ -1,6 +1 @@
1#ifndef __BLACKFIN_LOCAL_H
2#define __BLACKFIN_LOCAL_H
3
4#include <asm-generic/local.h> #include <asm-generic/local.h>
5
6#endif /* __BLACKFIN_LOCAL_H */
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h
index 61f7487fbf12..4179e329b9c9 100644
--- a/arch/blackfin/include/asm/mem_init.h
+++ b/arch/blackfin/include/asm/mem_init.h
@@ -59,7 +59,7 @@
59#define SDRAM_tRP TRP_1 59#define SDRAM_tRP TRP_1
60#define SDRAM_tRP_num 1 60#define SDRAM_tRP_num 1
61#define SDRAM_tRAS TRAS_4 61#define SDRAM_tRAS TRAS_4
62#define SDRAM_tRAS_num 3 62#define SDRAM_tRAS_num 4
63#define SDRAM_tRCD TRCD_1 63#define SDRAM_tRCD TRCD_1
64#define SDRAM_tWR TWR_2 64#define SDRAM_tWR TWR_2
65#endif 65#endif
@@ -89,6 +89,85 @@
89#endif 89#endif
90#endif 90#endif
91 91
92/*
93 * The BF526-EZ-Board changed SDRAM chips between revisions,
94 * so we use below timings to accommodate both.
95 */
96#if defined(CONFIG_MEM_MT48H32M16LFCJ_75)
97#if (CONFIG_SCLK_HZ > 119402985)
98#define SDRAM_tRP TRP_2
99#define SDRAM_tRP_num 2
100#define SDRAM_tRAS TRAS_8
101#define SDRAM_tRAS_num 8
102#define SDRAM_tRCD TRCD_2
103#define SDRAM_tWR TWR_2
104#endif
105#if (CONFIG_SCLK_HZ > 104477612) && (CONFIG_SCLK_HZ <= 119402985)
106#define SDRAM_tRP TRP_2
107#define SDRAM_tRP_num 2
108#define SDRAM_tRAS TRAS_7
109#define SDRAM_tRAS_num 7
110#define SDRAM_tRCD TRCD_2
111#define SDRAM_tWR TWR_2
112#endif
113#if (CONFIG_SCLK_HZ > 89552239) && (CONFIG_SCLK_HZ <= 104477612)
114#define SDRAM_tRP TRP_2
115#define SDRAM_tRP_num 2
116#define SDRAM_tRAS TRAS_6
117#define SDRAM_tRAS_num 6
118#define SDRAM_tRCD TRCD_2
119#define SDRAM_tWR TWR_2
120#endif
121#if (CONFIG_SCLK_HZ > 74626866) && (CONFIG_SCLK_HZ <= 89552239)
122#define SDRAM_tRP TRP_2
123#define SDRAM_tRP_num 2
124#define SDRAM_tRAS TRAS_5
125#define SDRAM_tRAS_num 5
126#define SDRAM_tRCD TRCD_2
127#define SDRAM_tWR TWR_2
128#endif
129#if (CONFIG_SCLK_HZ > 66666667) && (CONFIG_SCLK_HZ <= 74626866)
130#define SDRAM_tRP TRP_2
131#define SDRAM_tRP_num 2
132#define SDRAM_tRAS TRAS_4
133#define SDRAM_tRAS_num 4
134#define SDRAM_tRCD TRCD_2
135#define SDRAM_tWR TWR_2
136#endif
137#if (CONFIG_SCLK_HZ > 59701493) && (CONFIG_SCLK_HZ <= 66666667)
138#define SDRAM_tRP TRP_2
139#define SDRAM_tRP_num 2
140#define SDRAM_tRAS TRAS_4
141#define SDRAM_tRAS_num 4
142#define SDRAM_tRCD TRCD_1
143#define SDRAM_tWR TWR_2
144#endif
145#if (CONFIG_SCLK_HZ > 44776119) && (CONFIG_SCLK_HZ <= 59701493)
146#define SDRAM_tRP TRP_2
147#define SDRAM_tRP_num 2
148#define SDRAM_tRAS TRAS_3
149#define SDRAM_tRAS_num 3
150#define SDRAM_tRCD TRCD_1
151#define SDRAM_tWR TWR_2
152#endif
153#if (CONFIG_SCLK_HZ > 29850746) && (CONFIG_SCLK_HZ <= 44776119)
154#define SDRAM_tRP TRP_1
155#define SDRAM_tRP_num 1
156#define SDRAM_tRAS TRAS_3
157#define SDRAM_tRAS_num 3
158#define SDRAM_tRCD TRCD_1
159#define SDRAM_tWR TWR_2
160#endif
161#if (CONFIG_SCLK_HZ <= 29850746)
162#define SDRAM_tRP TRP_1
163#define SDRAM_tRP_num 1
164#define SDRAM_tRAS TRAS_2
165#define SDRAM_tRAS_num 2
166#define SDRAM_tRCD TRCD_1
167#define SDRAM_tWR TWR_2
168#endif
169#endif
170
92#if defined(CONFIG_MEM_MT48LC16M8A2TG_75) || \ 171#if defined(CONFIG_MEM_MT48LC16M8A2TG_75) || \
93 defined(CONFIG_MEM_MT48LC8M32B2B5_7) 172 defined(CONFIG_MEM_MT48LC8M32B2B5_7)
94 /*SDRAM INFORMATION: */ 173 /*SDRAM INFORMATION: */
@@ -109,6 +188,13 @@
109#define SDRAM_CL CL_3 188#define SDRAM_CL CL_3
110#endif 189#endif
111 190
191#if defined(CONFIG_MEM_MT48H32M16LFCJ_75)
192 /*SDRAM INFORMATION: */
193#define SDRAM_Tref 64 /* Refresh period in milliseconds */
194#define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */
195#define SDRAM_CL CL_2
196#endif
197
112 198
113#ifdef CONFIG_BFIN_KERNEL_CLOCK_MEMINIT_CALC 199#ifdef CONFIG_BFIN_KERNEL_CLOCK_MEMINIT_CALC
114/* Equation from section 17 (p17-46) of BF533 HRM */ 200/* Equation from section 17 (p17-46) of BF533 HRM */
diff --git a/arch/blackfin/include/asm/mem_map.h b/arch/blackfin/include/asm/mem_map.h
index e92b31051bb7..5e21627c9ba2 100644
--- a/arch/blackfin/include/asm/mem_map.h
+++ b/arch/blackfin/include/asm/mem_map.h
@@ -1,87 +1,84 @@
1/* 1/*
2 * mem_map.h 2 * Common Blackfin memory map
3 * Common header file for blackfin family of processors.
4 * 3 *
4 * Copyright 2004-2009 Analog Devices Inc.
5 * Licensed under the GPL-2 or later.
5 */ 6 */
6 7
7#ifndef _MEM_MAP_H_ 8#ifndef __BFIN_MEM_MAP_H__
8#define _MEM_MAP_H_ 9#define __BFIN_MEM_MAP_H__
9 10
10#include <mach/mem_map.h> 11#include <mach/mem_map.h>
11 12
12#ifndef __ASSEMBLY__ 13/* Every Blackfin so far has MMRs like this */
14#ifndef COREMMR_BASE
15# define COREMMR_BASE 0xFFE00000
16#endif
17#ifndef SYSMMR_BASE
18# define SYSMMR_BASE 0xFFC00000
19#endif
13 20
14#ifdef CONFIG_SMP 21/* Every Blackfin so far has on-chip Scratch Pad SRAM like this */
15static inline ulong get_l1_scratch_start_cpu(int cpu) 22#ifndef L1_SCRATCH_START
16{ 23# define L1_SCRATCH_START 0xFFB00000
17 return (cpu) ? COREB_L1_SCRATCH_START : COREA_L1_SCRATCH_START; 24# define L1_SCRATCH_LENGTH 0x1000
18} 25#endif
19static inline ulong get_l1_code_start_cpu(int cpu)
20{
21 return (cpu) ? COREB_L1_CODE_START : COREA_L1_CODE_START;
22}
23static inline ulong get_l1_data_a_start_cpu(int cpu)
24{
25 return (cpu) ? COREB_L1_DATA_A_START : COREA_L1_DATA_A_START;
26}
27static inline ulong get_l1_data_b_start_cpu(int cpu)
28{
29 return (cpu) ? COREB_L1_DATA_B_START : COREA_L1_DATA_B_START;
30}
31 26
32static inline ulong get_l1_scratch_start(void) 27/* Most parts lack on-chip L2 SRAM */
33{ 28#ifndef L2_START
34 return get_l1_scratch_start_cpu(blackfin_core_id()); 29# define L2_START 0
35} 30# define L2_LENGTH 0
36static inline ulong get_l1_code_start(void) 31#endif
37{ 32
38 return get_l1_code_start_cpu(blackfin_core_id()); 33/* Most parts lack on-chip L1 ROM */
39} 34#ifndef L1_ROM_START
40static inline ulong get_l1_data_a_start(void) 35# define L1_ROM_START 0
41{ 36# define L1_ROM_LENGTH 0
42 return get_l1_data_a_start_cpu(blackfin_core_id()); 37#endif
43} 38
44static inline ulong get_l1_data_b_start(void) 39/* Allow wonky SMP ports to override this */
45{ 40#ifndef GET_PDA_SAFE
46 return get_l1_data_b_start_cpu(blackfin_core_id()); 41# define GET_PDA_SAFE(preg) \
47} 42 preg.l = _cpu_pda; \
43 preg.h = _cpu_pda;
44# define GET_PDA(preg, dreg) GET_PDA_SAFE(preg)
48 45
49#else /* !CONFIG_SMP */ 46# ifndef __ASSEMBLY__
50 47
51static inline ulong get_l1_scratch_start_cpu(int cpu) 48static inline unsigned long get_l1_scratch_start_cpu(int cpu)
52{ 49{
53 return L1_SCRATCH_START; 50 return L1_SCRATCH_START;
54} 51}
55static inline ulong get_l1_code_start_cpu(int cpu) 52static inline unsigned long get_l1_code_start_cpu(int cpu)
56{ 53{
57 return L1_CODE_START; 54 return L1_CODE_START;
58} 55}
59static inline ulong get_l1_data_a_start_cpu(int cpu) 56static inline unsigned long get_l1_data_a_start_cpu(int cpu)
60{ 57{
61 return L1_DATA_A_START; 58 return L1_DATA_A_START;
62} 59}
63static inline ulong get_l1_data_b_start_cpu(int cpu) 60static inline unsigned long get_l1_data_b_start_cpu(int cpu)
64{ 61{
65 return L1_DATA_B_START; 62 return L1_DATA_B_START;
66} 63}
67static inline ulong get_l1_scratch_start(void) 64static inline unsigned long get_l1_scratch_start(void)
68{ 65{
69 return get_l1_scratch_start_cpu(0); 66 return get_l1_scratch_start_cpu(0);
70} 67}
71static inline ulong get_l1_code_start(void) 68static inline unsigned long get_l1_code_start(void)
72{ 69{
73 return get_l1_code_start_cpu(0); 70 return get_l1_code_start_cpu(0);
74} 71}
75static inline ulong get_l1_data_a_start(void) 72static inline unsigned long get_l1_data_a_start(void)
76{ 73{
77 return get_l1_data_a_start_cpu(0); 74 return get_l1_data_a_start_cpu(0);
78} 75}
79static inline ulong get_l1_data_b_start(void) 76static inline unsigned long get_l1_data_b_start(void)
80{ 77{
81 return get_l1_data_b_start_cpu(0); 78 return get_l1_data_b_start_cpu(0);
82} 79}
83 80
84#endif /* CONFIG_SMP */ 81# endif /* __ASSEMBLY__ */
85#endif /* __ASSEMBLY__ */ 82#endif /* !GET_PDA_SAFE */
86 83
87#endif /* _MEM_MAP_H_ */ 84#endif
diff --git a/arch/blackfin/include/asm/mman.h b/arch/blackfin/include/asm/mman.h
index b58f5ad3f024..8eebf89f5ab1 100644
--- a/arch/blackfin/include/asm/mman.h
+++ b/arch/blackfin/include/asm/mman.h
@@ -1,43 +1 @@
1#ifndef __BFIN_MMAN_H__ #include <asm-generic/mman.h>
2#define __BFIN_MMAN_H__
3
4#define PROT_READ 0x1 /* page can be read */
5#define PROT_WRITE 0x2 /* page can be written */
6#define PROT_EXEC 0x4 /* page can be executed */
7#define PROT_SEM 0x8 /* page may be used for atomic ops */
8#define PROT_NONE 0x0 /* page can not be accessed */
9#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
10#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
11
12#define MAP_SHARED 0x01 /* Share changes */
13#define MAP_PRIVATE 0x02 /* Changes are private */
14#define MAP_TYPE 0x0f /* Mask for type of mapping */
15#define MAP_FIXED 0x10 /* Interpret addr exactly */
16#define MAP_ANONYMOUS 0x20 /* don't use a file */
17
18#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
19#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
20#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
21#define MAP_LOCKED 0x2000 /* pages are locked */
22#define MAP_NORESERVE 0x4000 /* don't check for reservations */
23#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
24#define MAP_NONBLOCK 0x10000 /* do not block on IO */
25
26#define MS_ASYNC 1 /* sync memory asynchronously */
27#define MS_INVALIDATE 2 /* invalidate the caches */
28#define MS_SYNC 4 /* synchronous memory sync */
29
30#define MCL_CURRENT 1 /* lock all current mappings */
31#define MCL_FUTURE 2 /* lock all future mappings */
32
33#define MADV_NORMAL 0x0 /* default page-in behavior */
34#define MADV_RANDOM 0x1 /* page-in minimum required */
35#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
36#define MADV_WILLNEED 0x3 /* pre-fault pages */
37#define MADV_DONTNEED 0x4 /* discard these pages */
38
39/* compatibility flags */
40#define MAP_ANON MAP_ANONYMOUS
41#define MAP_FILE 0
42
43#endif /* __BFIN_MMAN_H__ */
diff --git a/arch/blackfin/include/asm/msgbuf.h b/arch/blackfin/include/asm/msgbuf.h
index 6fcbe8cd801d..809134c644a6 100644
--- a/arch/blackfin/include/asm/msgbuf.h
+++ b/arch/blackfin/include/asm/msgbuf.h
@@ -1,31 +1 @@
1#ifndef _BFIN_MSGBUF_H #include <asm-generic/msgbuf.h>
2#define _BFIN_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for bfin architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _BFIN_MSGBUF_H */
diff --git a/arch/blackfin/include/asm/mutex-dec.h b/arch/blackfin/include/asm/mutex-dec.h
deleted file mode 100644
index 0134151656af..000000000000
--- a/arch/blackfin/include/asm/mutex-dec.h
+++ /dev/null
@@ -1,112 +0,0 @@
1/*
2 * include/asm-generic/mutex-dec.h
3 *
4 * Generic implementation of the mutex fastpath, based on atomic
5 * decrement/increment.
6 */
7#ifndef _ASM_GENERIC_MUTEX_DEC_H
8#define _ASM_GENERIC_MUTEX_DEC_H
9
10/**
11 * __mutex_fastpath_lock - try to take the lock by moving the count
12 * from 1 to a 0 value
13 * @count: pointer of type atomic_t
14 * @fail_fn: function to call if the original value was not 1
15 *
16 * Change the count from 1 to a value lower than 1, and call <fail_fn> if
17 * it wasn't 1 originally. This function MUST leave the value lower than
18 * 1 even when the "1" assertion wasn't true.
19 */
20static inline void
21__mutex_fastpath_lock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *))
22{
23 if (unlikely(atomic_dec_return(count) < 0))
24 fail_fn(count);
25 else
26 smp_mb();
27}
28
29/**
30 * __mutex_fastpath_lock_retval - try to take the lock by moving the count
31 * from 1 to a 0 value
32 * @count: pointer of type atomic_t
33 * @fail_fn: function to call if the original value was not 1
34 *
35 * Change the count from 1 to a value lower than 1, and call <fail_fn> if
36 * it wasn't 1 originally. This function returns 0 if the fastpath succeeds,
37 * or anything the slow path function returns.
38 */
39static inline int
40__mutex_fastpath_lock_retval(atomic_t *count, fastcall int (*fail_fn)(atomic_t *))
41{
42 if (unlikely(atomic_dec_return(count) < 0))
43 return fail_fn(count);
44 else {
45 smp_mb();
46 return 0;
47 }
48}
49
50/**
51 * __mutex_fastpath_unlock - try to promote the count from 0 to 1
52 * @count: pointer of type atomic_t
53 * @fail_fn: function to call if the original value was not 0
54 *
55 * Try to promote the count from 0 to 1. If it wasn't 0, call <fail_fn>.
56 * In the failure case, this function is allowed to either set the value to
57 * 1, or to set it to a value lower than 1.
58 *
59 * If the implementation sets it to a value of lower than 1, then the
60 * __mutex_slowpath_needs_to_unlock() macro needs to return 1, it needs
61 * to return 0 otherwise.
62 */
63static inline void
64__mutex_fastpath_unlock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *))
65{
66 smp_mb();
67 if (unlikely(atomic_inc_return(count) <= 0))
68 fail_fn(count);
69}
70
71#define __mutex_slowpath_needs_to_unlock() 1
72
73/**
74 * __mutex_fastpath_trylock - try to acquire the mutex, without waiting
75 *
76 * @count: pointer of type atomic_t
77 * @fail_fn: fallback function
78 *
79 * Change the count from 1 to a value lower than 1, and return 0 (failure)
80 * if it wasn't 1 originally, or return 1 (success) otherwise. This function
81 * MUST leave the value lower than 1 even when the "1" assertion wasn't true.
82 * Additionally, if the value was < 0 originally, this function must not leave
83 * it to 0 on failure.
84 *
85 * If the architecture has no effective trylock variant, it should call the
86 * <fail_fn> spinlock-based trylock variant unconditionally.
87 */
88static inline int
89__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
90{
91 /*
92 * We have two variants here. The cmpxchg based one is the best one
93 * because it never induce a false contention state. It is included
94 * here because architectures using the inc/dec algorithms over the
95 * xchg ones are much more likely to support cmpxchg natively.
96 *
97 * If not we fall back to the spinlock based variant - that is
98 * just as efficient (and simpler) as a 'destructive' probing of
99 * the mutex state would be.
100 */
101#ifdef __HAVE_ARCH_CMPXCHG
102 if (likely(atomic_cmpxchg(count, 1, 0) == 1)) {
103 smp_mb();
104 return 1;
105 }
106 return 0;
107#else
108 return fail_fn(count);
109#endif
110}
111
112#endif
diff --git a/arch/blackfin/include/asm/mutex.h b/arch/blackfin/include/asm/mutex.h
index 5d399256bf06..5cc641c50834 100644
--- a/arch/blackfin/include/asm/mutex.h
+++ b/arch/blackfin/include/asm/mutex.h
@@ -10,7 +10,7 @@
10#define _ASM_MUTEX_H 10#define _ASM_MUTEX_H
11 11
12#ifndef CONFIG_SMP 12#ifndef CONFIG_SMP
13#include <asm-generic/mutex-dec.h> 13#include <asm-generic/mutex.h>
14#else 14#else
15 15
16static inline void 16static inline void
diff --git a/arch/blackfin/include/asm/page.h b/arch/blackfin/include/asm/page.h
index 344f6a8c1f22..29dcf75c6112 100644
--- a/arch/blackfin/include/asm/page.h
+++ b/arch/blackfin/include/asm/page.h
@@ -1,88 +1,7 @@
1#ifndef _BLACKFIN_PAGE_H 1#ifndef _BLACKFIN_PAGE_H
2#define _BLACKFIN_PAGE_H 2#define _BLACKFIN_PAGE_H
3 3
4/* PAGE_SHIFT determines the page size */
5
6#define PAGE_SHIFT 12
7#ifdef __ASSEMBLY__
8#define PAGE_SIZE (1 << PAGE_SHIFT)
9#else
10#define PAGE_SIZE (1UL << PAGE_SHIFT)
11#endif
12#define PAGE_MASK (~(PAGE_SIZE-1))
13
14#include <asm/setup.h>
15
16#ifndef __ASSEMBLY__
17
18#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
19#define free_user_page(page, addr) free_page(addr)
20
21#define clear_page(page) memset((page), 0, PAGE_SIZE)
22#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE)
23
24#define clear_user_page(page, vaddr,pg) clear_page(page)
25#define copy_user_page(to, from, vaddr,pg) copy_page(to, from)
26
27/*
28 * These are used to make use of C type-checking..
29 */
30typedef struct {
31 unsigned long pte;
32} pte_t;
33typedef struct {
34 unsigned long pmd[16];
35} pmd_t;
36typedef struct {
37 unsigned long pgd;
38} pgd_t;
39typedef struct {
40 unsigned long pgprot;
41} pgprot_t;
42typedef struct page *pgtable_t;
43
44#define pte_val(x) ((x).pte)
45#define pmd_val(x) ((&x)->pmd[0])
46#define pgd_val(x) ((x).pgd)
47#define pgprot_val(x) ((x).pgprot)
48
49#define __pte(x) ((pte_t) { (x) } )
50#define __pmd(x) ((pmd_t) { (x) } )
51#define __pgd(x) ((pgd_t) { (x) } )
52#define __pgprot(x) ((pgprot_t) { (x) } )
53
54extern unsigned long memory_start;
55extern unsigned long memory_end;
56
57#endif /* !__ASSEMBLY__ */
58
59#include <asm/page_offset.h>
60#include <asm/io.h>
61
62#define PAGE_OFFSET (PAGE_OFFSET_RAW)
63
64#ifndef __ASSEMBLY__
65
66#define __pa(vaddr) virt_to_phys((void *)(vaddr))
67#define __va(paddr) phys_to_virt((unsigned long)(paddr))
68
69#define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT)
70
71#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT)
72#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT)
73#define virt_to_page(addr) (mem_map + (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT))
74#define page_to_virt(page) ((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET)
75#define VALID_PAGE(page) ((page - mem_map) < max_mapnr)
76
77#define pfn_to_page(pfn) virt_to_page(pfn_to_virt(pfn))
78#define page_to_pfn(page) virt_to_pfn(page_to_virt(page))
79#define pfn_valid(pfn) ((pfn) < max_mapnr)
80
81#define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \
82 ((void *)(kaddr) < (void *)memory_end))
83
84#include <asm-generic/page.h> 4#include <asm-generic/page.h>
5#define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT)
85 6
86#endif /* __ASSEMBLY__ */ 7#endif
87
88#endif /* _BLACKFIN_PAGE_H */
diff --git a/arch/blackfin/include/asm/param.h b/arch/blackfin/include/asm/param.h
index 41564a6347f8..965d45427975 100644
--- a/arch/blackfin/include/asm/param.h
+++ b/arch/blackfin/include/asm/param.h
@@ -1,22 +1 @@
1#ifndef _BLACKFIN_PARAM_H #include <asm-generic/param.h>
2#define _BLACKFIN_PARAM_H
3
4#ifdef __KERNEL__
5#define HZ CONFIG_HZ
6#define USER_HZ 100
7#define CLOCKS_PER_SEC (USER_HZ)
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 4096
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif /* _BLACKFIN_PARAM_H */
diff --git a/arch/blackfin/include/asm/pda.h b/arch/blackfin/include/asm/pda.h
index a67142740df0..b42555c1431c 100644
--- a/arch/blackfin/include/asm/pda.h
+++ b/arch/blackfin/include/asm/pda.h
@@ -64,8 +64,6 @@ struct blackfin_pda { /* Per-processor Data Area */
64 64
65extern struct blackfin_pda cpu_pda[]; 65extern struct blackfin_pda cpu_pda[];
66 66
67void reserve_pda(void);
68
69#endif /* __ASSEMBLY__ */ 67#endif /* __ASSEMBLY__ */
70 68
71#endif /* _ASM_BLACKFIN_PDA_H */ 69#endif /* _ASM_BLACKFIN_PDA_H */
diff --git a/arch/blackfin/include/asm/percpu.h b/arch/blackfin/include/asm/percpu.h
index c94c7bc88c71..06a959d67234 100644
--- a/arch/blackfin/include/asm/percpu.h
+++ b/arch/blackfin/include/asm/percpu.h
@@ -1,6 +1 @@
1#ifndef __ARCH_BLACKFIN_PERCPU__
2#define __ARCH_BLACKFIN_PERCPU__
3
4#include <asm-generic/percpu.h> #include <asm-generic/percpu.h>
5
6#endif /* __ARCH_BLACKFIN_PERCPU__ */
diff --git a/arch/blackfin/include/asm/pgalloc.h b/arch/blackfin/include/asm/pgalloc.h
index c686e0542fd0..f261cb7dda06 100644
--- a/arch/blackfin/include/asm/pgalloc.h
+++ b/arch/blackfin/include/asm/pgalloc.h
@@ -1,8 +1 @@
1#ifndef _BLACKFIN_PGALLOC_H #include <asm-generic/pgalloc.h>
2#define _BLACKFIN_PGALLOC_H
3
4#include <asm/setup.h>
5
6#define check_pgt_cache() do { } while (0)
7
8#endif /* _BLACKFIN_PGALLOC_H */
diff --git a/arch/blackfin/include/asm/poll.h b/arch/blackfin/include/asm/poll.h
index 94cc2636e0e2..a0556671357b 100644
--- a/arch/blackfin/include/asm/poll.h
+++ b/arch/blackfin/include/asm/poll.h
@@ -1,24 +1,9 @@
1#ifndef __BFIN_POLL_H 1#ifndef __BFIN_POLL_H
2#define __BFIN_POLL_H 2#define __BFIN_POLL_H
3 3
4#define POLLIN 1 4#define POLLWRNORM 4 /* POLLOUT */
5#define POLLPRI 2
6#define POLLOUT 4
7#define POLLERR 8
8#define POLLHUP 16
9#define POLLNVAL 32
10#define POLLRDNORM 64
11#define POLLWRNORM POLLOUT
12#define POLLRDBAND 128
13#define POLLWRBAND 256 5#define POLLWRBAND 256
14#define POLLMSG 0x0400
15#define POLLREMOVE 0x1000
16#define POLLRDHUP 0x2000
17 6
18struct pollfd { 7#include <asm-generic/poll.h>
19 int fd;
20 short events;
21 short revents;
22};
23 8
24#endif /* __BFIN_POLL_H */ 9#endif
diff --git a/arch/blackfin/include/asm/posix_types.h b/arch/blackfin/include/asm/posix_types.h
index 23aa1f8c1bd1..80c9d64eb26c 100644
--- a/arch/blackfin/include/asm/posix_types.h
+++ b/arch/blackfin/include/asm/posix_types.h
@@ -1,61 +1,27 @@
1#ifndef __ARCH_BFIN_POSIX_TYPES_H 1#ifndef __ARCH_BFIN_POSIX_TYPES_H
2#define __ARCH_BFIN_POSIX_TYPES_H 2#define __ARCH_BFIN_POSIX_TYPES_H
3 3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t; 4typedef unsigned short __kernel_mode_t;
5#define __kernel_mode_t __kernel_mode_t
6
12typedef unsigned short __kernel_nlink_t; 7typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t; 8#define __kernel_nlink_t __kernel_nlink_t
14typedef int __kernel_pid_t; 9
15typedef unsigned int __kernel_ipc_pid_t; 10typedef unsigned int __kernel_ipc_pid_t;
16typedef unsigned int __kernel_uid_t; 11#define __kernel_ipc_pid_t __kernel_ipc_pid_t
17typedef unsigned int __kernel_gid_t; 12
18typedef unsigned long __kernel_size_t; 13typedef unsigned long __kernel_size_t;
19typedef long __kernel_ssize_t; 14typedef long __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t; 15typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t; 16#define __kernel_size_t __kernel_size_t
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char *__kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32 17
33typedef unsigned short __kernel_old_uid_t; 18typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t; 19typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t; 20#define __kernel_old_uid_t __kernel_old_uid_t
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40 21
41typedef struct { 22typedef unsigned short __kernel_old_dev_t;
42 int val[2]; 23#define __kernel_old_dev_t __kernel_old_dev_t
43} __kernel_fsid_t;
44
45#if defined(__KERNEL__)
46
47#undef __FD_SET
48#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
49
50#undef __FD_CLR
51#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
52
53#undef __FD_ISSET
54#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
55
56#undef __FD_ZERO
57#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
58 24
59#endif /* defined(__KERNEL__) */ 25#include <asm-generic/posix_types.h>
60 26
61#endif 27#endif
diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h
index 0eece23b41c7..d0be99be8308 100644
--- a/arch/blackfin/include/asm/processor.h
+++ b/arch/blackfin/include/asm/processor.h
@@ -7,9 +7,8 @@
7 */ 7 */
8#define current_text_addr() ({ __label__ _l; _l: &&_l;}) 8#define current_text_addr() ({ __label__ _l; _l: &&_l;})
9 9
10#include <asm/ptrace.h>
10#include <asm/blackfin.h> 11#include <asm/blackfin.h>
11#include <asm/segment.h>
12#include <linux/compiler.h>
13 12
14static inline unsigned long rdusp(void) 13static inline unsigned long rdusp(void)
15{ 14{
@@ -59,36 +58,8 @@ struct thread_struct {
59 PS_S, 0, 0 \ 58 PS_S, 0, 0 \
60} 59}
61 60
62/* 61extern void start_thread(struct pt_regs *regs, unsigned long new_ip,
63 * Do necessary setup to start up a newly executed thread. 62 unsigned long new_sp);
64 *
65 * pass the data segment into user programs if it exists,
66 * it can't hurt anything as far as I can tell
67 */
68#ifndef CONFIG_SMP
69#define start_thread(_regs, _pc, _usp) \
70do { \
71 set_fs(USER_DS); \
72 (_regs)->pc = (_pc); \
73 if (current->mm) \
74 (_regs)->p5 = current->mm->start_data; \
75 task_thread_info(current)->l1_task_info.stack_start \
76 = (void *)current->mm->context.stack_start; \
77 task_thread_info(current)->l1_task_info.lowest_sp = (void *)(_usp); \
78 memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info, \
79 sizeof(*L1_SCRATCH_TASK_INFO)); \
80 wrusp(_usp); \
81} while(0)
82#else
83#define start_thread(_regs, _pc, _usp) \
84do { \
85 set_fs(USER_DS); \
86 (_regs)->pc = (_pc); \
87 if (current->mm) \
88 (_regs)->p5 = current->mm->start_data; \
89 wrusp(_usp); \
90} while (0)
91#endif
92 63
93/* Forward declaration, a strange C thing */ 64/* Forward declaration, a strange C thing */
94struct task_struct; 65struct task_struct;
@@ -131,8 +102,8 @@ unsigned long get_wchan(struct task_struct *p);
131/* Get the Silicon Revision of the chip */ 102/* Get the Silicon Revision of the chip */
132static inline uint32_t __pure bfin_revid(void) 103static inline uint32_t __pure bfin_revid(void)
133{ 104{
134 /* stored in the upper 4 bits */ 105 /* Always use CHIPID, to work around ANOMALY_05000234 */
135 uint32_t revid = bfin_read_CHIPID() >> 28; 106 uint32_t revid = (bfin_read_CHIPID() & CHIPID_VERSION) >> 28;
136 107
137#ifdef CONFIG_BF52x 108#ifdef CONFIG_BF52x
138 /* ANOMALY_05000357 109 /* ANOMALY_05000357
diff --git a/arch/blackfin/include/asm/resource.h b/arch/blackfin/include/asm/resource.h
index 091355ab3495..04bc4db8921b 100644
--- a/arch/blackfin/include/asm/resource.h
+++ b/arch/blackfin/include/asm/resource.h
@@ -1,6 +1 @@
1#ifndef _BFIN_RESOURCE_H
2#define _BFIN_RESOURCE_H
3
4#include <asm-generic/resource.h> #include <asm-generic/resource.h>
5
6#endif /* _BFIN_RESOURCE_H */
diff --git a/arch/blackfin/include/asm/sections.h b/arch/blackfin/include/asm/sections.h
index 1443c3353a8c..e7fd0ecd73f7 100644
--- a/arch/blackfin/include/asm/sections.h
+++ b/arch/blackfin/include/asm/sections.h
@@ -4,4 +4,15 @@
4/* nothing to see, move along */ 4/* nothing to see, move along */
5#include <asm-generic/sections.h> 5#include <asm-generic/sections.h>
6 6
7/* only used when MTD_UCLINUX */
8extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size;
9
10extern unsigned long _ramstart, _ramend, _rambase;
11extern unsigned long memory_start, memory_end, physical_mem_end;
12
13extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[],
14 _ebss_l1[], _l1_lma_start[], _sdata_b_l1[], _sbss_b_l1[], _ebss_b_l1[],
15 _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[],
16 _ebss_l2[], _l2_lma_start[];
17
7#endif 18#endif
diff --git a/arch/blackfin/include/asm/sembuf.h b/arch/blackfin/include/asm/sembuf.h
index 18deb5c7fa5d..7673b83cfef7 100644
--- a/arch/blackfin/include/asm/sembuf.h
+++ b/arch/blackfin/include/asm/sembuf.h
@@ -1,25 +1 @@
1#ifndef _BFIN_SEMBUF_H #include <asm-generic/sembuf.h>
2#define _BFIN_SEMBUF_H
3
4/*
5 * The semid64_ds structure for bfin architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _BFIN_SEMBUF_H */
diff --git a/arch/blackfin/include/asm/serial.h b/arch/blackfin/include/asm/serial.h
index 3a47606c858b..94a4a12e3bf2 100644
--- a/arch/blackfin/include/asm/serial.h
+++ b/arch/blackfin/include/asm/serial.h
@@ -1,6 +1,2 @@
1/* 1#include <asm-generic/serial.h>
2 * include/asm-blackfin/serial.h
3 */
4
5#define SERIAL_EXTRA_IRQ_FLAGS IRQF_TRIGGER_HIGH 2#define SERIAL_EXTRA_IRQ_FLAGS IRQF_TRIGGER_HIGH
6#define BASE_BAUD (1843200 / 16)
diff --git a/arch/blackfin/include/asm/setup.h b/arch/blackfin/include/asm/setup.h
index 01c8c6cbe6fc..552df83f1a49 100644
--- a/arch/blackfin/include/asm/setup.h
+++ b/arch/blackfin/include/asm/setup.h
@@ -1,17 +1 @@
1/* #include <asm-generic/setup.h>
2** asm/setup.h -- Definition of the Linux/bfin setup information
3**
4** This file is subject to the terms and conditions of the GNU General Public
5** License. See the file COPYING in the main directory of this archive
6** for more details.
7**
8** Copyright Lineo, Inc 2001 Tony Kou
9**
10*/
11
12#ifndef _BFIN_SETUP_H
13#define _BFIN_SETUP_H
14
15#define COMMAND_LINE_SIZE 512
16
17#endif /* _BFIN_SETUP_H */
diff --git a/arch/blackfin/include/asm/shmbuf.h b/arch/blackfin/include/asm/shmbuf.h
index 612436303e89..83c05fc2de38 100644
--- a/arch/blackfin/include/asm/shmbuf.h
+++ b/arch/blackfin/include/asm/shmbuf.h
@@ -1,42 +1 @@
1#ifndef _BFIN_SHMBUF_H #include <asm-generic/shmbuf.h>
2#define _BFIN_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for bfin architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _BFIN_SHMBUF_H */
diff --git a/arch/blackfin/include/asm/shmparam.h b/arch/blackfin/include/asm/shmparam.h
index 3c03906b7664..93f30deb95d0 100644
--- a/arch/blackfin/include/asm/shmparam.h
+++ b/arch/blackfin/include/asm/shmparam.h
@@ -1,6 +1 @@
1#ifndef _BFIN_SHMPARAM_H #include <asm-generic/shmparam.h>
2#define _BFIN_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _BFIN_SHMPARAM_H */
diff --git a/arch/blackfin/include/asm/signal.h b/arch/blackfin/include/asm/signal.h
index 87951d251458..77a3bf37b69d 100644
--- a/arch/blackfin/include/asm/signal.h
+++ b/arch/blackfin/include/asm/signal.h
@@ -1,160 +1,7 @@
1#ifndef _BLACKFIN_SIGNAL_H 1#ifndef _BLACKFIN_SIGNAL_H
2#define _BLACKFIN_SIGNAL_H 2#define _BLACKFIN_SIGNAL_H
3 3
4#include <linux/types.h> 4#define SA_RESTORER 0x04000000
5
6/* Avoid too many header ordering problems. */
7struct siginfo;
8
9#ifdef __KERNEL__
10/* Most things should be clean enough to redefine this at will, if care
11 is taken to make libc match. */
12
13#define _NSIG 64
14#define _NSIG_BPW 32
15#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
16
17typedef unsigned long old_sigset_t; /* at least 32 bits */
18
19typedef struct {
20 unsigned long sig[_NSIG_WORDS];
21} sigset_t;
22
23#else
24/* Here we must cater to libcs that poke about in kernel headers. */
25
26#define NSIG 32
27typedef unsigned long sigset_t;
28
29#endif /* __KERNEL__ */
30
31#define SIGHUP 1
32#define SIGINT 2
33#define SIGQUIT 3
34#define SIGILL 4
35#define SIGTRAP 5
36#define SIGABRT 6
37#define SIGIOT 6
38#define SIGBUS 7
39#define SIGFPE 8
40#define SIGKILL 9
41#define SIGUSR1 10
42#define SIGSEGV 11
43#define SIGUSR2 12
44#define SIGPIPE 13
45#define SIGALRM 14
46#define SIGTERM 15
47#define SIGSTKFLT 16
48#define SIGCHLD 17
49#define SIGCONT 18
50#define SIGSTOP 19
51#define SIGTSTP 20
52#define SIGTTIN 21
53#define SIGTTOU 22
54#define SIGURG 23
55#define SIGXCPU 24
56#define SIGXFSZ 25
57#define SIGVTALRM 26
58#define SIGPROF 27
59#define SIGWINCH 28
60#define SIGIO 29
61#define SIGPOLL SIGIO
62/*
63#define SIGLOST 29
64*/
65#define SIGPWR 30
66#define SIGSYS 31
67#define SIGUNUSED 31
68
69/* These should not be considered constants from userland. */
70#define SIGRTMIN 32
71#define SIGRTMAX _NSIG
72
73/*
74 * SA_FLAGS values:
75 *
76 * SA_ONSTACK indicates that a registered stack_t will be used.
77 * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
78 * SA_RESTART flag to get restarting signals (which were the default long ago)
79 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
80 * SA_RESETHAND clears the handler when the signal is delivered.
81 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
82 * SA_NODEFER prevents the current signal from being masked in the handler.
83 *
84 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
85 * Unix names RESETHAND and NODEFER respectively.
86 */
87#define SA_NOCLDSTOP 0x00000001
88#define SA_NOCLDWAIT 0x00000002 /* not supported yet */
89#define SA_SIGINFO 0x00000004
90#define SA_ONSTACK 0x08000000
91#define SA_RESTART 0x10000000
92#define SA_NODEFER 0x40000000
93#define SA_RESETHAND 0x80000000
94
95#define SA_NOMASK SA_NODEFER
96#define SA_ONESHOT SA_RESETHAND
97
98/*
99 * sigaltstack controls
100 */
101#define SS_ONSTACK 1
102#define SS_DISABLE 2
103
104#define MINSIGSTKSZ 2048
105#define SIGSTKSZ 8192
106
107#include <asm-generic/signal.h> 5#include <asm-generic/signal.h>
108 6
109#ifdef __KERNEL__ 7#endif
110struct old_sigaction {
111 __sighandler_t sa_handler;
112 old_sigset_t sa_mask;
113 unsigned long sa_flags;
114 void (*sa_restorer) (void);
115};
116
117struct sigaction {
118 __sighandler_t sa_handler;
119 unsigned long sa_flags;
120 void (*sa_restorer) (void);
121 sigset_t sa_mask; /* mask last for extensibility */
122};
123
124struct k_sigaction {
125 struct sigaction sa;
126};
127#else
128/* Here we must cater to libcs that poke about in kernel headers. */
129
130struct sigaction {
131 union {
132 __sighandler_t _sa_handler;
133 void (*_sa_sigaction) (int, struct siginfo *, void *);
134 } _u;
135 sigset_t sa_mask;
136 unsigned long sa_flags;
137 void (*sa_restorer) (void);
138};
139
140#define sa_handler _u._sa_handler
141#define sa_sigaction _u._sa_sigaction
142
143#endif /* __KERNEL__ */
144
145typedef struct sigaltstack {
146 void __user *ss_sp;
147 int ss_flags;
148 size_t ss_size;
149} stack_t;
150
151#ifdef __KERNEL__
152
153#include <asm/sigcontext.h>
154#undef __HAVE_ARCH_SIG_BITOPS
155
156#define ptrace_signal_deliver(regs, cookie) do { } while (0)
157
158#endif /* __KERNEL__ */
159
160#endif /* _BLACKFIN_SIGNAL_H */
diff --git a/arch/blackfin/include/asm/socket.h b/arch/blackfin/include/asm/socket.h
index fac7fe9e1f8a..6b71384b9d8b 100644
--- a/arch/blackfin/include/asm/socket.h
+++ b/arch/blackfin/include/asm/socket.h
@@ -1,59 +1 @@
1#ifndef _ASM_SOCKET_H #include <asm-generic/socket.h>
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockoptions(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49#define SO_PEERSEC 31
50#define SO_PASSSEC 34
51#define SO_TIMESTAMPNS 35
52#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
53
54#define SO_MARK 36
55
56#define SO_TIMESTAMPING 37
57#define SCM_TIMESTAMPING SO_TIMESTAMPING
58
59#endif /* _ASM_SOCKET_H */
diff --git a/arch/blackfin/include/asm/sockios.h b/arch/blackfin/include/asm/sockios.h
index 426b89bfaa8b..def6d4746ee7 100644
--- a/arch/blackfin/include/asm/sockios.h
+++ b/arch/blackfin/include/asm/sockios.h
@@ -1,13 +1 @@
1#ifndef __ARCH_BFIN_SOCKIOS__ #include <asm-generic/sockios.h>
2#define __ARCH_BFIN_SOCKIOS__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* __ARCH_BFIN_SOCKIOS__ */
diff --git a/arch/blackfin/include/asm/spinlock.h b/arch/blackfin/include/asm/spinlock.h
index 0249ac319476..d6ff4b59fcb1 100644
--- a/arch/blackfin/include/asm/spinlock.h
+++ b/arch/blackfin/include/asm/spinlock.h
@@ -1,6 +1,10 @@
1#ifndef __BFIN_SPINLOCK_H 1#ifndef __BFIN_SPINLOCK_H
2#define __BFIN_SPINLOCK_H 2#define __BFIN_SPINLOCK_H
3 3
4#ifndef CONFIG_SMP
5# include <asm-generic/spinlock.h>
6#else
7
4#include <asm/atomic.h> 8#include <asm/atomic.h>
5 9
6asmlinkage int __raw_spin_is_locked_asm(volatile int *ptr); 10asmlinkage int __raw_spin_is_locked_asm(volatile int *ptr);
@@ -86,4 +90,6 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw)
86#define _raw_read_relax(lock) cpu_relax() 90#define _raw_read_relax(lock) cpu_relax()
87#define _raw_write_relax(lock) cpu_relax() 91#define _raw_write_relax(lock) cpu_relax()
88 92
93#endif
94
89#endif /* !__BFIN_SPINLOCK_H */ 95#endif /* !__BFIN_SPINLOCK_H */
diff --git a/arch/blackfin/include/asm/statfs.h b/arch/blackfin/include/asm/statfs.h
index 350672091ba3..0b91fe198c20 100644
--- a/arch/blackfin/include/asm/statfs.h
+++ b/arch/blackfin/include/asm/statfs.h
@@ -1,6 +1 @@
1#ifndef _BFIN_STATFS_H
2#define _BFIN_STATFS_H
3
4#include <asm-generic/statfs.h> #include <asm-generic/statfs.h>
5
6#endif /* _BFIN_STATFS_H */
diff --git a/arch/blackfin/include/asm/swab.h b/arch/blackfin/include/asm/swab.h
index 6403ad2932eb..d442113de515 100644
--- a/arch/blackfin/include/asm/swab.h
+++ b/arch/blackfin/include/asm/swab.h
@@ -2,11 +2,7 @@
2#define _BLACKFIN_SWAB_H 2#define _BLACKFIN_SWAB_H
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <linux/compiler.h> 5#include <asm-generic/swab.h>
6
7#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
8# define __SWAB_64_THRU_32__
9#endif
10 6
11#ifdef __GNUC__ 7#ifdef __GNUC__
12 8
diff --git a/arch/blackfin/include/asm/system.h b/arch/blackfin/include/asm/system.h
index a4c8254bec55..85e8f16cf8c2 100644
--- a/arch/blackfin/include/asm/system.h
+++ b/arch/blackfin/include/asm/system.h
@@ -35,10 +35,10 @@
35#define _BLACKFIN_SYSTEM_H 35#define _BLACKFIN_SYSTEM_H
36 36
37#include <linux/linkage.h> 37#include <linux/linkage.h>
38#include <linux/compiler.h> 38#include <linux/irqflags.h>
39#include <mach/anomaly.h> 39#include <mach/anomaly.h>
40#include <asm/cache.h>
40#include <asm/pda.h> 41#include <asm/pda.h>
41#include <asm/processor.h>
42#include <asm/irq.h> 42#include <asm/irq.h>
43 43
44/* 44/*
@@ -135,11 +135,13 @@ struct __xchg_dummy {
135}; 135};
136#define __xg(x) ((volatile struct __xchg_dummy *)(x)) 136#define __xg(x) ((volatile struct __xchg_dummy *)(x))
137 137
138#include <mach/blackfin.h>
139
138static inline unsigned long __xchg(unsigned long x, volatile void *ptr, 140static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
139 int size) 141 int size)
140{ 142{
141 unsigned long tmp = 0; 143 unsigned long tmp = 0;
142 unsigned long flags = 0; 144 unsigned long flags;
143 145
144 local_irq_save_hw(flags); 146 local_irq_save_hw(flags);
145 147
diff --git a/arch/blackfin/include/asm/termbits.h b/arch/blackfin/include/asm/termbits.h
index f37feb7cf895..3935b106de79 100644
--- a/arch/blackfin/include/asm/termbits.h
+++ b/arch/blackfin/include/asm/termbits.h
@@ -1,198 +1 @@
1#ifndef __ARCH_BFIN_TERMBITS_H__ #include <asm-generic/termbits.h>
2#define __ARCH_BFIN_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61/* c_iflag bits */
62#define IGNBRK 0000001
63#define BRKINT 0000002
64#define IGNPAR 0000004
65#define PARMRK 0000010
66#define INPCK 0000020
67#define ISTRIP 0000040
68#define INLCR 0000100
69#define IGNCR 0000200
70#define ICRNL 0000400
71#define IUCLC 0001000
72#define IXON 0002000
73#define IXANY 0004000
74#define IXOFF 0010000
75#define IMAXBEL 0020000
76#define IUTF8 0040000
77
78/* c_oflag bits */
79#define OPOST 0000001
80#define OLCUC 0000002
81#define ONLCR 0000004
82#define OCRNL 0000010
83#define ONOCR 0000020
84#define ONLRET 0000040
85#define OFILL 0000100
86#define OFDEL 0000200
87#define NLDLY 0000400
88#define NL0 0000000
89#define NL1 0000400
90#define CRDLY 0003000
91#define CR0 0000000
92#define CR1 0001000
93#define CR2 0002000
94#define CR3 0003000
95#define TABDLY 0014000
96#define TAB0 0000000
97#define TAB1 0004000
98#define TAB2 0010000
99#define TAB3 0014000
100#define XTABS 0014000
101#define BSDLY 0020000
102#define BS0 0000000
103#define BS1 0020000
104#define VTDLY 0040000
105#define VT0 0000000
106#define VT1 0040000
107#define FFDLY 0100000
108#define FF0 0000000
109#define FF1 0100000
110
111/* c_cflag bit meaning */
112#define CBAUD 0010017
113#define B0 0000000 /* hang up */
114#define B50 0000001
115#define B75 0000002
116#define B110 0000003
117#define B134 0000004
118#define B150 0000005
119#define B200 0000006
120#define B300 0000007
121#define B600 0000010
122#define B1200 0000011
123#define B1800 0000012
124#define B2400 0000013
125#define B4800 0000014
126#define B9600 0000015
127#define B19200 0000016
128#define B38400 0000017
129#define EXTA B19200
130#define EXTB B38400
131#define CSIZE 0000060
132#define CS5 0000000
133#define CS6 0000020
134#define CS7 0000040
135#define CS8 0000060
136#define CSTOPB 0000100
137#define CREAD 0000200
138#define PARENB 0000400
139#define PARODD 0001000
140#define HUPCL 0002000
141#define CLOCAL 0004000
142#define CBAUDEX 0010000
143#define BOTHER 0010000
144#define B57600 0010001
145#define B115200 0010002
146#define B230400 0010003
147#define B460800 0010004
148#define B500000 0010005
149#define B576000 0010006
150#define B921600 0010007
151#define B1000000 0010010
152#define B1152000 0010011
153#define B1500000 0010012
154#define B2000000 0010013
155#define B2500000 0010014
156#define B3000000 0010015
157#define B3500000 0010016
158#define B4000000 0010017
159#define CIBAUD 002003600000 /* input baud rate */
160#define CMSPAR 010000000000 /* mark or space (stick) parity */
161#define CRTSCTS 020000000000 /* flow control */
162
163#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
164
165/* c_lflag bits */
166#define ISIG 0000001
167#define ICANON 0000002
168#define XCASE 0000004
169#define ECHO 0000010
170#define ECHOE 0000020
171#define ECHOK 0000040
172#define ECHONL 0000100
173#define NOFLSH 0000200
174#define TOSTOP 0000400
175#define ECHOCTL 0001000
176#define ECHOPRT 0002000
177#define ECHOKE 0004000
178#define FLUSHO 0010000
179#define PENDIN 0040000
180#define IEXTEN 0100000
181
182/* tcflow() and TCXONC use these */
183#define TCOOFF 0
184#define TCOON 1
185#define TCIOFF 2
186#define TCION 3
187
188/* tcflush() and TCFLSH use these */
189#define TCIFLUSH 0
190#define TCOFLUSH 1
191#define TCIOFLUSH 2
192
193/* tcsetattr uses these */
194#define TCSANOW 0
195#define TCSADRAIN 1
196#define TCSAFLUSH 2
197
198#endif /* __ARCH_BFIN_TERMBITS_H__ */
diff --git a/arch/blackfin/include/asm/termios.h b/arch/blackfin/include/asm/termios.h
index d50d063c605a..280d78a9d966 100644
--- a/arch/blackfin/include/asm/termios.h
+++ b/arch/blackfin/include/asm/termios.h
@@ -1,94 +1 @@
1#ifndef __BFIN_TERMIOS_H__ #include <asm-generic/termios.h>
2#define __BFIN_TERMIOS_H__
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43
44/* intr=^C quit=^\ erase=del kill=^U
45 eof=^D vtime=\0 vmin=\1 sxtc=\0
46 start=^Q stop=^S susp=^Z eol=\0
47 reprint=^R discard=^U werase=^W lnext=^V
48 eol2=\0
49*/
50#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
51
52/*
53 * Translate a "termio" structure into a "termios". Ugh.
54 */
55#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
56 unsigned short __tmp; \
57 get_user(__tmp,&(termio)->x); \
58 *(unsigned short *) &(termios)->x = __tmp; \
59}
60
61#define user_termio_to_kernel_termios(termios, termio) \
62({ \
63 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
67 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
68})
69
70/*
71 * Translate a "termios" structure into a "termio". Ugh.
72 */
73#define kernel_termios_to_user_termio(termio, termios) \
74({ \
75 put_user((termios)->c_iflag, &(termio)->c_iflag); \
76 put_user((termios)->c_oflag, &(termio)->c_oflag); \
77 put_user((termios)->c_cflag, &(termio)->c_cflag); \
78 put_user((termios)->c_lflag, &(termio)->c_lflag); \
79 put_user((termios)->c_line, &(termio)->c_line); \
80 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
81})
82
83#define user_termios_to_kernel_termios(k, u) \
84 copy_from_user(k, u, sizeof(struct termios2))
85#define kernel_termios_to_user_termios(u, k) \
86 copy_to_user(u, k, sizeof(struct termios2))
87#define user_termios_to_kernel_termios_1(k, u) \
88 copy_from_user(k, u, sizeof(struct termios))
89#define kernel_termios_to_user_termios_1(u, k) \
90 copy_to_user(u, k, sizeof(struct termios))
91
92#endif /* __KERNEL__ */
93
94#endif /* __BFIN_TERMIOS_H__ */
diff --git a/arch/blackfin/include/asm/time.h b/arch/blackfin/include/asm/time.h
index ddc43ce38533..589e937ed1eb 100644
--- a/arch/blackfin/include/asm/time.h
+++ b/arch/blackfin/include/asm/time.h
@@ -37,4 +37,5 @@ extern unsigned long long __bfin_cycles_off;
37extern unsigned int __bfin_cycles_mod; 37extern unsigned int __bfin_cycles_mod;
38#endif 38#endif
39 39
40extern void __init setup_core_timer(void);
40#endif 41#endif
diff --git a/arch/blackfin/include/asm/tlbflush.h b/arch/blackfin/include/asm/tlbflush.h
index 277b400924b8..f1a06c006ed0 100644
--- a/arch/blackfin/include/asm/tlbflush.h
+++ b/arch/blackfin/include/asm/tlbflush.h
@@ -1,56 +1 @@
1#ifndef _BLACKFIN_TLBFLUSH_H #include <asm-generic/tlbflush.h>
2#define _BLACKFIN_TLBFLUSH_H
3
4/*
5 * Copyright (C) 2000 Lineo, David McCullough <davidm@uclinux.org>
6 * Copyright (C) 2000-2002, Greg Ungerer <gerg@snapgear.com>
7 */
8
9#include <asm/setup.h>
10
11/*
12 * flush all user-space atc entries.
13 */
14static inline void __flush_tlb(void)
15{
16 BUG();
17}
18
19static inline void __flush_tlb_one(unsigned long addr)
20{
21 BUG();
22}
23
24#define flush_tlb() __flush_tlb()
25
26/*
27 * flush all atc entries (both kernel and user-space entries).
28 */
29static inline void flush_tlb_all(void)
30{
31 BUG();
32}
33
34static inline void flush_tlb_mm(struct mm_struct *mm)
35{
36 BUG();
37}
38
39static inline void flush_tlb_page(struct vm_area_struct *vma,
40 unsigned long addr)
41{
42 BUG();
43}
44
45static inline void flush_tlb_range(struct mm_struct *mm,
46 unsigned long start, unsigned long end)
47{
48 BUG();
49}
50
51static inline void flush_tlb_kernel_page(unsigned long addr)
52{
53 BUG();
54}
55
56#endif
diff --git a/arch/blackfin/include/asm/topology.h b/arch/blackfin/include/asm/topology.h
index acee23987897..5428f333a02c 100644
--- a/arch/blackfin/include/asm/topology.h
+++ b/arch/blackfin/include/asm/topology.h
@@ -1,6 +1 @@
1#ifndef _ASM_BLACKFIN_TOPOLOGY_H
2#define _ASM_BLACKFIN_TOPOLOGY_H
3
4#include <asm-generic/topology.h> #include <asm-generic/topology.h>
5
6#endif /* _ASM_BLACKFIN_TOPOLOGY_H */
diff --git a/arch/blackfin/include/asm/traps.h b/arch/blackfin/include/asm/traps.h
index 34f7295fb070..3cdc454cde23 100644
--- a/arch/blackfin/include/asm/traps.h
+++ b/arch/blackfin/include/asm/traps.h
@@ -111,9 +111,7 @@
111 level " bits in the Watchpoint Instruction Address Control register (WPIACTL) is set.\n" 111 level " bits in the Watchpoint Instruction Address Control register (WPIACTL) is set.\n"
112#define EXC_0x2A(level) \ 112#define EXC_0x2A(level) \
113 "Instruction fetch misaligned address violation\n" \ 113 "Instruction fetch misaligned address violation\n" \
114 level " - Attempted misaligned instruction cache fetch. On a misaligned instruction fetch\n" \ 114 level " - Attempted misaligned instruction cache fetch.\n"
115 level " exception, the return address provided in RETX is the destination address which is\n" \
116 level " misaligned, rather than the address of the offending instruction.\n"
117#define EXC_0x2B(level) \ 115#define EXC_0x2B(level) \
118 "CPLB protection violation\n" \ 116 "CPLB protection violation\n" \
119 level " - Illegal instruction fetch access (memory protection violation).\n" 117 level " - Illegal instruction fetch access (memory protection violation).\n"
diff --git a/arch/blackfin/include/asm/types.h b/arch/blackfin/include/asm/types.h
index 8441cbc2bf9e..b9e79bc580dd 100644
--- a/arch/blackfin/include/asm/types.h
+++ b/arch/blackfin/include/asm/types.h
@@ -1,36 +1 @@
1#ifndef _BFIN_TYPES_H #include <asm-generic/types.h>
2#define _BFIN_TYPES_H
3
4/*
5 * This file is never included by application software unless
6 * explicitly requested (e.g., via linux/types.h) in which case the
7 * application is Linux specific so (user-) name space pollution is
8 * not a major issue. However, for interoperability, libraries still
9 * need to be careful to avoid a name clashes.
10 */
11#include <asm-generic/int-ll64.h>
12
13#ifndef __ASSEMBLY__
14
15typedef unsigned short umode_t;
16
17#endif /* __ASSEMBLY__ */
18/*
19 * These aren't exported outside the kernel to avoid name space clashes
20 */
21#ifdef __KERNEL__
22
23#define BITS_PER_LONG 32
24
25#ifndef __ASSEMBLY__
26
27/* Dma addresses are 32-bits wide. */
28
29typedef u32 dma_addr_t;
30typedef u64 dma64_addr_t;
31
32#endif /* __ASSEMBLY__ */
33
34#endif /* __KERNEL__ */
35
36#endif /* _BFIN_TYPES_H */
diff --git a/arch/blackfin/include/asm/uaccess.h b/arch/blackfin/include/asm/uaccess.h
index 3248033531e6..2f469a1f80fb 100644
--- a/arch/blackfin/include/asm/uaccess.h
+++ b/arch/blackfin/include/asm/uaccess.h
@@ -59,12 +59,8 @@ static inline int is_in_rom(unsigned long addr)
59#ifndef CONFIG_ACCESS_CHECK 59#ifndef CONFIG_ACCESS_CHECK
60static inline int _access_ok(unsigned long addr, unsigned long size) { return 1; } 60static inline int _access_ok(unsigned long addr, unsigned long size) { return 1; }
61#else 61#else
62#ifdef CONFIG_ACCESS_OK_L1
63extern int _access_ok(unsigned long addr, unsigned long size)__attribute__((l1_text));
64#else
65extern int _access_ok(unsigned long addr, unsigned long size); 62extern int _access_ok(unsigned long addr, unsigned long size);
66#endif 63#endif
67#endif
68 64
69/* 65/*
70 * The exception table consists of pairs of addresses: the first is the 66 * The exception table consists of pairs of addresses: the first is the
@@ -83,9 +79,6 @@ struct exception_table_entry {
83 unsigned long insn, fixup; 79 unsigned long insn, fixup;
84}; 80};
85 81
86/* Returns 0 if exception not found and fixup otherwise. */
87extern unsigned long search_exception_table(unsigned long);
88
89/* 82/*
90 * These are the main single-value transfer routines. They automatically 83 * These are the main single-value transfer routines. They automatically
91 * use the right size if we just have the right pointer type. 84 * use the right size if we just have the right pointer type.
@@ -233,16 +226,29 @@ strncpy_from_user(char *dst, const char *src, long count)
233} 226}
234 227
235/* 228/*
236 * Return the size of a string (including the ending 0) 229 * Get the size of a string in user space.
230 * src: The string to measure
231 * n: The maximum valid length
232 *
233 * Get the size of a NUL-terminated string in user space.
237 * 234 *
238 * Return 0 on exception, a value greater than N if too long 235 * Returns the size of the string INCLUDING the terminating NUL.
236 * On exception, returns 0.
237 * If the string is too long, returns a value greater than n.
239 */ 238 */
240static inline long strnlen_user(const char *src, long n) 239static inline long __must_check strnlen_user(const char *src, long n)
241{ 240{
242 return (strlen(src) + 1); 241 if (!access_ok(VERIFY_READ, src, 1))
242 return 0;
243 return strnlen(src, n) + 1;
243} 244}
244 245
245#define strlen_user(str) strnlen_user(str, 32767) 246static inline long __must_check strlen_user(const char *src)
247{
248 if (!access_ok(VERIFY_READ, src, 1))
249 return 0;
250 return strlen(src) + 1;
251}
246 252
247/* 253/*
248 * Zero Userspace 254 * Zero Userspace
@@ -251,10 +257,34 @@ static inline long strnlen_user(const char *src, long n)
251static inline unsigned long __must_check 257static inline unsigned long __must_check
252__clear_user(void *to, unsigned long n) 258__clear_user(void *to, unsigned long n)
253{ 259{
260 if (!access_ok(VERIFY_WRITE, to, n))
261 return n;
254 memset(to, 0, n); 262 memset(to, 0, n);
255 return 0; 263 return 0;
256} 264}
257 265
258#define clear_user(to, n) __clear_user(to, n) 266#define clear_user(to, n) __clear_user(to, n)
259 267
268/* How to interpret these return values:
269 * CORE: can be accessed by core load or dma memcpy
270 * CORE_ONLY: can only be accessed by core load
271 * DMA: can only be accessed by dma memcpy
272 * IDMA: can only be accessed by interprocessor dma memcpy (BF561)
273 * ITEST: can be accessed by isram memcpy or dma memcpy
274 */
275enum {
276 BFIN_MEM_ACCESS_CORE = 0,
277 BFIN_MEM_ACCESS_CORE_ONLY,
278 BFIN_MEM_ACCESS_DMA,
279 BFIN_MEM_ACCESS_IDMA,
280 BFIN_MEM_ACCESS_ITEST,
281};
282/**
283 * bfin_mem_access_type() - what kind of memory access is required
284 * @addr: the address to check
285 * @size: number of bytes needed
286 * @return: <0 is error, >=0 is BFIN_MEM_ACCESS_xxx enum (see above)
287 */
288int bfin_mem_access_type(unsigned long addr, unsigned long size);
289
260#endif /* _BLACKFIN_UACCESS_H */ 290#endif /* _BLACKFIN_UACCESS_H */
diff --git a/arch/blackfin/include/asm/ucontext.h b/arch/blackfin/include/asm/ucontext.h
index 4a4e3856beba..9bc07b9f30fb 100644
--- a/arch/blackfin/include/asm/ucontext.h
+++ b/arch/blackfin/include/asm/ucontext.h
@@ -1,17 +1 @@
1/** Changes made by Tony Kou Lineo Inc. May 2001 #include <asm-generic/ucontext.h>
2 *
3 * Based on: include/m68knommu/ucontext.h
4 */
5
6#ifndef _BLACKFIN_UCONTEXT_H
7#define _BLACKFIN_UCONTEXT_H
8
9struct ucontext {
10 unsigned long uc_flags; /* the others are necessary */
11 struct ucontext *uc_link;
12 stack_t uc_stack;
13 struct sigcontext uc_mcontext;
14 sigset_t uc_sigmask; /* mask last for extensibility */
15};
16
17#endif /* _BLACKFIN_UCONTEXT_H */
diff --git a/arch/blackfin/include/asm/unaligned.h b/arch/blackfin/include/asm/unaligned.h
index fd8a1d634945..6cecbbb2111f 100644
--- a/arch/blackfin/include/asm/unaligned.h
+++ b/arch/blackfin/include/asm/unaligned.h
@@ -1,11 +1 @@
1#ifndef _ASM_BLACKFIN_UNALIGNED_H #include <asm-generic/unaligned.h>
2#define _ASM_BLACKFIN_UNALIGNED_H
3
4#include <linux/unaligned/le_struct.h>
5#include <linux/unaligned/be_byteshift.h>
6#include <linux/unaligned/generic.h>
7
8#define get_unaligned __get_unaligned_le
9#define put_unaligned __put_unaligned_le
10
11#endif /* _ASM_BLACKFIN_UNALIGNED_H */
diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h
index cf5066d3efd2..c8e7ee4768cd 100644
--- a/arch/blackfin/include/asm/unistd.h
+++ b/arch/blackfin/include/asm/unistd.h
@@ -380,8 +380,10 @@
380#define __NR_inotify_init1 365 380#define __NR_inotify_init1 365
381#define __NR_preadv 366 381#define __NR_preadv 366
382#define __NR_pwritev 367 382#define __NR_pwritev 367
383#define __NR_rt_tgsigqueueinfo 368
384#define __NR_perf_counter_open 369
383 385
384#define __NR_syscall 368 386#define __NR_syscall 370
385#define NR_syscalls __NR_syscall 387#define NR_syscalls __NR_syscall
386 388
387/* Old optional stuff no one actually uses */ 389/* Old optional stuff no one actually uses */
diff --git a/arch/blackfin/include/asm/user.h b/arch/blackfin/include/asm/user.h
index afe6a0e1f7ce..4792a60831e4 100644
--- a/arch/blackfin/include/asm/user.h
+++ b/arch/blackfin/include/asm/user.h
@@ -1,89 +1 @@
1#ifndef _BFIN_USER_H #include <asm-generic/user.h>
2#define _BFIN_USER_H
3
4/* Changes by Tony Kou Lineo, Inc. July, 2001
5 *
6 * Based include/asm-m68knommu/user.h
7 *
8 */
9
10/* Core file format: The core file is written in such a way that gdb
11 can understand it and provide useful information to the user (under
12 linux we use the 'trad-core' bfd). There are quite a number of
13 obstacles to being able to view the contents of the floating point
14 registers, and until these are solved you will not be able to view the
15 contents of them. Actually, you can read in the core file and look at
16 the contents of the user struct to find out what the floating point
17 registers contain.
18 The actual file contents are as follows:
19 UPAGE: 1 page consisting of a user struct that tells gdb what is present
20 in the file. Directly after this is a copy of the task_struct, which
21 is currently not used by gdb, but it may come in useful at some point.
22 All of the registers are stored as part of the upage. The upage should
23 always be only one page.
24 DATA: The data area is stored. We use current->end_text to
25 current->brk to pick up all of the user variables, plus any memory
26 that may have been malloced. No attempt is made to determine if a page
27 is demand-zero or if a page is totally unused, we just cover the entire
28 range. All of the addresses are rounded in such a way that an integral
29 number of pages is written.
30 STACK: We need the stack information in order to get a meaningful
31 backtrace. We need to write the data from (esp) to
32 current->start_stack, so we round each of these off in order to be able
33 to write an integer number of pages.
34 The minimum core file size is 3 pages, or 12288 bytes.
35*/
36struct user_bfinfp_struct {
37};
38
39/* This is the old layout of "struct pt_regs" as of Linux 1.x, and
40 is still the layout used by user (the new pt_regs doesn't have
41 all registers). */
42struct user_regs_struct {
43 long r0, r1, r2, r3, r4, r5, r6, r7;
44 long p0, p1, p2, p3, p4, p5, usp, fp;
45 long i0, i1, i2, i3;
46 long l0, l1, l2, l3;
47 long b0, b1, b2, b3;
48 long m0, m1, m2, m3;
49 long a0w, a1w;
50 long a0x, a1x;
51 unsigned long rets;
52 unsigned long astat;
53 unsigned long pc;
54 unsigned long orig_p0;
55};
56
57/* When the kernel dumps core, it starts by dumping the user struct -
58 this will be used by gdb to figure out where the data and stack segments
59 are within the file, and what virtual addresses to use. */
60
61struct user {
62/* We start with the registers, to mimic the way that "memory" is returned
63 from the ptrace(3,...) function. */
64
65 struct user_regs_struct regs; /* Where the registers are actually stored */
66
67/* The rest of this junk is to help gdb figure out what goes where */
68 unsigned long int u_tsize; /* Text segment size (pages). */
69 unsigned long int u_dsize; /* Data segment size (pages). */
70 unsigned long int u_ssize; /* Stack segment size (pages). */
71 unsigned long start_code; /* Starting virtual address of text. */
72 unsigned long start_stack; /* Starting virtual address of stack area.
73 This is actually the bottom of the stack,
74 the top of the stack is always found in the
75 esp register. */
76 long int signal; /* Signal that caused the core dump. */
77 int reserved; /* No longer used */
78 unsigned long u_ar0;
79 /* Used by gdb to help find the values for */
80 /* the registers. */
81 unsigned long magic; /* To uniquely identify a core file */
82 char u_comm[32]; /* User command that was responsible */
83};
84#define NBPG PAGE_SIZE
85#define UPAGES 1
86#define HOST_TEXT_START_ADDR (u.start_code)
87#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
88
89#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-02 13:44:25 -0500