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author | Mike Frysinger <vapier@gentoo.org> | 2010-06-08 23:02:09 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2010-08-06 12:55:49 -0400 |
commit | 502c8a0e07450ff886b80a11150a123bae92f3f7 (patch) | |
tree | 23cb5a47714e4f863035edfbde5c712dd820d314 /arch/blackfin/include | |
parent | 306208f40cde5f835e891976031571b81815b9df (diff) |
Blackfin: BF51x: fix handling of PH8 (the "internal" SPI0SEL4 pin)
Even though the PH8 pin is only internal to the processor packaging, it
can be controlled like any other GPIO pin. Now that we have a proper GPIO
define, we can fix the SPI0 CS4 define for the internal SPI flash.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/include')
0 files changed, 0 insertions, 0 deletions