aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/include
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2015-02-21 15:59:04 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2015-02-21 15:59:04 -0500
commit1acd2de5facd7fbea499aea64a3a3d0ec7bb9b51 (patch)
tree21e5aed9925f3171d2c8c472193b1a5b635d8fdd /arch/blackfin/include
parentb5ccb078c806f4804aaf85bb59faa9b6fedf85a7 (diff)
parent4c971aa78314253cce914ed29e3d90df3326d646 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull more input updates from Dmitry Torokhov: "The second round of updates for the input subsystem. Updates to ALPS an bfin_roraty drivers and a couple oother fixups" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: psmouse - use IS_ENABLED instead of homegrown code Input: bfin_rotary - introduce open and close methods Input: bfin_rotary - convert to use managed resources Input: bfin_rotary - use generic IO functions Input: bfin_rotary - move pin lists into into platform data Input: bfin_rotary - move platform header to linux/platform_data Input: bfin_rotary - mark suspend and resume code as __maybe_unused Input: bfin_rotary - fix potential oops in interrupt handler Input: ALPS - move v7 packet info to Documentation and v6 packet info Input: ALPS - fix confusing comment in protocol data Input: ALPS - do not mix trackstick and external PS/2 mouse data Input: ALPS - fix trackstick detection on some Dell Latitudes Input: ALPS - consolidate setting protocol parameters Input: ALPS - split protocol data from model info Input: ALPS - make Rushmore a separate protocol Input: ALPS - renumber protocol numbers Input: adi - remove an unnecessary check Input: pxa27x_keypad - remove an unneeded NULL check Input: soc_button_array - use "Windows" key for "Home"
Diffstat (limited to 'arch/blackfin/include')
-rw-r--r--arch/blackfin/include/asm/bfin_rotary.h116
1 files changed, 0 insertions, 116 deletions
diff --git a/arch/blackfin/include/asm/bfin_rotary.h b/arch/blackfin/include/asm/bfin_rotary.h
deleted file mode 100644
index 8895a750c70c..000000000000
--- a/arch/blackfin/include/asm/bfin_rotary.h
+++ /dev/null
@@ -1,116 +0,0 @@
1/*
2 * board initialization should put one of these structures into platform_data
3 * and place the bfin-rotary onto platform_bus named "bfin-rotary".
4 *
5 * Copyright 2008-2010 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#ifndef _BFIN_ROTARY_H
11#define _BFIN_ROTARY_H
12
13/* mode bitmasks */
14#define ROT_QUAD_ENC CNTMODE_QUADENC /* quadrature/grey code encoder mode */
15#define ROT_BIN_ENC CNTMODE_BINENC /* binary encoder mode */
16#define ROT_UD_CNT CNTMODE_UDCNT /* rotary counter mode */
17#define ROT_DIR_CNT CNTMODE_DIRCNT /* direction counter mode */
18
19#define ROT_DEBE DEBE /* Debounce Enable */
20
21#define ROT_CDGINV CDGINV /* CDG Pin Polarity Invert */
22#define ROT_CUDINV CUDINV /* CUD Pin Polarity Invert */
23#define ROT_CZMINV CZMINV /* CZM Pin Polarity Invert */
24
25struct bfin_rotary_platform_data {
26 /* set rotary UP KEY_### or BTN_### in case you prefer
27 * bfin-rotary to send EV_KEY otherwise set 0
28 */
29 unsigned int rotary_up_key;
30 /* set rotary DOWN KEY_### or BTN_### in case you prefer
31 * bfin-rotary to send EV_KEY otherwise set 0
32 */
33 unsigned int rotary_down_key;
34 /* set rotary BUTTON KEY_### or BTN_### */
35 unsigned int rotary_button_key;
36 /* set rotary Relative Axis REL_### in case you prefer
37 * bfin-rotary to send EV_REL otherwise set 0
38 */
39 unsigned int rotary_rel_code;
40 unsigned short debounce; /* 0..17 */
41 unsigned short mode;
42 unsigned short pm_wakeup;
43};
44
45/* CNT_CONFIG bitmasks */
46#define CNTE (1 << 0) /* Counter Enable */
47#define DEBE (1 << 1) /* Debounce Enable */
48#define CDGINV (1 << 4) /* CDG Pin Polarity Invert */
49#define CUDINV (1 << 5) /* CUD Pin Polarity Invert */
50#define CZMINV (1 << 6) /* CZM Pin Polarity Invert */
51#define CNTMODE_SHIFT 8
52#define CNTMODE (0x7 << CNTMODE_SHIFT) /* Counter Operating Mode */
53#define ZMZC (1 << 1) /* CZM Zeroes Counter Enable */
54#define BNDMODE_SHIFT 12
55#define BNDMODE (0x3 << BNDMODE_SHIFT) /* Boundary register Mode */
56#define INPDIS (1 << 15) /* CUG and CDG Input Disable */
57
58#define CNTMODE_QUADENC (0 << CNTMODE_SHIFT) /* quadrature encoder mode */
59#define CNTMODE_BINENC (1 << CNTMODE_SHIFT) /* binary encoder mode */
60#define CNTMODE_UDCNT (2 << CNTMODE_SHIFT) /* up/down counter mode */
61#define CNTMODE_DIRCNT (4 << CNTMODE_SHIFT) /* direction counter mode */
62#define CNTMODE_DIRTMR (5 << CNTMODE_SHIFT) /* direction timer mode */
63
64#define BNDMODE_COMP (0 << BNDMODE_SHIFT) /* boundary compare mode */
65#define BNDMODE_ZERO (1 << BNDMODE_SHIFT) /* boundary compare and zero mode */
66#define BNDMODE_CAPT (2 << BNDMODE_SHIFT) /* boundary capture mode */
67#define BNDMODE_AEXT (3 << BNDMODE_SHIFT) /* boundary auto-extend mode */
68
69/* CNT_IMASK bitmasks */
70#define ICIE (1 << 0) /* Illegal Gray/Binary Code Interrupt Enable */
71#define UCIE (1 << 1) /* Up count Interrupt Enable */
72#define DCIE (1 << 2) /* Down count Interrupt Enable */
73#define MINCIE (1 << 3) /* Min Count Interrupt Enable */
74#define MAXCIE (1 << 4) /* Max Count Interrupt Enable */
75#define COV31IE (1 << 5) /* Bit 31 Overflow Interrupt Enable */
76#define COV15IE (1 << 6) /* Bit 15 Overflow Interrupt Enable */
77#define CZEROIE (1 << 7) /* Count to Zero Interrupt Enable */
78#define CZMIE (1 << 8) /* CZM Pin Interrupt Enable */
79#define CZMEIE (1 << 9) /* CZM Error Interrupt Enable */
80#define CZMZIE (1 << 10) /* CZM Zeroes Counter Interrupt Enable */
81
82/* CNT_STATUS bitmasks */
83#define ICII (1 << 0) /* Illegal Gray/Binary Code Interrupt Identifier */
84#define UCII (1 << 1) /* Up count Interrupt Identifier */
85#define DCII (1 << 2) /* Down count Interrupt Identifier */
86#define MINCII (1 << 3) /* Min Count Interrupt Identifier */
87#define MAXCII (1 << 4) /* Max Count Interrupt Identifier */
88#define COV31II (1 << 5) /* Bit 31 Overflow Interrupt Identifier */
89#define COV15II (1 << 6) /* Bit 15 Overflow Interrupt Identifier */
90#define CZEROII (1 << 7) /* Count to Zero Interrupt Identifier */
91#define CZMII (1 << 8) /* CZM Pin Interrupt Identifier */
92#define CZMEII (1 << 9) /* CZM Error Interrupt Identifier */
93#define CZMZII (1 << 10) /* CZM Zeroes Counter Interrupt Identifier */
94
95/* CNT_COMMAND bitmasks */
96#define W1LCNT 0xf /* Load Counter Register */
97#define W1LMIN 0xf0 /* Load Min Register */
98#define W1LMAX 0xf00 /* Load Max Register */
99#define W1ZMONCE (1 << 12) /* Enable CZM Clear Counter Once */
100
101#define W1LCNT_ZERO (1 << 0) /* write 1 to load CNT_COUNTER with zero */
102#define W1LCNT_MIN (1 << 2) /* write 1 to load CNT_COUNTER from CNT_MIN */
103#define W1LCNT_MAX (1 << 3) /* write 1 to load CNT_COUNTER from CNT_MAX */
104
105#define W1LMIN_ZERO (1 << 4) /* write 1 to load CNT_MIN with zero */
106#define W1LMIN_CNT (1 << 5) /* write 1 to load CNT_MIN from CNT_COUNTER */
107#define W1LMIN_MAX (1 << 7) /* write 1 to load CNT_MIN from CNT_MAX */
108
109#define W1LMAX_ZERO (1 << 8) /* write 1 to load CNT_MAX with zero */
110#define W1LMAX_CNT (1 << 9) /* write 1 to load CNT_MAX from CNT_COUNTER */
111#define W1LMAX_MIN (1 << 10) /* write 1 to load CNT_MAX from CNT_MIN */
112
113/* CNT_DEBOUNCE bitmasks */
114#define DPRESCALE 0xf /* Load Counter Register */
115
116#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-05 03:04:16 -0500