diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-16 13:52:35 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-16 13:52:35 -0500 |
commit | 525995d77ca08dfc2ba6f8e606f93694271dbd66 (patch) | |
tree | be9ddad66cd1301eea8dab7814cbda144a909e35 /arch/blackfin/include | |
parent | e4bdda1bc3123a9e65f4dd93a23041fde8ed3dc2 (diff) | |
parent | 64a2b168023bfd09037ba760838762e56c44178e (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (88 commits)
Blackfin: Convert BUG() to use unreachable()
Blackfin: define __NR_recvmmsg
Blackfin: drop duplicate sched_clock
Blackfin: NOMPU: skip DMA ICPLB hole when it is redundant
Blackfin: MPU: add missing __init markings
Blackfin: add support for TIF_NOTIFY_RESUME
Blackfin: kgdb_test: clean up code a bit
Blackfin: convert kgdbtest to proc_fops
Blackfin: convert cyc2ns() to clocksource_cyc2ns()
Blackfin: ip0x: pull in asm/portmux.h for P_xxx defines
Blackfin: drop unused ax88180 resources
Blackfin: bf537-stamp: add ADF702x network driver resources
Blackfin: bf537-stamp: add CAN resources
Blackfin: bf537-stamp: add AD5258 i2c address
Blackfin: bf537-stamp: add adau1761 i2c address
Blackfin: bf537-stamp: add adau1371 i2c address
Blackfin: bf537-stamp: add ADP8870 resources
Blackfin: bf537-stamp: kill AD714x board-specific Kconfigs
Blackfin: bf537-stamp: update ADP5520 resources
Blackfin: bf537-stamp: add ADXL346 orientation sensing support
...
Diffstat (limited to 'arch/blackfin/include')
24 files changed, 416 insertions, 527 deletions
diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h index 10064f902d20..e6485c305ea6 100644 --- a/arch/blackfin/include/asm/bfin-global.h +++ b/arch/blackfin/include/asm/bfin-global.h | |||
@@ -11,9 +11,6 @@ | |||
11 | 11 | ||
12 | #ifndef __ASSEMBLY__ | 12 | #ifndef __ASSEMBLY__ |
13 | 13 | ||
14 | #include <asm/sections.h> | ||
15 | #include <asm/ptrace.h> | ||
16 | #include <asm/user.h> | ||
17 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
18 | #include <linux/types.h> | 15 | #include <linux/types.h> |
19 | 16 | ||
@@ -23,6 +20,12 @@ | |||
23 | # define DMA_UNCACHED_REGION (2 * 1024 * 1024) | 20 | # define DMA_UNCACHED_REGION (2 * 1024 * 1024) |
24 | #elif defined(CONFIG_DMA_UNCACHED_1M) | 21 | #elif defined(CONFIG_DMA_UNCACHED_1M) |
25 | # define DMA_UNCACHED_REGION (1024 * 1024) | 22 | # define DMA_UNCACHED_REGION (1024 * 1024) |
23 | #elif defined(CONFIG_DMA_UNCACHED_512K) | ||
24 | # define DMA_UNCACHED_REGION (512 * 1024) | ||
25 | #elif defined(CONFIG_DMA_UNCACHED_256K) | ||
26 | # define DMA_UNCACHED_REGION (256 * 1024) | ||
27 | #elif defined(CONFIG_DMA_UNCACHED_128K) | ||
28 | # define DMA_UNCACHED_REGION (128 * 1024) | ||
26 | #else | 29 | #else |
27 | # define DMA_UNCACHED_REGION (0) | 30 | # define DMA_UNCACHED_REGION (0) |
28 | #endif | 31 | #endif |
@@ -35,6 +38,7 @@ extern unsigned long get_sclk(void); | |||
35 | extern unsigned long sclk_to_usecs(unsigned long sclk); | 38 | extern unsigned long sclk_to_usecs(unsigned long sclk); |
36 | extern unsigned long usecs_to_sclk(unsigned long usecs); | 39 | extern unsigned long usecs_to_sclk(unsigned long usecs); |
37 | 40 | ||
41 | struct pt_regs; | ||
38 | extern void dump_bfin_process(struct pt_regs *regs); | 42 | extern void dump_bfin_process(struct pt_regs *regs); |
39 | extern void dump_bfin_mem(struct pt_regs *regs); | 43 | extern void dump_bfin_mem(struct pt_regs *regs); |
40 | extern void dump_bfin_trace_buffer(void); | 44 | extern void dump_bfin_trace_buffer(void); |
diff --git a/arch/blackfin/include/asm/bug.h b/arch/blackfin/include/asm/bug.h index 6f4548a13555..75f6dc336d46 100644 --- a/arch/blackfin/include/asm/bug.h +++ b/arch/blackfin/include/asm/bug.h | |||
@@ -47,7 +47,7 @@ | |||
47 | #define BUG() \ | 47 | #define BUG() \ |
48 | do { \ | 48 | do { \ |
49 | _BUG_OR_WARN(0); \ | 49 | _BUG_OR_WARN(0); \ |
50 | for (;;); \ | 50 | unreachable(); \ |
51 | } while (0) | 51 | } while (0) |
52 | 52 | ||
53 | #define WARN_ON(condition) \ | 53 | #define WARN_ON(condition) \ |
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h index 417eaac7fe99..2666ff8ea952 100644 --- a/arch/blackfin/include/asm/cacheflush.h +++ b/arch/blackfin/include/asm/cacheflush.h | |||
@@ -10,6 +10,7 @@ | |||
10 | #define _BLACKFIN_CACHEFLUSH_H | 10 | #define _BLACKFIN_CACHEFLUSH_H |
11 | 11 | ||
12 | #include <asm/blackfin.h> /* for SSYNC() */ | 12 | #include <asm/blackfin.h> /* for SSYNC() */ |
13 | #include <asm/sections.h> /* for _ramend */ | ||
13 | 14 | ||
14 | extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address); | 15 | extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address); |
15 | extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address); | 16 | extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address); |
diff --git a/arch/blackfin/include/asm/checksum.h b/arch/blackfin/include/asm/checksum.h index a23415be0de1..623cc7fb00bc 100644 --- a/arch/blackfin/include/asm/checksum.h +++ b/arch/blackfin/include/asm/checksum.h | |||
@@ -9,63 +9,12 @@ | |||
9 | #define _BFIN_CHECKSUM_H | 9 | #define _BFIN_CHECKSUM_H |
10 | 10 | ||
11 | /* | 11 | /* |
12 | * computes the checksum of a memory block at buff, length len, | ||
13 | * and adds in "sum" (32-bit) | ||
14 | * | ||
15 | * returns a 32-bit number suitable for feeding into itself | ||
16 | * or csum_tcpudp_magic | ||
17 | * | ||
18 | * this function must be called with even lengths, except | ||
19 | * for the last fragment, which may be odd | ||
20 | * | ||
21 | * it's best to have buff aligned on a 32-bit boundary | ||
22 | */ | ||
23 | __wsum csum_partial(const void *buff, int len, __wsum sum); | ||
24 | |||
25 | /* | ||
26 | * the same as csum_partial, but copies from src while it | ||
27 | * checksums | ||
28 | * | ||
29 | * here even more important to align src and dst on a 32-bit (or even | ||
30 | * better 64-bit) boundary | ||
31 | */ | ||
32 | |||
33 | __wsum csum_partial_copy(const void *src, void *dst, | ||
34 | int len, __wsum sum); | ||
35 | |||
36 | /* | ||
37 | * the same as csum_partial_copy, but copies from user space. | ||
38 | * | ||
39 | * here even more important to align src and dst on a 32-bit (or even | ||
40 | * better 64-bit) boundary | ||
41 | */ | ||
42 | |||
43 | extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, | ||
44 | int len, __wsum sum, int *csum_err); | ||
45 | |||
46 | #define csum_partial_copy_nocheck(src, dst, len, sum) \ | ||
47 | csum_partial_copy((src), (dst), (len), (sum)) | ||
48 | |||
49 | __sum16 ip_fast_csum(unsigned char *iph, unsigned int ihl); | ||
50 | |||
51 | /* | ||
52 | * Fold a partial checksum | ||
53 | */ | ||
54 | |||
55 | static inline __sum16 csum_fold(__wsum sum) | ||
56 | { | ||
57 | while (sum >> 16) | ||
58 | sum = (sum & 0xffff) + (sum >> 16); | ||
59 | return ((~(sum << 16)) >> 16); | ||
60 | } | ||
61 | |||
62 | /* | ||
63 | * computes the checksum of the TCP/UDP pseudo-header | 12 | * computes the checksum of the TCP/UDP pseudo-header |
64 | * returns a 16-bit checksum, already complemented | 13 | * returns a 16-bit checksum, already complemented |
65 | */ | 14 | */ |
66 | 15 | ||
67 | static inline __wsum | 16 | static inline __wsum |
68 | csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, | 17 | __csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, |
69 | unsigned short proto, __wsum sum) | 18 | unsigned short proto, __wsum sum) |
70 | { | 19 | { |
71 | unsigned int carry; | 20 | unsigned int carry; |
@@ -88,19 +37,8 @@ csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, | |||
88 | 37 | ||
89 | return (sum); | 38 | return (sum); |
90 | } | 39 | } |
40 | #define csum_tcpudp_nofold __csum_tcpudp_nofold | ||
91 | 41 | ||
92 | static inline __sum16 | 42 | #include <asm-generic/checksum.h> |
93 | csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, | ||
94 | unsigned short proto, __wsum sum) | ||
95 | { | ||
96 | return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); | ||
97 | } | ||
98 | |||
99 | /* | ||
100 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
101 | * in icmp.c | ||
102 | */ | ||
103 | |||
104 | extern __sum16 ip_compute_csum(const void *buff, int len); | ||
105 | 43 | ||
106 | #endif /* _BFIN_CHECKSUM_H */ | 44 | #endif |
diff --git a/arch/blackfin/include/asm/clocks.h b/arch/blackfin/include/asm/clocks.h index f80dad5ff257..6f0b61852f58 100644 --- a/arch/blackfin/include/asm/clocks.h +++ b/arch/blackfin/include/asm/clocks.h | |||
@@ -9,6 +9,8 @@ | |||
9 | #ifndef _BFIN_CLOCKS_H | 9 | #ifndef _BFIN_CLOCKS_H |
10 | #define _BFIN_CLOCKS_H | 10 | #define _BFIN_CLOCKS_H |
11 | 11 | ||
12 | #include <asm/dpmc.h> | ||
13 | |||
12 | #ifdef CONFIG_CCLK_DIV_1 | 14 | #ifdef CONFIG_CCLK_DIV_1 |
13 | # define CONFIG_CCLK_ACT_DIV CCLK_DIV1 | 15 | # define CONFIG_CCLK_ACT_DIV CCLK_DIV1 |
14 | # define CONFIG_CCLK_DIV 1 | 16 | # define CONFIG_CCLK_DIV 1 |
diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h index 7a23d824ac96..f9172ff30e5c 100644 --- a/arch/blackfin/include/asm/dma-mapping.h +++ b/arch/blackfin/include/asm/dma-mapping.h | |||
@@ -7,9 +7,9 @@ | |||
7 | #ifndef _BLACKFIN_DMA_MAPPING_H | 7 | #ifndef _BLACKFIN_DMA_MAPPING_H |
8 | #define _BLACKFIN_DMA_MAPPING_H | 8 | #define _BLACKFIN_DMA_MAPPING_H |
9 | 9 | ||
10 | #include <asm/scatterlist.h> | 10 | #include <asm/cacheflush.h> |
11 | struct scatterlist; | ||
11 | 12 | ||
12 | void dma_alloc_init(unsigned long start, unsigned long end); | ||
13 | void *dma_alloc_coherent(struct device *dev, size_t size, | 13 | void *dma_alloc_coherent(struct device *dev, size_t size, |
14 | dma_addr_t *dma_handle, gfp_t gfp); | 14 | dma_addr_t *dma_handle, gfp_t gfp); |
15 | void dma_free_coherent(struct device *dev, size_t size, void *vaddr, | 15 | void dma_free_coherent(struct device *dev, size_t size, void *vaddr, |
@@ -20,13 +20,51 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr, | |||
20 | */ | 20 | */ |
21 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) | 21 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) |
22 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) | 22 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) |
23 | #define dma_supported(d, m) (1) | ||
24 | #define dma_get_cache_alignment() (32) | ||
25 | #define dma_is_consistent(d, h) (1) | ||
23 | 26 | ||
24 | static inline | 27 | static inline int |
25 | int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) | 28 | dma_set_mask(struct device *dev, u64 dma_mask) |
26 | { | 29 | { |
30 | if (!dev->dma_mask || !dma_supported(dev, dma_mask)) | ||
31 | return -EIO; | ||
32 | |||
33 | *dev->dma_mask = dma_mask; | ||
34 | |||
27 | return 0; | 35 | return 0; |
28 | } | 36 | } |
29 | 37 | ||
38 | static inline int | ||
39 | dma_mapping_error(struct device *dev, dma_addr_t dma_addr) | ||
40 | { | ||
41 | return 0; | ||
42 | } | ||
43 | |||
44 | extern void | ||
45 | __dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir); | ||
46 | static inline void | ||
47 | _dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir) | ||
48 | { | ||
49 | if (!__builtin_constant_p(dir)) { | ||
50 | __dma_sync(addr, size, dir); | ||
51 | return; | ||
52 | } | ||
53 | |||
54 | switch (dir) { | ||
55 | case DMA_NONE: | ||
56 | BUG(); | ||
57 | case DMA_TO_DEVICE: /* writeback only */ | ||
58 | flush_dcache_range(addr, addr + size); | ||
59 | break; | ||
60 | case DMA_FROM_DEVICE: /* invalidate only */ | ||
61 | case DMA_BIDIRECTIONAL: /* flush and invalidate */ | ||
62 | /* Blackfin has no dedicated invalidate (it includes a flush) */ | ||
63 | invalidate_dcache_range(addr, addr + size); | ||
64 | break; | ||
65 | } | ||
66 | } | ||
67 | |||
30 | /* | 68 | /* |
31 | * Map a single buffer of the indicated size for DMA in streaming mode. | 69 | * Map a single buffer of the indicated size for DMA in streaming mode. |
32 | * The 32-bit bus address to use is returned. | 70 | * The 32-bit bus address to use is returned. |
@@ -34,8 +72,13 @@ int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) | |||
34 | * Once the device is given the dma address, the device owns this memory | 72 | * Once the device is given the dma address, the device owns this memory |
35 | * until either pci_unmap_single or pci_dma_sync_single is performed. | 73 | * until either pci_unmap_single or pci_dma_sync_single is performed. |
36 | */ | 74 | */ |
37 | extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, | 75 | static inline dma_addr_t |
38 | enum dma_data_direction direction); | 76 | dma_map_single(struct device *dev, void *ptr, size_t size, |
77 | enum dma_data_direction dir) | ||
78 | { | ||
79 | _dma_sync((dma_addr_t)ptr, size, dir); | ||
80 | return (dma_addr_t) ptr; | ||
81 | } | ||
39 | 82 | ||
40 | static inline dma_addr_t | 83 | static inline dma_addr_t |
41 | dma_map_page(struct device *dev, struct page *page, | 84 | dma_map_page(struct device *dev, struct page *page, |
@@ -53,8 +96,12 @@ dma_map_page(struct device *dev, struct page *page, | |||
53 | * After this call, reads by the cpu to the buffer are guarenteed to see | 96 | * After this call, reads by the cpu to the buffer are guarenteed to see |
54 | * whatever the device wrote there. | 97 | * whatever the device wrote there. |
55 | */ | 98 | */ |
56 | extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | 99 | static inline void |
57 | enum dma_data_direction direction); | 100 | dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, |
101 | enum dma_data_direction dir) | ||
102 | { | ||
103 | BUG_ON(!valid_dma_direction(dir)); | ||
104 | } | ||
58 | 105 | ||
59 | static inline void | 106 | static inline void |
60 | dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, | 107 | dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, |
@@ -80,38 +127,66 @@ dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, | |||
80 | * the same here. | 127 | * the same here. |
81 | */ | 128 | */ |
82 | extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | 129 | extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, |
83 | enum dma_data_direction direction); | 130 | enum dma_data_direction dir); |
84 | 131 | ||
85 | /* | 132 | /* |
86 | * Unmap a set of streaming mode DMA translations. | 133 | * Unmap a set of streaming mode DMA translations. |
87 | * Again, cpu read rules concerning calls here are the same as for | 134 | * Again, cpu read rules concerning calls here are the same as for |
88 | * pci_unmap_single() above. | 135 | * pci_unmap_single() above. |
89 | */ | 136 | */ |
90 | extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, | 137 | static inline void |
91 | int nhwentries, enum dma_data_direction direction); | 138 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, |
139 | int nhwentries, enum dma_data_direction dir) | ||
140 | { | ||
141 | BUG_ON(!valid_dma_direction(dir)); | ||
142 | } | ||
92 | 143 | ||
93 | static inline void dma_sync_single_for_cpu(struct device *dev, | 144 | static inline void |
94 | dma_addr_t handle, size_t size, | 145 | dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t handle, |
95 | enum dma_data_direction dir) | 146 | unsigned long offset, size_t size, |
147 | enum dma_data_direction dir) | ||
96 | { | 148 | { |
149 | BUG_ON(!valid_dma_direction(dir)); | ||
97 | } | 150 | } |
98 | 151 | ||
99 | static inline void dma_sync_single_for_device(struct device *dev, | 152 | static inline void |
100 | dma_addr_t handle, size_t size, | 153 | dma_sync_single_range_for_device(struct device *dev, dma_addr_t handle, |
101 | enum dma_data_direction dir) | 154 | unsigned long offset, size_t size, |
155 | enum dma_data_direction dir) | ||
102 | { | 156 | { |
157 | _dma_sync(handle + offset, size, dir); | ||
103 | } | 158 | } |
104 | 159 | ||
105 | static inline void dma_sync_sg_for_cpu(struct device *dev, | 160 | static inline void |
106 | struct scatterlist *sg, | 161 | dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size, |
107 | int nents, enum dma_data_direction dir) | 162 | enum dma_data_direction dir) |
108 | { | 163 | { |
164 | dma_sync_single_range_for_cpu(dev, handle, 0, size, dir); | ||
109 | } | 165 | } |
110 | 166 | ||
111 | static inline void dma_sync_sg_for_device(struct device *dev, | 167 | static inline void |
112 | struct scatterlist *sg, | 168 | dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size, |
113 | int nents, enum dma_data_direction dir) | 169 | enum dma_data_direction dir) |
170 | { | ||
171 | dma_sync_single_range_for_device(dev, handle, 0, size, dir); | ||
172 | } | ||
173 | |||
174 | static inline void | ||
175 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, | ||
176 | enum dma_data_direction dir) | ||
177 | { | ||
178 | BUG_ON(!valid_dma_direction(dir)); | ||
179 | } | ||
180 | |||
181 | extern void | ||
182 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, | ||
183 | int nents, enum dma_data_direction dir); | ||
184 | |||
185 | static inline void | ||
186 | dma_cache_sync(struct device *dev, void *vaddr, size_t size, | ||
187 | enum dma_data_direction dir) | ||
114 | { | 188 | { |
189 | _dma_sync((dma_addr_t)vaddr, size, dir); | ||
115 | } | 190 | } |
116 | 191 | ||
117 | #endif /* _BLACKFIN_DMA_MAPPING_H */ | 192 | #endif /* _BLACKFIN_DMA_MAPPING_H */ |
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h index c9a59622e23f..bd2e62243abe 100644 --- a/arch/blackfin/include/asm/dma.h +++ b/arch/blackfin/include/asm/dma.h | |||
@@ -10,46 +10,70 @@ | |||
10 | 10 | ||
11 | #include <linux/interrupt.h> | 11 | #include <linux/interrupt.h> |
12 | #include <mach/dma.h> | 12 | #include <mach/dma.h> |
13 | #include <asm/atomic.h> | ||
13 | #include <asm/blackfin.h> | 14 | #include <asm/blackfin.h> |
14 | #include <asm/page.h> | 15 | #include <asm/page.h> |
15 | 16 | #include <asm-generic/dma.h> | |
16 | #define MAX_DMA_ADDRESS PAGE_OFFSET | 17 | |
17 | 18 | /* DMA_CONFIG Masks */ | |
18 | /***************************************************************************** | 19 | #define DMAEN 0x0001 /* DMA Channel Enable */ |
19 | * Generic DMA Declarations | 20 | #define WNR 0x0002 /* Channel Direction (W/R*) */ |
20 | * | 21 | #define WDSIZE_8 0x0000 /* Transfer Word Size = 8 */ |
21 | ****************************************************************************/ | 22 | #define WDSIZE_16 0x0004 /* Transfer Word Size = 16 */ |
22 | enum dma_chan_status { | 23 | #define WDSIZE_32 0x0008 /* Transfer Word Size = 32 */ |
23 | DMA_CHANNEL_FREE, | 24 | #define DMA2D 0x0010 /* DMA Mode (2D/1D*) */ |
24 | DMA_CHANNEL_REQUESTED, | 25 | #define RESTART 0x0020 /* DMA Buffer Clear */ |
25 | DMA_CHANNEL_ENABLED, | 26 | #define DI_SEL 0x0040 /* Data Interrupt Timing Select */ |
26 | }; | 27 | #define DI_EN 0x0080 /* Data Interrupt Enable */ |
28 | #define NDSIZE_0 0x0000 /* Next Descriptor Size = 0 (Stop/Autobuffer) */ | ||
29 | #define NDSIZE_1 0x0100 /* Next Descriptor Size = 1 */ | ||
30 | #define NDSIZE_2 0x0200 /* Next Descriptor Size = 2 */ | ||
31 | #define NDSIZE_3 0x0300 /* Next Descriptor Size = 3 */ | ||
32 | #define NDSIZE_4 0x0400 /* Next Descriptor Size = 4 */ | ||
33 | #define NDSIZE_5 0x0500 /* Next Descriptor Size = 5 */ | ||
34 | #define NDSIZE_6 0x0600 /* Next Descriptor Size = 6 */ | ||
35 | #define NDSIZE_7 0x0700 /* Next Descriptor Size = 7 */ | ||
36 | #define NDSIZE_8 0x0800 /* Next Descriptor Size = 8 */ | ||
37 | #define NDSIZE_9 0x0900 /* Next Descriptor Size = 9 */ | ||
38 | #define NDSIZE 0x0f00 /* Next Descriptor Size */ | ||
39 | #define DMAFLOW 0x7000 /* Flow Control */ | ||
40 | #define DMAFLOW_STOP 0x0000 /* Stop Mode */ | ||
41 | #define DMAFLOW_AUTO 0x1000 /* Autobuffer Mode */ | ||
42 | #define DMAFLOW_ARRAY 0x4000 /* Descriptor Array Mode */ | ||
43 | #define DMAFLOW_SMALL 0x6000 /* Small Model Descriptor List Mode */ | ||
44 | #define DMAFLOW_LARGE 0x7000 /* Large Model Descriptor List Mode */ | ||
45 | |||
46 | /* DMA_IRQ_STATUS Masks */ | ||
47 | #define DMA_DONE 0x0001 /* DMA Completion Interrupt Status */ | ||
48 | #define DMA_ERR 0x0002 /* DMA Error Interrupt Status */ | ||
49 | #define DFETCH 0x0004 /* DMA Descriptor Fetch Indicator */ | ||
50 | #define DMA_RUN 0x0008 /* DMA Channel Running Indicator */ | ||
27 | 51 | ||
28 | /*------------------------- | 52 | /*------------------------- |
29 | * config reg bits value | 53 | * config reg bits value |
30 | *-------------------------*/ | 54 | *-------------------------*/ |
31 | #define DATA_SIZE_8 0 | 55 | #define DATA_SIZE_8 0 |
32 | #define DATA_SIZE_16 1 | 56 | #define DATA_SIZE_16 1 |
33 | #define DATA_SIZE_32 2 | 57 | #define DATA_SIZE_32 2 |
34 | 58 | ||
35 | #define DMA_FLOW_STOP 0 | 59 | #define DMA_FLOW_STOP 0 |
36 | #define DMA_FLOW_AUTO 1 | 60 | #define DMA_FLOW_AUTO 1 |
37 | #define DMA_FLOW_ARRAY 4 | 61 | #define DMA_FLOW_ARRAY 4 |
38 | #define DMA_FLOW_SMALL 6 | 62 | #define DMA_FLOW_SMALL 6 |
39 | #define DMA_FLOW_LARGE 7 | 63 | #define DMA_FLOW_LARGE 7 |
40 | 64 | ||
41 | #define DIMENSION_LINEAR 0 | 65 | #define DIMENSION_LINEAR 0 |
42 | #define DIMENSION_2D 1 | 66 | #define DIMENSION_2D 1 |
43 | 67 | ||
44 | #define DIR_READ 0 | 68 | #define DIR_READ 0 |
45 | #define DIR_WRITE 1 | 69 | #define DIR_WRITE 1 |
46 | 70 | ||
47 | #define INTR_DISABLE 0 | 71 | #define INTR_DISABLE 0 |
48 | #define INTR_ON_BUF 2 | 72 | #define INTR_ON_BUF 2 |
49 | #define INTR_ON_ROW 3 | 73 | #define INTR_ON_ROW 3 |
50 | 74 | ||
51 | #define DMA_NOSYNC_KEEP_DMA_BUF 0 | 75 | #define DMA_NOSYNC_KEEP_DMA_BUF 0 |
52 | #define DMA_SYNC_RESTART 1 | 76 | #define DMA_SYNC_RESTART 1 |
53 | 77 | ||
54 | struct dmasg { | 78 | struct dmasg { |
55 | void *next_desc_addr; | 79 | void *next_desc_addr; |
@@ -104,11 +128,9 @@ struct dma_register { | |||
104 | 128 | ||
105 | }; | 129 | }; |
106 | 130 | ||
107 | struct mutex; | ||
108 | struct dma_channel { | 131 | struct dma_channel { |
109 | struct mutex dmalock; | ||
110 | const char *device_id; | 132 | const char *device_id; |
111 | enum dma_chan_status chan_status; | 133 | atomic_t chan_status; |
112 | volatile struct dma_register *regs; | 134 | volatile struct dma_register *regs; |
113 | struct dmasg *sg; /* large mode descriptor */ | 135 | struct dmasg *sg; /* large mode descriptor */ |
114 | unsigned int irq; | 136 | unsigned int irq; |
@@ -220,27 +242,20 @@ static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize | |||
220 | 242 | ||
221 | static inline int dma_channel_active(unsigned int channel) | 243 | static inline int dma_channel_active(unsigned int channel) |
222 | { | 244 | { |
223 | if (dma_ch[channel].chan_status == DMA_CHANNEL_FREE) | 245 | return atomic_read(&dma_ch[channel].chan_status); |
224 | return 0; | ||
225 | else | ||
226 | return 1; | ||
227 | } | 246 | } |
228 | 247 | ||
229 | static inline void disable_dma(unsigned int channel) | 248 | static inline void disable_dma(unsigned int channel) |
230 | { | 249 | { |
231 | dma_ch[channel].regs->cfg &= ~DMAEN; | 250 | dma_ch[channel].regs->cfg &= ~DMAEN; |
232 | SSYNC(); | 251 | SSYNC(); |
233 | dma_ch[channel].chan_status = DMA_CHANNEL_REQUESTED; | ||
234 | } | 252 | } |
235 | static inline void enable_dma(unsigned int channel) | 253 | static inline void enable_dma(unsigned int channel) |
236 | { | 254 | { |
237 | dma_ch[channel].regs->curr_x_count = 0; | 255 | dma_ch[channel].regs->curr_x_count = 0; |
238 | dma_ch[channel].regs->curr_y_count = 0; | 256 | dma_ch[channel].regs->curr_y_count = 0; |
239 | dma_ch[channel].regs->cfg |= DMAEN; | 257 | dma_ch[channel].regs->cfg |= DMAEN; |
240 | dma_ch[channel].chan_status = DMA_CHANNEL_ENABLED; | ||
241 | } | 258 | } |
242 | void free_dma(unsigned int channel); | ||
243 | int request_dma(unsigned int channel, const char *device_id); | ||
244 | int set_dma_callback(unsigned int channel, irq_handler_t callback, void *data); | 259 | int set_dma_callback(unsigned int channel, irq_handler_t callback, void *data); |
245 | 260 | ||
246 | static inline void dma_disable_irq(unsigned int channel) | 261 | static inline void dma_disable_irq(unsigned int channel) |
diff --git a/arch/blackfin/include/asm/dpmc.h b/arch/blackfin/include/asm/dpmc.h index 925e66cb2d49..1597ae5041ee 100644 --- a/arch/blackfin/include/asm/dpmc.h +++ b/arch/blackfin/include/asm/dpmc.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Miscellaneous IOCTL commands for Dynamic Power Management Controller Driver | 2 | * Miscellaneous IOCTL commands for Dynamic Power Management Controller Driver |
3 | * | 3 | * |
4 | * Copyright (C) 2004-2008 Analog Device Inc. | 4 | * Copyright (C) 2004-2009 Analog Device Inc. |
5 | * | 5 | * |
6 | * Licensed under the GPL-2 | 6 | * Licensed under the GPL-2 |
7 | */ | 7 | */ |
@@ -9,7 +9,109 @@ | |||
9 | #ifndef _BLACKFIN_DPMC_H_ | 9 | #ifndef _BLACKFIN_DPMC_H_ |
10 | #define _BLACKFIN_DPMC_H_ | 10 | #define _BLACKFIN_DPMC_H_ |
11 | 11 | ||
12 | #ifdef __KERNEL__ | 12 | /* PLL_CTL Masks */ |
13 | #define DF 0x0001 /* 0: PLL = CLKIN, 1: PLL = CLKIN/2 */ | ||
14 | #define PLL_OFF 0x0002 /* PLL Not Powered */ | ||
15 | #define STOPCK 0x0008 /* Core Clock Off */ | ||
16 | #define PDWN 0x0020 /* Enter Deep Sleep Mode */ | ||
17 | #ifdef __ADSPBF539__ | ||
18 | # define IN_DELAY 0x0014 /* Add 200ps Delay To EBIU Input Latches */ | ||
19 | # define OUT_DELAY 0x00C0 /* Add 200ps Delay To EBIU Output Signals */ | ||
20 | #else | ||
21 | # define IN_DELAY 0x0040 /* Add 200ps Delay To EBIU Input Latches */ | ||
22 | # define OUT_DELAY 0x0080 /* Add 200ps Delay To EBIU Output Signals */ | ||
23 | #endif | ||
24 | #define BYPASS 0x0100 /* Bypass the PLL */ | ||
25 | #define MSEL 0x7E00 /* Multiplier Select For CCLK/VCO Factors */ | ||
26 | #define SPORT_HYST 0x8000 /* Enable Additional Hysteresis on SPORT Input Pins */ | ||
27 | #define SET_MSEL(x) (((x)&0x3F) << 0x9) /* Set MSEL = 0-63 --> VCO = CLKIN*MSEL */ | ||
28 | |||
29 | /* PLL_DIV Masks */ | ||
30 | #define SSEL 0x000F /* System Select */ | ||
31 | #define CSEL 0x0030 /* Core Select */ | ||
32 | #define CSEL_DIV1 0x0000 /* CCLK = VCO / 1 */ | ||
33 | #define CSEL_DIV2 0x0010 /* CCLK = VCO / 2 */ | ||
34 | #define CSEL_DIV4 0x0020 /* CCLK = VCO / 4 */ | ||
35 | #define CSEL_DIV8 0x0030 /* CCLK = VCO / 8 */ | ||
36 | |||
37 | #define CCLK_DIV1 CSEL_DIV1 | ||
38 | #define CCLK_DIV2 CSEL_DIV2 | ||
39 | #define CCLK_DIV4 CSEL_DIV4 | ||
40 | #define CCLK_DIV8 CSEL_DIV8 | ||
41 | |||
42 | #define SET_SSEL(x) ((x) & 0xF) /* Set SSEL = 0-15 --> SCLK = VCO/SSEL */ | ||
43 | #define SCLK_DIV(x) (x) /* SCLK = VCO / x */ | ||
44 | |||
45 | /* PLL_STAT Masks */ | ||
46 | #define ACTIVE_PLLENABLED 0x0001 /* Processor In Active Mode With PLL Enabled */ | ||
47 | #define FULL_ON 0x0002 /* Processor In Full On Mode */ | ||
48 | #define ACTIVE_PLLDISABLED 0x0004 /* Processor In Active Mode With PLL Disabled */ | ||
49 | #define PLL_LOCKED 0x0020 /* PLL_LOCKCNT Has Been Reached */ | ||
50 | |||
51 | #define RTCWS 0x0400 /* RTC/Reset Wake-Up Status */ | ||
52 | #define CANWS 0x0800 /* CAN Wake-Up Status */ | ||
53 | #define USBWS 0x2000 /* USB Wake-Up Status */ | ||
54 | #define KPADWS 0x4000 /* Keypad Wake-Up Status */ | ||
55 | #define ROTWS 0x8000 /* Rotary Wake-Up Status */ | ||
56 | #define GPWS 0x1000 /* General-Purpose Wake-Up Status */ | ||
57 | |||
58 | /* VR_CTL Masks */ | ||
59 | #if defined(__ADSPBF52x__) || defined(__ADSPBF51x__) | ||
60 | #define FREQ 0x3000 /* Switching Oscillator Frequency For Regulator */ | ||
61 | #define FREQ_1000 0x3000 /* Switching Frequency Is 1 MHz */ | ||
62 | #else | ||
63 | #define FREQ 0x0003 /* Switching Oscillator Frequency For Regulator */ | ||
64 | #define FREQ_333 0x0001 /* Switching Frequency Is 333 kHz */ | ||
65 | #define FREQ_667 0x0002 /* Switching Frequency Is 667 kHz */ | ||
66 | #define FREQ_1000 0x0003 /* Switching Frequency Is 1 MHz */ | ||
67 | #endif | ||
68 | #define HIBERNATE 0x0000 /* Powerdown/Bypass On-Board Regulation */ | ||
69 | |||
70 | #define GAIN 0x000C /* Voltage Level Gain */ | ||
71 | #define GAIN_5 0x0000 /* GAIN = 5 */ | ||
72 | #define GAIN_10 0x0004 /* GAIN = 1 */ | ||
73 | #define GAIN_20 0x0008 /* GAIN = 2 */ | ||
74 | #define GAIN_50 0x000C /* GAIN = 5 */ | ||
75 | |||
76 | #define VLEV 0x00F0 /* Internal Voltage Level */ | ||
77 | #ifdef __ADSPBF52x__ | ||
78 | #define VLEV_085 0x0040 /* VLEV = 0.85 V (-5% - +10% Accuracy) */ | ||
79 | #define VLEV_090 0x0050 /* VLEV = 0.90 V (-5% - +10% Accuracy) */ | ||
80 | #define VLEV_095 0x0060 /* VLEV = 0.95 V (-5% - +10% Accuracy) */ | ||
81 | #define VLEV_100 0x0070 /* VLEV = 1.00 V (-5% - +10% Accuracy) */ | ||
82 | #define VLEV_105 0x0080 /* VLEV = 1.05 V (-5% - +10% Accuracy) */ | ||
83 | #define VLEV_110 0x0090 /* VLEV = 1.10 V (-5% - +10% Accuracy) */ | ||
84 | #define VLEV_115 0x00A0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */ | ||
85 | #define VLEV_120 0x00B0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */ | ||
86 | #else | ||
87 | #define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */ | ||
88 | #define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */ | ||
89 | #define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */ | ||
90 | #define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */ | ||
91 | #define VLEV_105 0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */ | ||
92 | #define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */ | ||
93 | #define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */ | ||
94 | #define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */ | ||
95 | #define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */ | ||
96 | #define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */ | ||
97 | #endif | ||
98 | |||
99 | #define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */ | ||
100 | #define CANWE 0x0200 /* Enable CAN Wakeup From Hibernate */ | ||
101 | #define PHYWE 0x0400 /* Enable PHY Wakeup From Hibernate */ | ||
102 | #define GPWE 0x0400 /* General-Purpose Wake-Up Enable */ | ||
103 | #define MXVRWE 0x0400 /* Enable MXVR Wakeup From Hibernate */ | ||
104 | #define KPADWE 0x1000 /* Keypad Wake-Up Enable */ | ||
105 | #define ROTWE 0x2000 /* Rotary Wake-Up Enable */ | ||
106 | #define CLKBUFOE 0x4000 /* CLKIN Buffer Output Enable */ | ||
107 | #define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */ | ||
108 | |||
109 | #if defined(__ADSPBF52x__) || defined(__ADSPBF51x__) | ||
110 | #define USBWE 0x0200 /* Enable USB Wakeup From Hibernate */ | ||
111 | #else | ||
112 | #define USBWE 0x0800 /* Enable USB Wakeup From Hibernate */ | ||
113 | #endif | ||
114 | |||
13 | #ifndef __ASSEMBLY__ | 115 | #ifndef __ASSEMBLY__ |
14 | 116 | ||
15 | void sleep_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); | 117 | void sleep_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); |
@@ -54,6 +156,5 @@ struct bfin_dpmc_platform_data { | |||
54 | w[P0 + (x - PLL_CTL)] = R0;\ | 156 | w[P0 + (x - PLL_CTL)] = R0;\ |
55 | 157 | ||
56 | #endif | 158 | #endif |
57 | #endif /* __KERNEL__ */ | ||
58 | 159 | ||
59 | #endif /*_BLACKFIN_DPMC_H_*/ | 160 | #endif /*_BLACKFIN_DPMC_H_*/ |
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h index 5b44d05ca53e..539468a05057 100644 --- a/arch/blackfin/include/asm/gpio.h +++ b/arch/blackfin/include/asm/gpio.h | |||
@@ -159,6 +159,11 @@ struct gpio_port_t { | |||
159 | }; | 159 | }; |
160 | #endif | 160 | #endif |
161 | 161 | ||
162 | #ifdef BFIN_SPECIAL_GPIO_BANKS | ||
163 | void bfin_special_gpio_free(unsigned gpio); | ||
164 | int bfin_special_gpio_request(unsigned gpio, const char *label); | ||
165 | #endif | ||
166 | |||
162 | #ifdef CONFIG_PM | 167 | #ifdef CONFIG_PM |
163 | 168 | ||
164 | unsigned int bfin_pm_standby_setup(void); | 169 | unsigned int bfin_pm_standby_setup(void); |
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h index 89f08decb8e0..c722acdda0d3 100644 --- a/arch/blackfin/include/asm/gptimers.h +++ b/arch/blackfin/include/asm/gptimers.h | |||
@@ -172,25 +172,25 @@ | |||
172 | 172 | ||
173 | /* The actual gptimer API */ | 173 | /* The actual gptimer API */ |
174 | 174 | ||
175 | void set_gptimer_pwidth(int timer_id, uint32_t width); | 175 | void set_gptimer_pwidth(unsigned int timer_id, uint32_t width); |
176 | uint32_t get_gptimer_pwidth(int timer_id); | 176 | uint32_t get_gptimer_pwidth(unsigned int timer_id); |
177 | void set_gptimer_period(int timer_id, uint32_t period); | 177 | void set_gptimer_period(unsigned int timer_id, uint32_t period); |
178 | uint32_t get_gptimer_period(int timer_id); | 178 | uint32_t get_gptimer_period(unsigned int timer_id); |
179 | uint32_t get_gptimer_count(int timer_id); | 179 | uint32_t get_gptimer_count(unsigned int timer_id); |
180 | int get_gptimer_intr(int timer_id); | 180 | int get_gptimer_intr(unsigned int timer_id); |
181 | void clear_gptimer_intr(int timer_id); | 181 | void clear_gptimer_intr(unsigned int timer_id); |
182 | int get_gptimer_over(int timer_id); | 182 | int get_gptimer_over(unsigned int timer_id); |
183 | void clear_gptimer_over(int timer_id); | 183 | void clear_gptimer_over(unsigned int timer_id); |
184 | void set_gptimer_config(int timer_id, uint16_t config); | 184 | void set_gptimer_config(unsigned int timer_id, uint16_t config); |
185 | uint16_t get_gptimer_config(int timer_id); | 185 | uint16_t get_gptimer_config(unsigned int timer_id); |
186 | int get_gptimer_run(int timer_id); | 186 | int get_gptimer_run(unsigned int timer_id); |
187 | void set_gptimer_pulse_hi(int timer_id); | 187 | void set_gptimer_pulse_hi(unsigned int timer_id); |
188 | void clear_gptimer_pulse_hi(int timer_id); | 188 | void clear_gptimer_pulse_hi(unsigned int timer_id); |
189 | void enable_gptimers(uint16_t mask); | 189 | void enable_gptimers(uint16_t mask); |
190 | void disable_gptimers(uint16_t mask); | 190 | void disable_gptimers(uint16_t mask); |
191 | void disable_gptimers_sync(uint16_t mask); | 191 | void disable_gptimers_sync(uint16_t mask); |
192 | uint16_t get_enabled_gptimers(void); | 192 | uint16_t get_enabled_gptimers(void); |
193 | uint32_t get_gptimer_status(int group); | 193 | uint32_t get_gptimer_status(unsigned int group); |
194 | void set_gptimer_status(int group, uint32_t value); | 194 | void set_gptimer_status(unsigned int group, uint32_t value); |
195 | 195 | ||
196 | #endif | 196 | #endif |
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h index d1f5029189a7..29e55b9d88bc 100644 --- a/arch/blackfin/include/asm/io.h +++ b/arch/blackfin/include/asm/io.h | |||
@@ -31,12 +31,14 @@ static inline unsigned char readb(const volatile void __iomem *addr) | |||
31 | unsigned int val; | 31 | unsigned int val; |
32 | int tmp; | 32 | int tmp; |
33 | 33 | ||
34 | __asm__ __volatile__ ("cli %1;\n\t" | 34 | __asm__ __volatile__ ( |
35 | "NOP; NOP; SSYNC;\n\t" | 35 | "cli %1;" |
36 | "%0 = b [%2] (z);\n\t" | 36 | "NOP; NOP; SSYNC;" |
37 | "sti %1;\n\t" | 37 | "%0 = b [%2] (z);" |
38 | : "=d"(val), "=d"(tmp): "a"(addr) | 38 | "sti %1;" |
39 | ); | 39 | : "=d"(val), "=d"(tmp) |
40 | : "a"(addr) | ||
41 | ); | ||
40 | 42 | ||
41 | return (unsigned char) val; | 43 | return (unsigned char) val; |
42 | } | 44 | } |
@@ -46,12 +48,14 @@ static inline unsigned short readw(const volatile void __iomem *addr) | |||
46 | unsigned int val; | 48 | unsigned int val; |
47 | int tmp; | 49 | int tmp; |
48 | 50 | ||
49 | __asm__ __volatile__ ("cli %1;\n\t" | 51 | __asm__ __volatile__ ( |
50 | "NOP; NOP; SSYNC;\n\t" | 52 | "cli %1;" |
51 | "%0 = w [%2] (z);\n\t" | 53 | "NOP; NOP; SSYNC;" |
52 | "sti %1;\n\t" | 54 | "%0 = w [%2] (z);" |
53 | : "=d"(val), "=d"(tmp): "a"(addr) | 55 | "sti %1;" |
54 | ); | 56 | : "=d"(val), "=d"(tmp) |
57 | : "a"(addr) | ||
58 | ); | ||
55 | 59 | ||
56 | return (unsigned short) val; | 60 | return (unsigned short) val; |
57 | } | 61 | } |
@@ -61,20 +65,23 @@ static inline unsigned int readl(const volatile void __iomem *addr) | |||
61 | unsigned int val; | 65 | unsigned int val; |
62 | int tmp; | 66 | int tmp; |
63 | 67 | ||
64 | __asm__ __volatile__ ("cli %1;\n\t" | 68 | __asm__ __volatile__ ( |
65 | "NOP; NOP; SSYNC;\n\t" | 69 | "cli %1;" |
66 | "%0 = [%2];\n\t" | 70 | "NOP; NOP; SSYNC;" |
67 | "sti %1;\n\t" | 71 | "%0 = [%2];" |
68 | : "=d"(val), "=d"(tmp): "a"(addr) | 72 | "sti %1;" |
69 | ); | 73 | : "=d"(val), "=d"(tmp) |
74 | : "a"(addr) | ||
75 | ); | ||
76 | |||
70 | return val; | 77 | return val; |
71 | } | 78 | } |
72 | 79 | ||
73 | #endif /* __ASSEMBLY__ */ | 80 | #endif /* __ASSEMBLY__ */ |
74 | 81 | ||
75 | #define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b)) | 82 | #define writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b)) |
76 | #define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b)) | 83 | #define writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b)) |
77 | #define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b)) | 84 | #define writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b)) |
78 | 85 | ||
79 | #define __raw_readb readb | 86 | #define __raw_readb readb |
80 | #define __raw_readw readw | 87 | #define __raw_readw readw |
@@ -82,9 +89,9 @@ static inline unsigned int readl(const volatile void __iomem *addr) | |||
82 | #define __raw_writeb writeb | 89 | #define __raw_writeb writeb |
83 | #define __raw_writew writew | 90 | #define __raw_writew writew |
84 | #define __raw_writel writel | 91 | #define __raw_writel writel |
85 | #define memset_io(a,b,c) memset((void *)(a),(b),(c)) | 92 | #define memset_io(a, b, c) memset((void *)(a), (b), (c)) |
86 | #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) | 93 | #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) |
87 | #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) | 94 | #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) |
88 | 95 | ||
89 | /* Convert "I/O port addresses" to actual addresses. i.e. ugly casts. */ | 96 | /* Convert "I/O port addresses" to actual addresses. i.e. ugly casts. */ |
90 | #define __io(port) ((void *)(unsigned long)(port)) | 97 | #define __io(port) ((void *)(unsigned long)(port)) |
@@ -92,30 +99,30 @@ static inline unsigned int readl(const volatile void __iomem *addr) | |||
92 | #define inb(port) readb(__io(port)) | 99 | #define inb(port) readb(__io(port)) |
93 | #define inw(port) readw(__io(port)) | 100 | #define inw(port) readw(__io(port)) |
94 | #define inl(port) readl(__io(port)) | 101 | #define inl(port) readl(__io(port)) |
95 | #define outb(x,port) writeb(x,__io(port)) | 102 | #define outb(x, port) writeb(x, __io(port)) |
96 | #define outw(x,port) writew(x,__io(port)) | 103 | #define outw(x, port) writew(x, __io(port)) |
97 | #define outl(x,port) writel(x,__io(port)) | 104 | #define outl(x, port) writel(x, __io(port)) |
98 | 105 | ||
99 | #define inb_p(port) inb(__io(port)) | 106 | #define inb_p(port) inb(__io(port)) |
100 | #define inw_p(port) inw(__io(port)) | 107 | #define inw_p(port) inw(__io(port)) |
101 | #define inl_p(port) inl(__io(port)) | 108 | #define inl_p(port) inl(__io(port)) |
102 | #define outb_p(x,port) outb(x,__io(port)) | 109 | #define outb_p(x, port) outb(x, __io(port)) |
103 | #define outw_p(x,port) outw(x,__io(port)) | 110 | #define outw_p(x, port) outw(x, __io(port)) |
104 | #define outl_p(x,port) outl(x,__io(port)) | 111 | #define outl_p(x, port) outl(x, __io(port)) |
105 | 112 | ||
106 | #define ioread8_rep(a,d,c) readsb(a,d,c) | 113 | #define ioread8_rep(a, d, c) readsb(a, d, c) |
107 | #define ioread16_rep(a,d,c) readsw(a,d,c) | 114 | #define ioread16_rep(a, d, c) readsw(a, d, c) |
108 | #define ioread32_rep(a,d,c) readsl(a,d,c) | 115 | #define ioread32_rep(a, d, c) readsl(a, d, c) |
109 | #define iowrite8_rep(a,s,c) writesb(a,s,c) | 116 | #define iowrite8_rep(a, s, c) writesb(a, s, c) |
110 | #define iowrite16_rep(a,s,c) writesw(a,s,c) | 117 | #define iowrite16_rep(a, s, c) writesw(a, s, c) |
111 | #define iowrite32_rep(a,s,c) writesl(a,s,c) | 118 | #define iowrite32_rep(a, s, c) writesl(a, s, c) |
112 | 119 | ||
113 | #define ioread8(X) readb(X) | 120 | #define ioread8(x) readb(x) |
114 | #define ioread16(X) readw(X) | 121 | #define ioread16(x) readw(x) |
115 | #define ioread32(X) readl(X) | 122 | #define ioread32(x) readl(x) |
116 | #define iowrite8(val,X) writeb(val,X) | 123 | #define iowrite8(val, x) writeb(val, x) |
117 | #define iowrite16(val,X) writew(val,X) | 124 | #define iowrite16(val, x) writew(val, x) |
118 | #define iowrite32(val,X) writel(val,X) | 125 | #define iowrite32(val, x) writel(val, x) |
119 | 126 | ||
120 | #define mmiowb() wmb() | 127 | #define mmiowb() wmb() |
121 | 128 | ||
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h index 4617ba66278f..d3b40449ca0e 100644 --- a/arch/blackfin/include/asm/ipipe.h +++ b/arch/blackfin/include/asm/ipipe.h | |||
@@ -35,9 +35,9 @@ | |||
35 | #include <asm/atomic.h> | 35 | #include <asm/atomic.h> |
36 | #include <asm/traps.h> | 36 | #include <asm/traps.h> |
37 | 37 | ||
38 | #define IPIPE_ARCH_STRING "1.11-00" | 38 | #define IPIPE_ARCH_STRING "1.12-00" |
39 | #define IPIPE_MAJOR_NUMBER 1 | 39 | #define IPIPE_MAJOR_NUMBER 1 |
40 | #define IPIPE_MINOR_NUMBER 11 | 40 | #define IPIPE_MINOR_NUMBER 12 |
41 | #define IPIPE_PATCH_NUMBER 0 | 41 | #define IPIPE_PATCH_NUMBER 0 |
42 | 42 | ||
43 | #ifdef CONFIG_SMP | 43 | #ifdef CONFIG_SMP |
@@ -124,16 +124,6 @@ static inline int __ipipe_check_tickdev(const char *devname) | |||
124 | return 1; | 124 | return 1; |
125 | } | 125 | } |
126 | 126 | ||
127 | static inline void __ipipe_lock_root(void) | ||
128 | { | ||
129 | set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)); | ||
130 | } | ||
131 | |||
132 | static inline void __ipipe_unlock_root(void) | ||
133 | { | ||
134 | clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)); | ||
135 | } | ||
136 | |||
137 | void __ipipe_enable_pipeline(void); | 127 | void __ipipe_enable_pipeline(void); |
138 | 128 | ||
139 | #define __ipipe_hook_critical_ipi(ipd) do { } while (0) | 129 | #define __ipipe_hook_critical_ipi(ipd) do { } while (0) |
diff --git a/arch/blackfin/include/asm/ipipe_base.h b/arch/blackfin/include/asm/ipipe_base.h index 490098f532a7..00409201d9ed 100644 --- a/arch/blackfin/include/asm/ipipe_base.h +++ b/arch/blackfin/include/asm/ipipe_base.h | |||
@@ -51,23 +51,15 @@ | |||
51 | 51 | ||
52 | extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ | 52 | extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ |
53 | 53 | ||
54 | #define __ipipe_stall_root() \ | 54 | void __ipipe_stall_root(void); |
55 | do { \ | 55 | |
56 | volatile unsigned long *p = &__ipipe_root_status; \ | 56 | unsigned long __ipipe_test_and_stall_root(void); |
57 | set_bit(0, p); \ | 57 | |
58 | } while (0) | 58 | unsigned long __ipipe_test_root(void); |
59 | 59 | ||
60 | #define __ipipe_test_and_stall_root() \ | 60 | void __ipipe_lock_root(void); |
61 | ({ \ | 61 | |
62 | volatile unsigned long *p = &__ipipe_root_status; \ | 62 | void __ipipe_unlock_root(void); |
63 | test_and_set_bit(0, p); \ | ||
64 | }) | ||
65 | |||
66 | #define __ipipe_test_root() \ | ||
67 | ({ \ | ||
68 | const unsigned long *p = &__ipipe_root_status; \ | ||
69 | test_bit(0, p); \ | ||
70 | }) | ||
71 | 63 | ||
72 | #endif /* !__ASSEMBLY__ */ | 64 | #endif /* !__ASSEMBLY__ */ |
73 | 65 | ||
diff --git a/arch/blackfin/include/asm/irqflags.h b/arch/blackfin/include/asm/irqflags.h index 9b19a19d9ae9..813a1af3e865 100644 --- a/arch/blackfin/include/asm/irqflags.h +++ b/arch/blackfin/include/asm/irqflags.h | |||
@@ -33,6 +33,7 @@ static inline unsigned long bfin_cli(void) | |||
33 | 33 | ||
34 | #ifdef CONFIG_IPIPE | 34 | #ifdef CONFIG_IPIPE |
35 | 35 | ||
36 | #include <linux/compiler.h> | ||
36 | #include <linux/ipipe_base.h> | 37 | #include <linux/ipipe_base.h> |
37 | #include <linux/ipipe_trace.h> | 38 | #include <linux/ipipe_trace.h> |
38 | 39 | ||
@@ -49,12 +50,12 @@ static inline unsigned long bfin_cli(void) | |||
49 | barrier(); \ | 50 | barrier(); \ |
50 | } while (0) | 51 | } while (0) |
51 | 52 | ||
52 | static inline void raw_local_irq_enable(void) | 53 | #define raw_local_irq_enable() \ |
53 | { | 54 | do { \ |
54 | barrier(); | 55 | barrier(); \ |
55 | ipipe_check_context(ipipe_root_domain); | 56 | ipipe_check_context(ipipe_root_domain); \ |
56 | __ipipe_unstall_root(); | 57 | __ipipe_unstall_root(); \ |
57 | } | 58 | } while (0) |
58 | 59 | ||
59 | #define raw_local_save_flags_ptr(x) \ | 60 | #define raw_local_save_flags_ptr(x) \ |
60 | do { \ | 61 | do { \ |
diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h index c8b256d2ea30..8651afe12990 100644 --- a/arch/blackfin/include/asm/kgdb.h +++ b/arch/blackfin/include/asm/kgdb.h | |||
@@ -10,9 +10,6 @@ | |||
10 | 10 | ||
11 | #include <linux/ptrace.h> | 11 | #include <linux/ptrace.h> |
12 | 12 | ||
13 | /* gdb locks */ | ||
14 | #define KGDB_MAX_NO_CPUS 8 | ||
15 | |||
16 | /* | 13 | /* |
17 | * BUFMAX defines the maximum number of characters in inbound/outbound buffers. | 14 | * BUFMAX defines the maximum number of characters in inbound/outbound buffers. |
18 | * At least NUMREGBYTES*2 are needed for register packets. | 15 | * At least NUMREGBYTES*2 are needed for register packets. |
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h index 4179e329b9c9..7c8fe834ff22 100644 --- a/arch/blackfin/include/asm/mem_init.h +++ b/arch/blackfin/include/asm/mem_init.h | |||
@@ -295,156 +295,3 @@ | |||
295 | #else | 295 | #else |
296 | #define PLL_BYPASS 0 | 296 | #define PLL_BYPASS 0 |
297 | #endif | 297 | #endif |
298 | |||
299 | /***************************************Currently Not Being Used *********************************/ | ||
300 | |||
301 | #if defined(CONFIG_FLASH_SPEED_BWAT) && \ | ||
302 | defined(CONFIG_FLASH_SPEED_BRAT) && \ | ||
303 | defined(CONFIG_FLASH_SPEED_BHT) && \ | ||
304 | defined(CONFIG_FLASH_SPEED_BST) && \ | ||
305 | defined(CONFIG_FLASH_SPEED_BTT) | ||
306 | |||
307 | #define flash_EBIU_AMBCTL_WAT ((CONFIG_FLASH_SPEED_BWAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1 | ||
308 | #define flash_EBIU_AMBCTL_RAT ((CONFIG_FLASH_SPEED_BRAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1 | ||
309 | #define flash_EBIU_AMBCTL_HT ((CONFIG_FLASH_SPEED_BHT * 4) / (4000000000 / CONFIG_SCLK_HZ)) | ||
310 | #define flash_EBIU_AMBCTL_ST ((CONFIG_FLASH_SPEED_BST * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1 | ||
311 | #define flash_EBIU_AMBCTL_TT ((CONFIG_FLASH_SPEED_BTT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1 | ||
312 | |||
313 | #if (flash_EBIU_AMBCTL_TT > 3) | ||
314 | #define flash_EBIU_AMBCTL0_TT B0TT_4 | ||
315 | #endif | ||
316 | #if (flash_EBIU_AMBCTL_TT == 3) | ||
317 | #define flash_EBIU_AMBCTL0_TT B0TT_3 | ||
318 | #endif | ||
319 | #if (flash_EBIU_AMBCTL_TT == 2) | ||
320 | #define flash_EBIU_AMBCTL0_TT B0TT_2 | ||
321 | #endif | ||
322 | #if (flash_EBIU_AMBCTL_TT < 2) | ||
323 | #define flash_EBIU_AMBCTL0_TT B0TT_1 | ||
324 | #endif | ||
325 | |||
326 | #if (flash_EBIU_AMBCTL_ST > 3) | ||
327 | #define flash_EBIU_AMBCTL0_ST B0ST_4 | ||
328 | #endif | ||
329 | #if (flash_EBIU_AMBCTL_ST == 3) | ||
330 | #define flash_EBIU_AMBCTL0_ST B0ST_3 | ||
331 | #endif | ||
332 | #if (flash_EBIU_AMBCTL_ST == 2) | ||
333 | #define flash_EBIU_AMBCTL0_ST B0ST_2 | ||
334 | #endif | ||
335 | #if (flash_EBIU_AMBCTL_ST < 2) | ||
336 | #define flash_EBIU_AMBCTL0_ST B0ST_1 | ||
337 | #endif | ||
338 | |||
339 | #if (flash_EBIU_AMBCTL_HT > 2) | ||
340 | #define flash_EBIU_AMBCTL0_HT B0HT_3 | ||
341 | #endif | ||
342 | #if (flash_EBIU_AMBCTL_HT == 2) | ||
343 | #define flash_EBIU_AMBCTL0_HT B0HT_2 | ||
344 | #endif | ||
345 | #if (flash_EBIU_AMBCTL_HT == 1) | ||
346 | #define flash_EBIU_AMBCTL0_HT B0HT_1 | ||
347 | #endif | ||
348 | #if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT == 0) | ||
349 | #define flash_EBIU_AMBCTL0_HT B0HT_0 | ||
350 | #endif | ||
351 | #if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT != 0) | ||
352 | #define flash_EBIU_AMBCTL0_HT B0HT_1 | ||
353 | #endif | ||
354 | |||
355 | #if (flash_EBIU_AMBCTL_WAT > 14) | ||
356 | #define flash_EBIU_AMBCTL0_WAT B0WAT_15 | ||
357 | #endif | ||
358 | #if (flash_EBIU_AMBCTL_WAT == 14) | ||
359 | #define flash_EBIU_AMBCTL0_WAT B0WAT_14 | ||
360 | #endif | ||
361 | #if (flash_EBIU_AMBCTL_WAT == 13) | ||
362 | #define flash_EBIU_AMBCTL0_WAT B0WAT_13 | ||
363 | #endif | ||
364 | #if (flash_EBIU_AMBCTL_WAT == 12) | ||
365 | #define flash_EBIU_AMBCTL0_WAT B0WAT_12 | ||
366 | #endif | ||
367 | #if (flash_EBIU_AMBCTL_WAT == 11) | ||
368 | #define flash_EBIU_AMBCTL0_WAT B0WAT_11 | ||
369 | #endif | ||
370 | #if (flash_EBIU_AMBCTL_WAT == 10) | ||
371 | #define flash_EBIU_AMBCTL0_WAT B0WAT_10 | ||
372 | #endif | ||
373 | #if (flash_EBIU_AMBCTL_WAT == 9) | ||
374 | #define flash_EBIU_AMBCTL0_WAT B0WAT_9 | ||
375 | #endif | ||
376 | #if (flash_EBIU_AMBCTL_WAT == 8) | ||
377 | #define flash_EBIU_AMBCTL0_WAT B0WAT_8 | ||
378 | #endif | ||
379 | #if (flash_EBIU_AMBCTL_WAT == 7) | ||
380 | #define flash_EBIU_AMBCTL0_WAT B0WAT_7 | ||
381 | #endif | ||
382 | #if (flash_EBIU_AMBCTL_WAT == 6) | ||
383 | #define flash_EBIU_AMBCTL0_WAT B0WAT_6 | ||
384 | #endif | ||
385 | #if (flash_EBIU_AMBCTL_WAT == 5) | ||
386 | #define flash_EBIU_AMBCTL0_WAT B0WAT_5 | ||
387 | #endif | ||
388 | #if (flash_EBIU_AMBCTL_WAT == 4) | ||
389 | #define flash_EBIU_AMBCTL0_WAT B0WAT_4 | ||
390 | #endif | ||
391 | #if (flash_EBIU_AMBCTL_WAT == 3) | ||
392 | #define flash_EBIU_AMBCTL0_WAT B0WAT_3 | ||
393 | #endif | ||
394 | #if (flash_EBIU_AMBCTL_WAT == 2) | ||
395 | #define flash_EBIU_AMBCTL0_WAT B0WAT_2 | ||
396 | #endif | ||
397 | #if (flash_EBIU_AMBCTL_WAT == 1) | ||
398 | #define flash_EBIU_AMBCTL0_WAT B0WAT_1 | ||
399 | #endif | ||
400 | |||
401 | #if (flash_EBIU_AMBCTL_RAT > 14) | ||
402 | #define flash_EBIU_AMBCTL0_RAT B0RAT_15 | ||
403 | #endif | ||
404 | #if (flash_EBIU_AMBCTL_RAT == 14) | ||
405 | #define flash_EBIU_AMBCTL0_RAT B0RAT_14 | ||
406 | #endif | ||
407 | #if (flash_EBIU_AMBCTL_RAT == 13) | ||
408 | #define flash_EBIU_AMBCTL0_RAT B0RAT_13 | ||
409 | #endif | ||
410 | #if (flash_EBIU_AMBCTL_RAT == 12) | ||
411 | #define flash_EBIU_AMBCTL0_RAT B0RAT_12 | ||
412 | #endif | ||
413 | #if (flash_EBIU_AMBCTL_RAT == 11) | ||
414 | #define flash_EBIU_AMBCTL0_RAT B0RAT_11 | ||
415 | #endif | ||
416 | #if (flash_EBIU_AMBCTL_RAT == 10) | ||
417 | #define flash_EBIU_AMBCTL0_RAT B0RAT_10 | ||
418 | #endif | ||
419 | #if (flash_EBIU_AMBCTL_RAT == 9) | ||
420 | #define flash_EBIU_AMBCTL0_RAT B0RAT_9 | ||
421 | #endif | ||
422 | #if (flash_EBIU_AMBCTL_RAT == 8) | ||
423 | #define flash_EBIU_AMBCTL0_RAT B0RAT_8 | ||
424 | #endif | ||
425 | #if (flash_EBIU_AMBCTL_RAT == 7) | ||
426 | #define flash_EBIU_AMBCTL0_RAT B0RAT_7 | ||
427 | #endif | ||
428 | #if (flash_EBIU_AMBCTL_RAT == 6) | ||
429 | #define flash_EBIU_AMBCTL0_RAT B0RAT_6 | ||
430 | #endif | ||
431 | #if (flash_EBIU_AMBCTL_RAT == 5) | ||
432 | #define flash_EBIU_AMBCTL0_RAT B0RAT_5 | ||
433 | #endif | ||
434 | #if (flash_EBIU_AMBCTL_RAT == 4) | ||
435 | #define flash_EBIU_AMBCTL0_RAT B0RAT_4 | ||
436 | #endif | ||
437 | #if (flash_EBIU_AMBCTL_RAT == 3) | ||
438 | #define flash_EBIU_AMBCTL0_RAT B0RAT_3 | ||
439 | #endif | ||
440 | #if (flash_EBIU_AMBCTL_RAT == 2) | ||
441 | #define flash_EBIU_AMBCTL0_RAT B0RAT_2 | ||
442 | #endif | ||
443 | #if (flash_EBIU_AMBCTL_RAT == 1) | ||
444 | #define flash_EBIU_AMBCTL0_RAT B0RAT_1 | ||
445 | #endif | ||
446 | |||
447 | #define flash_EBIU_AMBCTL0 \ | ||
448 | (flash_EBIU_AMBCTL0_WAT | flash_EBIU_AMBCTL0_RAT | flash_EBIU_AMBCTL0_HT | \ | ||
449 | flash_EBIU_AMBCTL0_ST | flash_EBIU_AMBCTL0_TT | CONFIG_FLASH_SPEED_RDYEN) | ||
450 | #endif | ||
diff --git a/arch/blackfin/include/asm/mmu_context.h b/arch/blackfin/include/asm/mmu_context.h index 4a3be376ad5b..ae8ef4ffd806 100644 --- a/arch/blackfin/include/asm/mmu_context.h +++ b/arch/blackfin/include/asm/mmu_context.h | |||
@@ -66,8 +66,8 @@ activate_l1stack(struct mm_struct *mm, unsigned long sp_base) | |||
66 | 66 | ||
67 | #define activate_mm(prev, next) switch_mm(prev, next, NULL) | 67 | #define activate_mm(prev, next) switch_mm(prev, next, NULL) |
68 | 68 | ||
69 | static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm, | 69 | static inline void __switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm, |
70 | struct task_struct *tsk) | 70 | struct task_struct *tsk) |
71 | { | 71 | { |
72 | #ifdef CONFIG_MPU | 72 | #ifdef CONFIG_MPU |
73 | unsigned int cpu = smp_processor_id(); | 73 | unsigned int cpu = smp_processor_id(); |
@@ -95,7 +95,24 @@ static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_m | |||
95 | #endif | 95 | #endif |
96 | } | 96 | } |
97 | 97 | ||
98 | #ifdef CONFIG_IPIPE | ||
99 | #define lock_mm_switch(flags) local_irq_save_hw_cond(flags) | ||
100 | #define unlock_mm_switch(flags) local_irq_restore_hw_cond(flags) | ||
101 | #else | ||
102 | #define lock_mm_switch(flags) do { (void)(flags); } while (0) | ||
103 | #define unlock_mm_switch(flags) do { (void)(flags); } while (0) | ||
104 | #endif /* CONFIG_IPIPE */ | ||
105 | |||
98 | #ifdef CONFIG_MPU | 106 | #ifdef CONFIG_MPU |
107 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | ||
108 | struct task_struct *tsk) | ||
109 | { | ||
110 | unsigned long flags; | ||
111 | lock_mm_switch(flags); | ||
112 | __switch_mm(prev, next, tsk); | ||
113 | unlock_mm_switch(flags); | ||
114 | } | ||
115 | |||
99 | static inline void protect_page(struct mm_struct *mm, unsigned long addr, | 116 | static inline void protect_page(struct mm_struct *mm, unsigned long addr, |
100 | unsigned long flags) | 117 | unsigned long flags) |
101 | { | 118 | { |
@@ -128,6 +145,12 @@ static inline void update_protections(struct mm_struct *mm) | |||
128 | set_mask_dcplbs(mm->context.page_rwx_mask, cpu); | 145 | set_mask_dcplbs(mm->context.page_rwx_mask, cpu); |
129 | } | 146 | } |
130 | } | 147 | } |
148 | #else /* !CONFIG_MPU */ | ||
149 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | ||
150 | struct task_struct *tsk) | ||
151 | { | ||
152 | __switch_mm(prev, next, tsk); | ||
153 | } | ||
131 | #endif | 154 | #endif |
132 | 155 | ||
133 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | 156 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) |
@@ -173,4 +196,10 @@ static inline void destroy_context(struct mm_struct *mm) | |||
173 | #endif | 196 | #endif |
174 | } | 197 | } |
175 | 198 | ||
199 | #define ipipe_mm_switch_protect(flags) \ | ||
200 | local_irq_save_hw_cond(flags) | ||
201 | |||
202 | #define ipipe_mm_switch_unprotect(flags) \ | ||
203 | local_irq_restore_hw_cond(flags) | ||
204 | |||
176 | #endif | 205 | #endif |
diff --git a/arch/blackfin/include/asm/pci.h b/arch/blackfin/include/asm/pci.h index 61277358c865..99cae2e3bac7 100644 --- a/arch/blackfin/include/asm/pci.h +++ b/arch/blackfin/include/asm/pci.h | |||
@@ -4,145 +4,19 @@ | |||
4 | #define _ASM_BFIN_PCI_H | 4 | #define _ASM_BFIN_PCI_H |
5 | 5 | ||
6 | #include <asm/scatterlist.h> | 6 | #include <asm/scatterlist.h> |
7 | #include <asm-generic/pci-dma-compat.h> | ||
8 | #include <asm-generic/pci.h> | ||
7 | 9 | ||
8 | /* | ||
9 | * | ||
10 | * Written by Wout Klaren. | ||
11 | */ | ||
12 | |||
13 | /* Added by Chang Junxiao */ | ||
14 | #define PCIBIOS_MIN_IO 0x00001000 | 10 | #define PCIBIOS_MIN_IO 0x00001000 |
15 | #define PCIBIOS_MIN_MEM 0x10000000 | 11 | #define PCIBIOS_MIN_MEM 0x10000000 |
16 | 12 | ||
17 | #define PCI_DMA_BUS_IS_PHYS (1) | ||
18 | struct pci_ops; | ||
19 | |||
20 | /* | ||
21 | * Structure with hardware dependent information and functions of the | ||
22 | * PCI bus. | ||
23 | */ | ||
24 | struct pci_bus_info { | ||
25 | |||
26 | /* | ||
27 | * Resources of the PCI bus. | ||
28 | */ | ||
29 | struct resource mem_space; | ||
30 | struct resource io_space; | ||
31 | |||
32 | /* | ||
33 | * System dependent functions. | ||
34 | */ | ||
35 | struct pci_ops *bfin_pci_ops; | ||
36 | void (*fixup) (int pci_modify); | ||
37 | void (*conf_device) (unsigned char bus, unsigned char device_fn); | ||
38 | }; | ||
39 | |||
40 | #define pcibios_assign_all_busses() 0 | ||
41 | static inline void pcibios_set_master(struct pci_dev *dev) | 13 | static inline void pcibios_set_master(struct pci_dev *dev) |
42 | { | 14 | { |
43 | |||
44 | /* No special bus mastering setup handling */ | 15 | /* No special bus mastering setup handling */ |
45 | } | 16 | } |
46 | static inline void pcibios_penalize_isa_irq(int irq) | 17 | static inline void pcibios_penalize_isa_irq(int irq) |
47 | { | 18 | { |
48 | |||
49 | /* We don't do dynamic PCI IRQ allocation */ | 19 | /* We don't do dynamic PCI IRQ allocation */ |
50 | } | 20 | } |
51 | static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, | ||
52 | size_t size, int direction) | ||
53 | { | ||
54 | if (direction == PCI_DMA_NONE) | ||
55 | BUG(); | ||
56 | |||
57 | /* return virt_to_bus(ptr); */ | ||
58 | return (dma_addr_t) ptr; | ||
59 | } | ||
60 | |||
61 | /* Unmap a single streaming mode DMA translation. The dma_addr and size | ||
62 | * must match what was provided for in a previous pci_map_single call. All | ||
63 | * other usages are undefined. | ||
64 | * | ||
65 | * After this call, reads by the cpu to the buffer are guarenteed to see | ||
66 | * whatever the device wrote there. | ||
67 | */ | ||
68 | static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, | ||
69 | size_t size, int direction) | ||
70 | { | ||
71 | if (direction == PCI_DMA_NONE) | ||
72 | BUG(); | ||
73 | |||
74 | /* Nothing to do */ | ||
75 | } | ||
76 | |||
77 | /* Map a set of buffers described by scatterlist in streaming | ||
78 | * mode for DMA. This is the scather-gather version of the | ||
79 | * above pci_map_single interface. Here the scatter gather list | ||
80 | * elements are each tagged with the appropriate dma address | ||
81 | * and length. They are obtained via sg_dma_{address,length}(SG). | ||
82 | * | ||
83 | * NOTE: An implementation may be able to use a smaller number of | ||
84 | * DMA address/length pairs than there are SG table elements. | ||
85 | * (for example via virtual mapping capabilities) | ||
86 | * The routine returns the number of addr/length pairs actually | ||
87 | * used, at most nents. | ||
88 | * | ||
89 | * Device ownership issues as mentioned above for pci_map_single are | ||
90 | * the same here. | ||
91 | */ | ||
92 | static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, | ||
93 | int nents, int direction) | ||
94 | { | ||
95 | if (direction == PCI_DMA_NONE) | ||
96 | BUG(); | ||
97 | return nents; | ||
98 | } | ||
99 | |||
100 | /* Unmap a set of streaming mode DMA translations. | ||
101 | * Again, cpu read rules concerning calls here are the same as for | ||
102 | * pci_unmap_single() above. | ||
103 | */ | ||
104 | static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, | ||
105 | int nents, int direction) | ||
106 | { | ||
107 | if (direction == PCI_DMA_NONE) | ||
108 | BUG(); | ||
109 | |||
110 | /* Nothing to do */ | ||
111 | } | ||
112 | |||
113 | /* Make physical memory consistent for a single | ||
114 | * streaming mode DMA translation after a transfer. | ||
115 | * | ||
116 | * If you perform a pci_map_single() but wish to interrogate the | ||
117 | * buffer using the cpu, yet do not wish to teardown the PCI dma | ||
118 | * mapping, you must call this function before doing so. At the | ||
119 | * next point you give the PCI dma address back to the card, the | ||
120 | * device again owns the buffer. | ||
121 | */ | ||
122 | static inline void pci_dma_sync_single(struct pci_dev *hwdev, | ||
123 | dma_addr_t dma_handle, size_t size, | ||
124 | int direction) | ||
125 | { | ||
126 | if (direction == PCI_DMA_NONE) | ||
127 | BUG(); | ||
128 | |||
129 | /* Nothing to do */ | ||
130 | } | ||
131 | |||
132 | /* Make physical memory consistent for a set of streaming | ||
133 | * mode DMA translations after a transfer. | ||
134 | * | ||
135 | * The same as pci_dma_sync_single but for a scatter-gather list, | ||
136 | * same rules and usage. | ||
137 | */ | ||
138 | static inline void pci_dma_sync_sg(struct pci_dev *hwdev, | ||
139 | struct scatterlist *sg, int nelems, | ||
140 | int direction) | ||
141 | { | ||
142 | if (direction == PCI_DMA_NONE) | ||
143 | BUG(); | ||
144 | |||
145 | /* Nothing to do */ | ||
146 | } | ||
147 | 21 | ||
148 | #endif /* _ASM_BFIN_PCI_H */ | 22 | #endif /* _ASM_BFIN_PCI_H */ |
diff --git a/arch/blackfin/include/asm/ptrace.h b/arch/blackfin/include/asm/ptrace.h index 27290c955a7a..b33a4488f498 100644 --- a/arch/blackfin/include/asm/ptrace.h +++ b/arch/blackfin/include/asm/ptrace.h | |||
@@ -89,9 +89,9 @@ struct pt_regs { | |||
89 | #define PTRACE_GETREGS 12 | 89 | #define PTRACE_GETREGS 12 |
90 | #define PTRACE_SETREGS 13 /* ptrace signal */ | 90 | #define PTRACE_SETREGS 13 /* ptrace signal */ |
91 | 91 | ||
92 | #define PTRACE_GETFDPIC 31 | 92 | #define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ |
93 | #define PTRACE_GETFDPIC_EXEC 0 | 93 | #define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ |
94 | #define PTRACE_GETFDPIC_INTERP 1 | 94 | #define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ |
95 | 95 | ||
96 | #define PS_S (0x0002) | 96 | #define PS_S (0x0002) |
97 | 97 | ||
diff --git a/arch/blackfin/include/asm/sections.h b/arch/blackfin/include/asm/sections.h index 1f5381fbb4a7..42f6c53c59c6 100644 --- a/arch/blackfin/include/asm/sections.h +++ b/arch/blackfin/include/asm/sections.h | |||
@@ -13,10 +13,18 @@ extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size; | |||
13 | extern unsigned long _ramstart, _ramend, _rambase; | 13 | extern unsigned long _ramstart, _ramend, _rambase; |
14 | extern unsigned long memory_start, memory_end, physical_mem_end; | 14 | extern unsigned long memory_start, memory_end, physical_mem_end; |
15 | 15 | ||
16 | extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[], | 16 | /* |
17 | _ebss_l1[], _l1_lma_start[], _sdata_b_l1[], _sbss_b_l1[], _ebss_b_l1[], | 17 | * The weak markings on the lengths might seem weird, but this is required |
18 | _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[], | 18 | * in order to make gcc accept the fact that these may actually have a value |
19 | _ebss_l2[], _l2_lma_start[]; | 19 | * of 0 (since they aren't actually addresses, but sizes of sections). |
20 | */ | ||
21 | extern char _stext_l1[], _etext_l1[], _text_l1_lma[], __weak _text_l1_len[]; | ||
22 | extern char _sdata_l1[], _edata_l1[], _sbss_l1[], _ebss_l1[], | ||
23 | _data_l1_lma[], __weak _data_l1_len[]; | ||
24 | extern char _sdata_b_l1[], _edata_b_l1[], _sbss_b_l1[], _ebss_b_l1[], | ||
25 | _data_b_l1_lma[], __weak _data_b_l1_len[]; | ||
26 | extern char _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], | ||
27 | _sbss_l2[], _ebss_l2[], _l2_lma[], __weak _l2_len[]; | ||
20 | 28 | ||
21 | #include <asm/mem_map.h> | 29 | #include <asm/mem_map.h> |
22 | 30 | ||
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h index afb3a8626380..a40d9368c38a 100644 --- a/arch/blackfin/include/asm/thread_info.h +++ b/arch/blackfin/include/asm/thread_info.h | |||
@@ -103,11 +103,13 @@ static inline struct thread_info *current_thread_info(void) | |||
103 | #define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ | 103 | #define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ |
104 | #define TIF_FREEZE 6 /* is freezing for suspend */ | 104 | #define TIF_FREEZE 6 /* is freezing for suspend */ |
105 | #define TIF_IRQ_SYNC 7 /* sync pipeline stage */ | 105 | #define TIF_IRQ_SYNC 7 /* sync pipeline stage */ |
106 | #define TIF_NOTIFY_RESUME 8 /* callback before returning to user */ | ||
106 | 107 | ||
107 | /* as above, but as bit values */ | 108 | /* as above, but as bit values */ |
108 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | 109 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) |
109 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) | 110 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) |
110 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) | 111 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) |
112 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) | ||
111 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | 113 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) |
112 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) | 114 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) |
113 | #define _TIF_FREEZE (1<<TIF_FREEZE) | 115 | #define _TIF_FREEZE (1<<TIF_FREEZE) |
diff --git a/arch/blackfin/include/asm/trace.h b/arch/blackfin/include/asm/trace.h index 609ad3c84189..dc0aa55ae773 100644 --- a/arch/blackfin/include/asm/trace.h +++ b/arch/blackfin/include/asm/trace.h | |||
@@ -28,6 +28,8 @@ extern unsigned long software_trace_buff[]; | |||
28 | 28 | ||
29 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON | 29 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON |
30 | 30 | ||
31 | #define trace_buffer_init() bfin_write_TBUFCTL(BFIN_TRACE_INIT) | ||
32 | |||
31 | #define trace_buffer_save(x) \ | 33 | #define trace_buffer_save(x) \ |
32 | do { \ | 34 | do { \ |
33 | (x) = bfin_read_TBUFCTL(); \ | 35 | (x) = bfin_read_TBUFCTL(); \ |
diff --git a/arch/blackfin/include/asm/uaccess.h b/arch/blackfin/include/asm/uaccess.h index c03b8532aad3..1c0d190adaef 100644 --- a/arch/blackfin/include/asm/uaccess.h +++ b/arch/blackfin/include/asm/uaccess.h | |||
@@ -17,9 +17,7 @@ | |||
17 | #include <linux/string.h> | 17 | #include <linux/string.h> |
18 | 18 | ||
19 | #include <asm/segment.h> | 19 | #include <asm/segment.h> |
20 | #ifdef CONFIG_ACCESS_CHECK | 20 | #include <asm/sections.h> |
21 | # include <asm/bfin-global.h> | ||
22 | #endif | ||
23 | 21 | ||
24 | #define get_ds() (KERNEL_DS) | 22 | #define get_ds() (KERNEL_DS) |
25 | #define get_fs() (current_thread_info()->addr_limit) | 23 | #define get_fs() (current_thread_info()->addr_limit) |
diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h index 779be02a910a..22886cbdae7a 100644 --- a/arch/blackfin/include/asm/unistd.h +++ b/arch/blackfin/include/asm/unistd.h | |||
@@ -388,8 +388,9 @@ | |||
388 | #define __NR_pwritev 367 | 388 | #define __NR_pwritev 367 |
389 | #define __NR_rt_tgsigqueueinfo 368 | 389 | #define __NR_rt_tgsigqueueinfo 368 |
390 | #define __NR_perf_event_open 369 | 390 | #define __NR_perf_event_open 369 |
391 | #define __NR_recvmmsg 370 | ||
391 | 392 | ||
392 | #define __NR_syscall 370 | 393 | #define __NR_syscall 371 |
393 | #define NR_syscalls __NR_syscall | 394 | #define NR_syscalls __NR_syscall |
394 | 395 | ||
395 | /* Old optional stuff no one actually uses */ | 396 | /* Old optional stuff no one actually uses */ |