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authorSteven Miao <realmz6@gmail.com>2012-05-16 06:11:10 -0400
committerBob Liu <lliubbo@gmail.com>2012-05-21 02:54:20 -0400
commit2879bb30d788bb3841e2f1675ea7af5204eb171c (patch)
treea5d5eaca8faa37c95fda955c11a5c9d902bff7a5 /arch/blackfin/include/asm
parente578bbdeb8db3656eff428f097d6c8ed2f3718a5 (diff)
blackfin: bf60x: enable gptimer clock source
Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
Diffstat (limited to 'arch/blackfin/include/asm')
-rw-r--r--arch/blackfin/include/asm/gptimers.h104
1 files changed, 104 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h
index 38bddcb190c8..381e3d621a4c 100644
--- a/arch/blackfin/include/asm/gptimers.h
+++ b/arch/blackfin/include/asm/gptimers.h
@@ -44,6 +44,13 @@
44# define TIMER_GROUP2 1 44# define TIMER_GROUP2 1
45#endif 45#endif
46/* 46/*
47 * BF609: 8 timers:
48 */
49#if defined(CONFIG_BF60x)
50# define MAX_BLACKFIN_GPTIMERS 8
51# define TIMER0_GROUP_REG TIMER_RUN
52#endif
53/*
47 * All others: 3 timers: 54 * All others: 3 timers:
48 */ 55 */
49#define TIMER_GROUP1 0 56#define TIMER_GROUP1 0
@@ -104,6 +111,72 @@
104# define FS2_TIMER_BIT TIMER1bit 111# define FS2_TIMER_BIT TIMER1bit
105#endif 112#endif
106 113
114#ifdef CONFIG_BF60x
115/*
116 * Timer Configuration Register Bits
117 */
118#define TIMER_EMU_RUN 0x8000
119#define TIMER_BPER_EN 0x4000
120#define TIMER_BWID_EN 0x2000
121#define TIMER_BDLY_EN 0x1000
122#define TIMER_OUT_DIS 0x0800
123#define TIMER_TIN_SEL 0x0400
124#define TIMER_CLK_SEL 0x0300
125#define TIMER_CLK_SCLK 0x0000
126#define TIMER_CLK_ALT_CLK0 0x0100
127#define TIMER_CLK_ALT_CLK1 0x0300
128#define TIMER_PULSE_HI 0x0080
129#define TIMER_SLAVE_TRIG 0x0040
130#define TIMER_IRQ_MODE 0x0030
131#define TIMER_IRQ_ACT_EDGE 0x0000
132#define TIMER_IRQ_DLY 0x0010
133#define TIMER_IRQ_WID_DLY 0x0020
134#define TIMER_IRQ_PER 0x0030
135#define TIMER_MODE 0x000f
136#define TIMER_MODE_WDOG_P 0x0008
137#define TIMER_MODE_WDOG_W 0x0009
138#define TIMER_MODE_PWM_CONT 0x000c
139#define TIMER_MODE_PWM 0x000d
140#define TIMER_MODE_WDTH 0x000a
141#define TIMER_MODE_WDTH_D 0x000b
142#define TIMER_MODE_EXT_CLK 0x000e
143#define TIMER_MODE_PININT 0x000f
144
145/*
146 * Timer Status Register Bits
147 */
148#define TIMER_STATUS_TIMIL0 0x0001
149#define TIMER_STATUS_TIMIL1 0x0002
150#define TIMER_STATUS_TIMIL2 0x0004
151#define TIMER_STATUS_TIMIL3 0x0008
152#define TIMER_STATUS_TIMIL4 0x0010
153#define TIMER_STATUS_TIMIL5 0x0020
154#define TIMER_STATUS_TIMIL6 0x0040
155#define TIMER_STATUS_TIMIL7 0x0080
156
157#define TIMER_STATUS_TOVF0 0x0001 /* timer 0 overflow error */
158#define TIMER_STATUS_TOVF1 0x0002
159#define TIMER_STATUS_TOVF2 0x0004
160#define TIMER_STATUS_TOVF3 0x0008
161#define TIMER_STATUS_TOVF4 0x0010
162#define TIMER_STATUS_TOVF5 0x0020
163#define TIMER_STATUS_TOVF6 0x0040
164#define TIMER_STATUS_TOVF7 0x0080
165
166/*
167 * Timer Slave Enable Status : write 1 to clear
168 */
169#define TIMER_STATUS_TRUN0 0x0001
170#define TIMER_STATUS_TRUN1 0x0002
171#define TIMER_STATUS_TRUN2 0x0004
172#define TIMER_STATUS_TRUN3 0x0008
173#define TIMER_STATUS_TRUN4 0x0010
174#define TIMER_STATUS_TRUN5 0x0020
175#define TIMER_STATUS_TRUN6 0x0040
176#define TIMER_STATUS_TRUN7 0x0080
177
178#else
179
107/* 180/*
108 * Timer Configuration Register Bits 181 * Timer Configuration Register Bits
109 */ 182 */
@@ -170,12 +243,18 @@
170#define TIMER_STATUS_TRUN10 0x4000 243#define TIMER_STATUS_TRUN10 0x4000
171#define TIMER_STATUS_TRUN11 0x8000 244#define TIMER_STATUS_TRUN11 0x8000
172 245
246#endif
247
173/* The actual gptimer API */ 248/* The actual gptimer API */
174 249
175void set_gptimer_pwidth(unsigned int timer_id, uint32_t width); 250void set_gptimer_pwidth(unsigned int timer_id, uint32_t width);
176uint32_t get_gptimer_pwidth(unsigned int timer_id); 251uint32_t get_gptimer_pwidth(unsigned int timer_id);
177void set_gptimer_period(unsigned int timer_id, uint32_t period); 252void set_gptimer_period(unsigned int timer_id, uint32_t period);
178uint32_t get_gptimer_period(unsigned int timer_id); 253uint32_t get_gptimer_period(unsigned int timer_id);
254#ifdef CONFIG_BF60x
255void set_gptimer_delay(unsigned int timer_id, uint32_t delay);
256uint32_t get_gptimer_delay(unsigned int timer_id);
257#endif
179uint32_t get_gptimer_count(unsigned int timer_id); 258uint32_t get_gptimer_count(unsigned int timer_id);
180int get_gptimer_intr(unsigned int timer_id); 259int get_gptimer_intr(unsigned int timer_id);
181void clear_gptimer_intr(unsigned int timer_id); 260void clear_gptimer_intr(unsigned int timer_id);
@@ -217,16 +296,41 @@ struct bfin_gptimer_regs {
217 u32 counter; 296 u32 counter;
218 u32 period; 297 u32 period;
219 u32 width; 298 u32 width;
299#ifdef CONFIG_BF60x
300 u32 delay;
301#endif
220}; 302};
221 303
222/* 304/*
223 * bfin group timer registers layout 305 * bfin group timer registers layout
224 */ 306 */
307#ifndef CONFIG_BF60x
225struct bfin_gptimer_group_regs { 308struct bfin_gptimer_group_regs {
226 __BFP(enable); 309 __BFP(enable);
227 __BFP(disable); 310 __BFP(disable);
228 u32 status; 311 u32 status;
229}; 312};
313#else
314struct bfin_gptimer_group_regs {
315 __BFP(run);
316 __BFP(enable);
317 __BFP(disable);
318 __BFP(stop_cfg);
319 __BFP(stop_cfg_set);
320 __BFP(stop_cfg_clr);
321 __BFP(data_imsk);
322 __BFP(stat_imsk);
323 __BFP(tr_msk);
324 __BFP(tr_ie);
325 __BFP(data_ilat);
326 __BFP(stat_ilat);
327 __BFP(err_status);
328 __BFP(bcast_per);
329 __BFP(bcast_wid);
330 __BFP(bcast_dly);
331
332};
333#endif
230 334
231#undef __BFP 335#undef __BFP
232 336