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authorDavid Woodhouse <David.Woodhouse@intel.com>2008-07-11 09:36:25 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2008-07-11 09:36:25 -0400
commita8931ef380c92d121ae74ecfb03b2d63f72eea6f (patch)
tree980fb6b019e11e6cb1ece55b7faff184721a8053 /arch/blackfin/Kconfig
parent90574d0a4d4b73308ae54a2a57a4f3f1fa98e984 (diff)
parente5a5816f7875207cb0a0a7032e39a4686c5e10a4 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/blackfin/Kconfig')
-rw-r--r--arch/blackfin/Kconfig30
1 files changed, 12 insertions, 18 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 795d0ac67c21..b87634e75f20 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -479,16 +479,6 @@ comment "Memory Setup"
479 479
480comment "Misc" 480comment "Misc"
481 481
482config ENET_FLASH_PIN
483 int "PF port/pin used for flash and ethernet sharing"
484 depends on (BFIN533_STAMP)
485 default 0
486 help
487 PF port/pin used for flash and ethernet sharing to allow other PF
488 pins to be used on other platforms without having to touch common
489 code.
490 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
491
492choice 482choice
493 prompt "Blackfin Exception Scratch Register" 483 prompt "Blackfin Exception Scratch Register"
494 default BFIN_SCRATCH_REG_RETN 484 default BFIN_SCRATCH_REG_RETN
@@ -695,6 +685,8 @@ choice
695 prompt "Uncached SDRAM region" 685 prompt "Uncached SDRAM region"
696 default DMA_UNCACHED_1M 686 default DMA_UNCACHED_1M
697 depends on BFIN_DMA_5XX 687 depends on BFIN_DMA_5XX
688config DMA_UNCACHED_4M
689 bool "Enable 4M DMA region"
698config DMA_UNCACHED_2M 690config DMA_UNCACHED_2M
699 bool "Enable 2M DMA region" 691 bool "Enable 2M DMA region"
700config DMA_UNCACHED_1M 692config DMA_UNCACHED_1M
@@ -832,6 +824,7 @@ config BANK_0
832config BANK_1 824config BANK_1
833 hex "Bank 1" 825 hex "Bank 1"
834 default 0x7BB0 826 default 0x7BB0
827 default 0x5558 if BF54x
835 828
836config BANK_2 829config BANK_2
837 hex "Bank 2" 830 hex "Bank 2"
@@ -963,21 +956,22 @@ endchoice
963 956
964endmenu 957endmenu
965 958
966if (BF537 || BF533 || BF54x)
967
968menu "CPU Frequency scaling" 959menu "CPU Frequency scaling"
969 960
970source "drivers/cpufreq/Kconfig" 961source "drivers/cpufreq/Kconfig"
971 962
972config CPU_FREQ 963config CPU_VOLTAGE
973 bool 964 bool "CPU Voltage scaling"
965 depends on EXPERIMENTAL
966 depends on CPU_FREQ
974 default n 967 default n
975 help 968 help
976 If you want to enable this option, you should select the 969 Say Y here if you want CPU voltage scaling according to the CPU frequency.
977 DPMC driver from Character Devices. 970 This option violates the PLL BYPASS recommendation in the Blackfin Processor
978endmenu 971 manuals. There is a theoretical risk that during VDDINT transitions
972 the PLL may unlock.
979 973
980endif 974endmenu
981 975
982source "net/Kconfig" 976source "net/Kconfig"
983 977