Blackfin arch: Make L2 SRAM cacheable

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>

1 files changed, 7 insertions, 0 deletions

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 554ac5827c1d..10c97efbd91f 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -772,6 +772,13 @@ config BFIN_WT
 
 endchoice
 
+config BFIN_L2_CACHEABLE
+        bool "Cache L2 SRAM"
+        depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561)
+        default n
+        help
+          Select to make L2 SRAM cacheable in L1 data and instruction cache.
+
 config MPU
         bool "Enable the memory protection unit (EXPERIMENTAL)"
         default n