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authorMike Frysinger <vapier.adi@gmail.com>2009-01-07 10:14:38 -0500
committerBryan Wu <cooloney@kernel.org>2009-01-07 10:14:38 -0500
commit94106e0fb6b863348a566617ca6bf431c37ddc5e (patch)
tree93b1598d677c6df18fdf1e95c58847c66438b482 /arch/blackfin/Kconfig
parent1ea9925553caad6ea5068b4652596f149e0be9c3 (diff)
Blackfin arch: do not allow L2 to be cached on BF561 SMP
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/Kconfig')
-rw-r--r--arch/blackfin/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index b8bc5a402fa4..f8edfbe5faed 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -866,7 +866,7 @@ endchoice
866 866
867config BFIN_L2_CACHEABLE 867config BFIN_L2_CACHEABLE
868 bool "Cache L2 SRAM" 868 bool "Cache L2 SRAM"
869 depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561) 869 depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP))
870 default n 870 default n
871 help 871 help
872 Select to make L2 SRAM cacheable in L1 data and instruction cache. 872 Select to make L2 SRAM cacheable in L1 data and instruction cache.