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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 12:24:04 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-24 15:35:56 -0400
commit62ec05d1ea2fe95ab03b55f717c045fd24c02354 (patch)
treeb7fab48ef037ea82dc66b06495a697c6a9354982 /arch/avr32
parentdb82817bcb278186cad04e263e2d5abb26a4f6fd (diff)
avr32: Cleanup eic_set_irq_type()
No need to fiddle in irq_desc. The trigger mask can be written back into irq_data. Return IRQ_SET_MASK_OK_NOCOPY, so the generic code wont overwrite it again. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Diffstat (limited to 'arch/avr32')
-rw-r--r--arch/avr32/mach-at32ap/extint.c31
1 files changed, 11 insertions, 20 deletions
diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c
index 23126aab82ab..47ba4b9b6db1 100644
--- a/arch/avr32/mach-at32ap/extint.c
+++ b/arch/avr32/mach-at32ap/extint.c
@@ -89,18 +89,14 @@ static void eic_unmask_irq(struct irq_chip *d)
89static int eic_set_irq_type(struct irq_chip *d, unsigned int flow_type) 89static int eic_set_irq_type(struct irq_chip *d, unsigned int flow_type)
90{ 90{
91 struct eic *eic = irq_data_get_irq_chip_data(data); 91 struct eic *eic = irq_data_get_irq_chip_data(data);
92 struct irq_desc *desc;
93 unsigned int irq = d->irq; 92 unsigned int irq = d->irq;
94 unsigned int i = irq - eic->first_irq; 93 unsigned int i = irq - eic->first_irq;
95 u32 mode, edge, level; 94 u32 mode, edge, level;
96 int ret = 0;
97 95
98 flow_type &= IRQ_TYPE_SENSE_MASK; 96 flow_type &= IRQ_TYPE_SENSE_MASK;
99 if (flow_type == IRQ_TYPE_NONE) 97 if (flow_type == IRQ_TYPE_NONE)
100 flow_type = IRQ_TYPE_LEVEL_LOW; 98 flow_type = IRQ_TYPE_LEVEL_LOW;
101 99
102 desc = irq_to_desc(irq);
103
104 mode = eic_readl(eic, MODE); 100 mode = eic_readl(eic, MODE);
105 edge = eic_readl(eic, EDGE); 101 edge = eic_readl(eic, EDGE);
106 level = eic_readl(eic, LEVEL); 102 level = eic_readl(eic, LEVEL);
@@ -123,25 +119,20 @@ static int eic_set_irq_type(struct irq_chip *d, unsigned int flow_type)
123 edge &= ~(1 << i); 119 edge &= ~(1 << i);
124 break; 120 break;
125 default: 121 default:
126 ret = -EINVAL; 122 return -EINVAL;
127 break;
128 } 123 }
129 124
130 if (ret == 0) { 125 eic_writel(eic, MODE, mode);
131 eic_writel(eic, MODE, mode); 126 eic_writel(eic, EDGE, edge);
132 eic_writel(eic, EDGE, edge); 127 eic_writel(eic, LEVEL, level);
133 eic_writel(eic, LEVEL, level);
134
135 if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
136 flow_type |= IRQ_LEVEL;
137 __irq_set_handler_locked(irq, handle_level_irq);
138 } else
139 __irq_set_handler_locked(irq, handle_edge_irq);
140 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
141 desc->status |= flow_type;
142 }
143 128
144 return ret; 129 irqd_set_trigger_type(d, flow_type);
130 if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
131 __irq_set_handler_locked(irq, handle_level_irq);
132 else
133 __irq_set_handler_locked(irq, handle_edge_irq);
134
135 return IRQ_SET_MASK_OK_NOCOPY;
145} 136}
146 137
147static struct irq_chip eic_chip = { 138static struct irq_chip eic_chip = {