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authorRussell King <rmk+kernel@arm.linux.org.uk>2009-12-18 11:40:18 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-02-20 11:41:46 -0500
commit4b3073e1c53a256275f1079c0fbfbe85883d9275 (patch)
treea0fa98cb75edbbc58c43bbe38ac4c6da0913ae6d /arch/avr32
parented42acaef1a9d51631a31b55e9ed52d400430492 (diff)
MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself
On VIVT ARM, when we have multiple shared mappings of the same file in the same MM, we need to ensure that we have coherency across all copies. We do this via make_coherent() by making the pages uncacheable. This used to work fine, until we allowed highmem with highpte - we now have a page table which is mapped as required, and is not available for modification via update_mmu_cache(). Ralf Beache suggested getting rid of the PTE value passed to update_mmu_cache(): On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables to construct a pointer to the pte again. Passing a pte_t * is much more elegant. Maybe we might even replace the pte argument with the pte_t? Ben Herrenschmidt would also like the pte pointer for PowerPC: Passing the ptep in there is exactly what I want. I want that -instead- of the PTE value, because I have issue on some ppc cases, for I$/D$ coherency, where set_pte_at() may decide to mask out the _PAGE_EXEC. So, pass in the mapped page table pointer into update_mmu_cache(), and remove the PTE value, updating all implementations and call sites to suit. Includes a fix from Stephen Rothwell: sparc: fix fallout from update_mmu_cache API change Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/avr32')
-rw-r--r--arch/avr32/include/asm/pgtable.h2
-rw-r--r--arch/avr32/mm/tlb.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/avr32/include/asm/pgtable.h b/arch/avr32/include/asm/pgtable.h
index fecdda16f444..a9ae30c41e74 100644
--- a/arch/avr32/include/asm/pgtable.h
+++ b/arch/avr32/include/asm/pgtable.h
@@ -325,7 +325,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
325 325
326struct vm_area_struct; 326struct vm_area_struct;
327extern void update_mmu_cache(struct vm_area_struct * vma, 327extern void update_mmu_cache(struct vm_area_struct * vma,
328 unsigned long address, pte_t pte); 328 unsigned long address, pte_t *ptep);
329 329
330/* 330/*
331 * Encode and decode a swap entry 331 * Encode and decode a swap entry
diff --git a/arch/avr32/mm/tlb.c b/arch/avr32/mm/tlb.c
index 06677be98ffb..0da23109f817 100644
--- a/arch/avr32/mm/tlb.c
+++ b/arch/avr32/mm/tlb.c
@@ -101,7 +101,7 @@ static void update_dtlb(unsigned long address, pte_t pte)
101} 101}
102 102
103void update_mmu_cache(struct vm_area_struct *vma, 103void update_mmu_cache(struct vm_area_struct *vma,
104 unsigned long address, pte_t pte) 104 unsigned long address, pte_t *ptep)
105{ 105{
106 unsigned long flags; 106 unsigned long flags;
107 107
@@ -110,7 +110,7 @@ void update_mmu_cache(struct vm_area_struct *vma,
110 return; 110 return;
111 111
112 local_irq_save(flags); 112 local_irq_save(flags);
113 update_dtlb(address, pte); 113 update_dtlb(address, *ptep);
114 local_irq_restore(flags); 114 local_irq_restore(flags);
115} 115}
116 116