avr32: re-instate MCI WP/CD pin assignments for ATNGW100

The MRMT1 patch mistakenly reverted commit
fe272b5bd13d3522f9d1ed35425f1c7af4d8343f.

This new patch is intended to correct this, so that both daughtercards
should be able to assign GPIO PC25 and PE0 to the MCI driver.

Signed-off-by: Peter Ma <pma@mediamatech.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

1 files changed, 0 insertions, 5 deletions

diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index bc299fbbeb4e..5b022aad4bd9 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -56,13 +56,8 @@ static struct spi_board_info spi0_board_info[] __initdata = {
 static struct mci_platform_data __initdata mci0_data = {
         .slot[0] = {
                 .bus_width      = 4,
-#if defined(CONFIG_BOARD_ATNGW100_EVKLCD10X) || defined(CONFIG_BOARD_ATNGW100_MRMT1)
-                .detect_pin     = GPIO_PIN_NONE,
-                .wp_pin         = GPIO_PIN_NONE,
-#else
                 .detect_pin     = GPIO_PIN_PC(25),
                 .wp_pin         = GPIO_PIN_PE(0),
-#endif
         },
 };