Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (66 commits)
  avr32: at32ap700x: fix typo in DMA master configuration
  dmaengine/dmatest: Pass timeout via module params
  dma: let IMX_DMA depend on IMX_HAVE_DMA_V1 instead of an explicit list of SoCs
  fsldma: make halt behave nicely on all supported controllers
  fsldma: reduce locking during descriptor cleanup
  fsldma: support async_tx dependencies and automatic unmapping
  fsldma: fix controller lockups
  fsldma: minor codingstyle and consistency fixes
  fsldma: improve link descriptor debugging
  fsldma: use channel name in printk output
  fsldma: move related helper functions near each other
  dmatest: fix automatic buffer unmap type
  drivers, pch_dma: Fix warning when CONFIG_PM=n.
  dmaengine/dw_dmac fix: use readl & writel instead of __raw_readl & __raw_writel
  avr32: at32ap700x: Specify DMA Flow Controller, Src and Dst msize
  dw_dmac: Setting Default Burst length for transfers as 16.
  dw_dmac: Allow src/dst msize & flow controller to be configured at runtime
  dw_dmac: Changing type of src_master and dest_master to u8.
  dw_dmac: Pass Channel Priority from platform_data
  dw_dmac: Pass Channel Allocation Order from platform_data
  ...

1 files changed, 15 insertions, 0 deletions

diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index e67c99945428..bfc9d071db9b 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -2048,6 +2048,11 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
                 rx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
                 rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3);
                 rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
+                rx_dws->src_master = 0;
+                rx_dws->dst_master = 1;
+                rx_dws->src_msize = DW_DMA_MSIZE_1;
+                rx_dws->dst_msize = DW_DMA_MSIZE_1;
+                rx_dws->fc = DW_DMA_FC_D_P2M;
         }
 
         /* Check if DMA slave interface for playback should be configured. */
@@ -2056,6 +2061,11 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
                 tx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
                 tx_dws->cfg_hi = DWC_CFGH_DST_PER(4);
                 tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
+                tx_dws->src_master = 0;
+                tx_dws->dst_master = 1;
+                tx_dws->src_msize = DW_DMA_MSIZE_1;
+                tx_dws->dst_msize = DW_DMA_MSIZE_1;
+                tx_dws->fc = DW_DMA_FC_D_M2P;
         }
 
         if (platform_device_add_data(pdev, data,
@@ -2128,6 +2138,11 @@ at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data)
         dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT;
         dws->cfg_hi = DWC_CFGH_DST_PER(2);
         dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
+        dws->src_master = 0;
+        dws->dst_master = 1;
+        dws->src_msize = DW_DMA_MSIZE_1;
+        dws->dst_msize = DW_DMA_MSIZE_1;
+        dws->fc = DW_DMA_FC_D_M2P;
 
         if (platform_device_add_data(pdev, data,
                                 sizeof(struct atmel_abdac_pdata)))