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authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-07-31 09:56:36 -0400
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-08-08 06:44:01 -0400
commitb47eb4092f81ae9fe406fa2c6719eaa9cd7a593c (patch)
tree3df392bb0440f3b04b169f8650464b6052076499 /arch/avr32
parenta8d902db221e1e2dcbbd32efbf89055ed69f8e56 (diff)
avr32: Clean up HMATRIX code
Introduce a few helper functions for HMATRIX configuration and clean up the register definitions. Also add definitions for the HMATRIX master and slave IDs on the AT32AP700x chips. Also make the definitions in hmatrix.h available to board code by moving it to <mach/hmatrix.h> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32')
-rw-r--r--arch/avr32/mach-at32ap/Makefile1
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c26
-rw-r--r--arch/avr32/mach-at32ap/hmatrix.c88
-rw-r--r--arch/avr32/mach-at32ap/hmatrix.h182
-rw-r--r--arch/avr32/mach-at32ap/include/mach/at32ap700x.h29
-rw-r--r--arch/avr32/mach-at32ap/include/mach/hmatrix.h55
6 files changed, 180 insertions, 201 deletions
diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
index d5018e2eed25..514c9a9b009a 100644
--- a/arch/avr32/mach-at32ap/Makefile
+++ b/arch/avr32/mach-at32ap/Makefile
@@ -1,4 +1,5 @@
1obj-y += pdc.o clock.o intc.o extint.o pio.o hsmc.o 1obj-y += pdc.o clock.o intc.o extint.o pio.o hsmc.o
2obj-y += hmatrix.o
2obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o pm-at32ap700x.o 3obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o pm-at32ap700x.o
3obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o 4obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o
4obj-$(CONFIG_PM) += pm.o 5obj-$(CONFIG_PM) += pm.o
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 92bfb4d8ae45..e01dbe4ebb40 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -22,13 +22,13 @@
22 22
23#include <mach/at32ap700x.h> 23#include <mach/at32ap700x.h>
24#include <mach/board.h> 24#include <mach/board.h>
25#include <mach/hmatrix.h>
25#include <mach/portmux.h> 26#include <mach/portmux.h>
26#include <mach/sram.h> 27#include <mach/sram.h>
27 28
28#include <video/atmel_lcdc.h> 29#include <video/atmel_lcdc.h>
29 30
30#include "clock.h" 31#include "clock.h"
31#include "hmatrix.h"
32#include "pio.h" 32#include "pio.h"
33#include "pm.h" 33#include "pm.h"
34 34
@@ -725,7 +725,7 @@ static struct clk pico_clk = {
725 * HMATRIX 725 * HMATRIX
726 * -------------------------------------------------------------------- */ 726 * -------------------------------------------------------------------- */
727 727
728static struct clk hmatrix_clk = { 728struct clk at32_hmatrix_clk = {
729 .name = "hmatrix_clk", 729 .name = "hmatrix_clk",
730 .parent = &pbb_clk, 730 .parent = &pbb_clk,
731 .mode = pbb_clk_mode, 731 .mode = pbb_clk_mode,
@@ -733,12 +733,6 @@ static struct clk hmatrix_clk = {
733 .index = 2, 733 .index = 2,
734 .users = 1, 734 .users = 1,
735}; 735};
736#define HMATRIX_BASE ((void __iomem *)0xfff00800)
737
738#define hmatrix_readl(reg) \
739 __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
740#define hmatrix_writel(reg,value) \
741 __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
742 736
743/* 737/*
744 * Set bits in the HMATRIX Special Function Register (SFR) used by the 738 * Set bits in the HMATRIX Special Function Register (SFR) used by the
@@ -748,13 +742,7 @@ static struct clk hmatrix_clk = {
748 */ 742 */
749static inline void set_ebi_sfr_bits(u32 mask) 743static inline void set_ebi_sfr_bits(u32 mask)
750{ 744{
751 u32 sfr; 745 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, mask);
752
753 clk_enable(&hmatrix_clk);
754 sfr = hmatrix_readl(SFR4);
755 sfr |= mask;
756 hmatrix_writel(SFR4, sfr);
757 clk_disable(&hmatrix_clk);
758} 746}
759 747
760/* -------------------------------------------------------------------- 748/* --------------------------------------------------------------------
@@ -1779,7 +1767,7 @@ static int __init at32_init_ide_or_cf(struct platform_device *pdev,
1779 return ret; 1767 return ret;
1780 1768
1781 select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ 1769 select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */
1782 set_ebi_sfr_bits(HMATRIX_BIT(CS4A)); 1770 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF0_ENABLE);
1783 break; 1771 break;
1784 case 5: 1772 case 5:
1785 ret = platform_device_add_resources(pdev, 1773 ret = platform_device_add_resources(pdev,
@@ -1789,7 +1777,7 @@ static int __init at32_init_ide_or_cf(struct platform_device *pdev,
1789 return ret; 1777 return ret;
1790 1778
1791 select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ 1779 select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */
1792 set_ebi_sfr_bits(HMATRIX_BIT(CS5A)); 1780 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF1_ENABLE);
1793 break; 1781 break;
1794 default: 1782 default:
1795 return -EINVAL; 1783 return -EINVAL;
@@ -1905,7 +1893,7 @@ at32_add_device_nand(unsigned int id, struct atmel_nand_data *data)
1905 sizeof(struct atmel_nand_data))) 1893 sizeof(struct atmel_nand_data)))
1906 goto fail; 1894 goto fail;
1907 1895
1908 set_ebi_sfr_bits(HMATRIX_BIT(CS3A)); 1896 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_NAND_ENABLE);
1909 if (data->enable_pin) 1897 if (data->enable_pin)
1910 at32_select_gpio(data->enable_pin, 1898 at32_select_gpio(data->enable_pin,
1911 AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); 1899 AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
@@ -2097,7 +2085,7 @@ struct clk *at32_clock_list[] = {
2097 &pbb_clk, 2085 &pbb_clk,
2098 &at32_pm_pclk, 2086 &at32_pm_pclk,
2099 &at32_intc0_pclk, 2087 &at32_intc0_pclk,
2100 &hmatrix_clk, 2088 &at32_hmatrix_clk,
2101 &ebi_clk, 2089 &ebi_clk,
2102 &hramc_clk, 2090 &hramc_clk,
2103 &sdramc_clk, 2091 &sdramc_clk,
diff --git a/arch/avr32/mach-at32ap/hmatrix.c b/arch/avr32/mach-at32ap/hmatrix.c
new file mode 100644
index 000000000000..48f5ede77468
--- /dev/null
+++ b/arch/avr32/mach-at32ap/hmatrix.c
@@ -0,0 +1,88 @@
1/*
2 * High-Speed Bus Matrix helper functions
3 *
4 * Copyright (C) 2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/clk.h>
11#include <linux/io.h>
12
13#include <mach/chip.h>
14#include <mach/hmatrix.h>
15
16static inline void __hmatrix_write_reg(unsigned long offset, u32 value)
17{
18 __raw_writel(value, (void __iomem __force *)(HMATRIX_BASE + offset));
19}
20
21static inline u32 __hmatrix_read_reg(unsigned long offset)
22{
23 return __raw_readl((void __iomem __force *)(HMATRIX_BASE + offset));
24}
25
26/**
27 * hmatrix_write_reg - write HMATRIX configuration register
28 * @offset: register offset
29 * @value: value to be written to the register at @offset
30 */
31void hmatrix_write_reg(unsigned long offset, u32 value)
32{
33 clk_enable(&at32_hmatrix_clk);
34 __hmatrix_write_reg(offset, value);
35 __hmatrix_read_reg(offset);
36 clk_disable(&at32_hmatrix_clk);
37}
38
39/**
40 * hmatrix_read_reg - read HMATRIX configuration register
41 * @offset: register offset
42 *
43 * Returns the value of the register at @offset.
44 */
45u32 hmatrix_read_reg(unsigned long offset)
46{
47 u32 value;
48
49 clk_enable(&at32_hmatrix_clk);
50 value = __hmatrix_read_reg(offset);
51 clk_disable(&at32_hmatrix_clk);
52
53 return value;
54}
55
56/**
57 * hmatrix_sfr_set_bits - set bits in a slave's Special Function Register
58 * @slave_id: operate on the SFR belonging to this slave
59 * @mask: mask of bits to be set in the SFR
60 */
61void hmatrix_sfr_set_bits(unsigned int slave_id, u32 mask)
62{
63 u32 value;
64
65 clk_enable(&at32_hmatrix_clk);
66 value = __hmatrix_read_reg(HMATRIX_SFR(slave_id));
67 value |= mask;
68 __hmatrix_write_reg(HMATRIX_SFR(slave_id), value);
69 __hmatrix_read_reg(HMATRIX_SFR(slave_id));
70 clk_disable(&at32_hmatrix_clk);
71}
72
73/**
74 * hmatrix_sfr_set_bits - clear bits in a slave's Special Function Register
75 * @slave_id: operate on the SFR belonging to this slave
76 * @mask: mask of bits to be cleared in the SFR
77 */
78void hmatrix_sfr_clear_bits(unsigned int slave_id, u32 mask)
79{
80 u32 value;
81
82 clk_enable(&at32_hmatrix_clk);
83 value = __hmatrix_read_reg(HMATRIX_SFR(slave_id));
84 value &= ~mask;
85 __hmatrix_write_reg(HMATRIX_SFR(slave_id), value);
86 __hmatrix_read_reg(HMATRIX_SFR(slave_id));
87 clk_disable(&at32_hmatrix_clk);
88}
diff --git a/arch/avr32/mach-at32ap/hmatrix.h b/arch/avr32/mach-at32ap/hmatrix.h
deleted file mode 100644
index d10bfb60d68d..000000000000
--- a/arch/avr32/mach-at32ap/hmatrix.h
+++ /dev/null
@@ -1,182 +0,0 @@
1/*
2 * Register definitions for High-Speed Bus Matrix
3 */
4#ifndef __HMATRIX_H
5#define __HMATRIX_H
6
7/* HMATRIX register offsets */
8#define HMATRIX_MCFG0 0x0000
9#define HMATRIX_MCFG1 0x0004
10#define HMATRIX_MCFG2 0x0008
11#define HMATRIX_MCFG3 0x000c
12#define HMATRIX_MCFG4 0x0010
13#define HMATRIX_MCFG5 0x0014
14#define HMATRIX_MCFG6 0x0018
15#define HMATRIX_MCFG7 0x001c
16#define HMATRIX_MCFG8 0x0020
17#define HMATRIX_MCFG9 0x0024
18#define HMATRIX_MCFG10 0x0028
19#define HMATRIX_MCFG11 0x002c
20#define HMATRIX_MCFG12 0x0030
21#define HMATRIX_MCFG13 0x0034
22#define HMATRIX_MCFG14 0x0038
23#define HMATRIX_MCFG15 0x003c
24#define HMATRIX_SCFG0 0x0040
25#define HMATRIX_SCFG1 0x0044
26#define HMATRIX_SCFG2 0x0048
27#define HMATRIX_SCFG3 0x004c
28#define HMATRIX_SCFG4 0x0050
29#define HMATRIX_SCFG5 0x0054
30#define HMATRIX_SCFG6 0x0058
31#define HMATRIX_SCFG7 0x005c
32#define HMATRIX_SCFG8 0x0060
33#define HMATRIX_SCFG9 0x0064
34#define HMATRIX_SCFG10 0x0068
35#define HMATRIX_SCFG11 0x006c
36#define HMATRIX_SCFG12 0x0070
37#define HMATRIX_SCFG13 0x0074
38#define HMATRIX_SCFG14 0x0078
39#define HMATRIX_SCFG15 0x007c
40#define HMATRIX_PRAS0 0x0080
41#define HMATRIX_PRBS0 0x0084
42#define HMATRIX_PRAS1 0x0088
43#define HMATRIX_PRBS1 0x008c
44#define HMATRIX_PRAS2 0x0090
45#define HMATRIX_PRBS2 0x0094
46#define HMATRIX_PRAS3 0x0098
47#define HMATRIX_PRBS3 0x009c
48#define HMATRIX_PRAS4 0x00a0
49#define HMATRIX_PRBS4 0x00a4
50#define HMATRIX_PRAS5 0x00a8
51#define HMATRIX_PRBS5 0x00ac
52#define HMATRIX_PRAS6 0x00b0
53#define HMATRIX_PRBS6 0x00b4
54#define HMATRIX_PRAS7 0x00b8
55#define HMATRIX_PRBS7 0x00bc
56#define HMATRIX_PRAS8 0x00c0
57#define HMATRIX_PRBS8 0x00c4
58#define HMATRIX_PRAS9 0x00c8
59#define HMATRIX_PRBS9 0x00cc
60#define HMATRIX_PRAS10 0x00d0
61#define HMATRIX_PRBS10 0x00d4
62#define HMATRIX_PRAS11 0x00d8
63#define HMATRIX_PRBS11 0x00dc
64#define HMATRIX_PRAS12 0x00e0
65#define HMATRIX_PRBS12 0x00e4
66#define HMATRIX_PRAS13 0x00e8
67#define HMATRIX_PRBS13 0x00ec
68#define HMATRIX_PRAS14 0x00f0
69#define HMATRIX_PRBS14 0x00f4
70#define HMATRIX_PRAS15 0x00f8
71#define HMATRIX_PRBS15 0x00fc
72#define HMATRIX_MRCR 0x0100
73#define HMATRIX_SFR0 0x0110
74#define HMATRIX_SFR1 0x0114
75#define HMATRIX_SFR2 0x0118
76#define HMATRIX_SFR3 0x011c
77#define HMATRIX_SFR4 0x0120
78#define HMATRIX_SFR5 0x0124
79#define HMATRIX_SFR6 0x0128
80#define HMATRIX_SFR7 0x012c
81#define HMATRIX_SFR8 0x0130
82#define HMATRIX_SFR9 0x0134
83#define HMATRIX_SFR10 0x0138
84#define HMATRIX_SFR11 0x013c
85#define HMATRIX_SFR12 0x0140
86#define HMATRIX_SFR13 0x0144
87#define HMATRIX_SFR14 0x0148
88#define HMATRIX_SFR15 0x014c
89
90/* Bitfields in MCFGx */
91#define HMATRIX_ULBT_OFFSET 0
92#define HMATRIX_ULBT_SIZE 3
93
94/* Bitfields in SCFGx */
95#define HMATRIX_SLOT_CYCLE_OFFSET 0
96#define HMATRIX_SLOT_CYCLE_SIZE 8
97#define HMATRIX_DEFMSTR_TYPE_OFFSET 16
98#define HMATRIX_DEFMSTR_TYPE_SIZE 2
99#define HMATRIX_FIXED_DEFMSTR_OFFSET 18
100#define HMATRIX_FIXED_DEFMSTR_SIZE 4
101#define HMATRIX_ARBT_OFFSET 24
102#define HMATRIX_ARBT_SIZE 2
103
104/* Bitfields in PRASx */
105#define HMATRIX_M0PR_OFFSET 0
106#define HMATRIX_M0PR_SIZE 4
107#define HMATRIX_M1PR_OFFSET 4
108#define HMATRIX_M1PR_SIZE 4
109#define HMATRIX_M2PR_OFFSET 8
110#define HMATRIX_M2PR_SIZE 4
111#define HMATRIX_M3PR_OFFSET 12
112#define HMATRIX_M3PR_SIZE 4
113#define HMATRIX_M4PR_OFFSET 16
114#define HMATRIX_M4PR_SIZE 4
115#define HMATRIX_M5PR_OFFSET 20
116#define HMATRIX_M5PR_SIZE 4
117#define HMATRIX_M6PR_OFFSET 24
118#define HMATRIX_M6PR_SIZE 4
119#define HMATRIX_M7PR_OFFSET 28
120#define HMATRIX_M7PR_SIZE 4
121
122/* Bitfields in PRBSx */
123#define HMATRIX_M8PR_OFFSET 0
124#define HMATRIX_M8PR_SIZE 4
125#define HMATRIX_M9PR_OFFSET 4
126#define HMATRIX_M9PR_SIZE 4
127#define HMATRIX_M10PR_OFFSET 8
128#define HMATRIX_M10PR_SIZE 4
129#define HMATRIX_M11PR_OFFSET 12
130#define HMATRIX_M11PR_SIZE 4
131#define HMATRIX_M12PR_OFFSET 16
132#define HMATRIX_M12PR_SIZE 4
133#define HMATRIX_M13PR_OFFSET 20
134#define HMATRIX_M13PR_SIZE 4
135#define HMATRIX_M14PR_OFFSET 24
136#define HMATRIX_M14PR_SIZE 4
137#define HMATRIX_M15PR_OFFSET 28
138#define HMATRIX_M15PR_SIZE 4
139
140/* Bitfields in SFR4 */
141#define HMATRIX_CS1A_OFFSET 1
142#define HMATRIX_CS1A_SIZE 1
143#define HMATRIX_CS3A_OFFSET 3
144#define HMATRIX_CS3A_SIZE 1
145#define HMATRIX_CS4A_OFFSET 4
146#define HMATRIX_CS4A_SIZE 1
147#define HMATRIX_CS5A_OFFSET 5
148#define HMATRIX_CS5A_SIZE 1
149#define HMATRIX_DBPUC_OFFSET 8
150#define HMATRIX_DBPUC_SIZE 1
151
152/* Constants for ULBT */
153#define HMATRIX_ULBT_INFINITE 0
154#define HMATRIX_ULBT_SINGLE 1
155#define HMATRIX_ULBT_FOUR_BEAT 2
156#define HMATRIX_ULBT_EIGHT_BEAT 3
157#define HMATRIX_ULBT_SIXTEEN_BEAT 4
158
159/* Constants for DEFMSTR_TYPE */
160#define HMATRIX_DEFMSTR_TYPE_NO_DEFAULT 0
161#define HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT 1
162#define HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT 2
163
164/* Constants for ARBT */
165#define HMATRIX_ARBT_ROUND_ROBIN 0
166#define HMATRIX_ARBT_FIXED_PRIORITY 1
167
168/* Bit manipulation macros */
169#define HMATRIX_BIT(name) \
170 (1 << HMATRIX_##name##_OFFSET)
171#define HMATRIX_BF(name,value) \
172 (((value) & ((1 << HMATRIX_##name##_SIZE) - 1)) \
173 << HMATRIX_##name##_OFFSET)
174#define HMATRIX_BFEXT(name,value) \
175 (((value) >> HMATRIX_##name##_OFFSET) \
176 & ((1 << HMATRIX_##name##_SIZE) - 1))
177#define HMATRIX_BFINS(name,value,old) \
178 (((old) & ~(((1 << HMATRIX_##name##_SIZE) - 1) \
179 << HMATRIX_##name##_OFFSET)) \
180 | HMATRIX_BF(name,value))
181
182#endif /* __HMATRIX_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
index 31b44e13ec32..1e9852d65cca 100644
--- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
+++ b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
@@ -46,6 +46,35 @@
46#define DMAC_DMAREQ_2 9 46#define DMAC_DMAREQ_2 9
47#define DMAC_DMAREQ_3 10 47#define DMAC_DMAREQ_3 10
48 48
49/* HSB master IDs */
50#define HMATRIX_MASTER_CPU_DCACHE 0
51#define HMATRIX_MASTER_CPU_ICACHE 1
52#define HMATRIX_MASTER_PDC 2
53#define HMATRIX_MASTER_ISI 3
54#define HMATRIX_MASTER_USBA 4
55#define HMATRIX_MASTER_LCDC 5
56#define HMATRIX_MASTER_MACB0 6
57#define HMATRIX_MASTER_MACB1 7
58#define HMATRIX_MASTER_DMACA_M0 8
59#define HMATRIX_MASTER_DMACA_M1 9
60
61/* HSB slave IDs */
62#define HMATRIX_SLAVE_SRAM0 0
63#define HMATRIX_SLAVE_SRAM1 1
64#define HMATRIX_SLAVE_PBA 2
65#define HMATRIX_SLAVE_PBB 3
66#define HMATRIX_SLAVE_EBI 4
67#define HMATRIX_SLAVE_USBA 5
68#define HMATRIX_SLAVE_LCDC 6
69#define HMATRIX_SLAVE_DMACA 7
70
71/* Bits in HMATRIX SFR4 (EBI) */
72#define HMATRIX_EBI_SDRAM_ENABLE (1 << 1)
73#define HMATRIX_EBI_NAND_ENABLE (1 << 3)
74#define HMATRIX_EBI_CF0_ENABLE (1 << 4)
75#define HMATRIX_EBI_CF1_ENABLE (1 << 5)
76#define HMATRIX_EBI_PULLUP_DISABLE (1 << 8)
77
49/* 78/*
50 * Base addresses of controllers that may be accessed early by 79 * Base addresses of controllers that may be accessed early by
51 * platform code. 80 * platform code.
diff --git a/arch/avr32/mach-at32ap/include/mach/hmatrix.h b/arch/avr32/mach-at32ap/include/mach/hmatrix.h
new file mode 100644
index 000000000000..7a368f227ebc
--- /dev/null
+++ b/arch/avr32/mach-at32ap/include/mach/hmatrix.h
@@ -0,0 +1,55 @@
1/*
2 * High-Speed Bus Matrix configuration registers
3 *
4 * Copyright (C) 2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __HMATRIX_H
11#define __HMATRIX_H
12
13extern struct clk at32_hmatrix_clk;
14
15void hmatrix_write_reg(unsigned long offset, u32 value);
16u32 hmatrix_read_reg(unsigned long offset);
17
18void hmatrix_sfr_set_bits(unsigned int slave_id, u32 mask);
19void hmatrix_sfr_clear_bits(unsigned int slave_id, u32 mask);
20
21/* Master Configuration register */
22#define HMATRIX_MCFG(m) (0x0000 + 4 * (m))
23/* Undefined length burst limit */
24# define HMATRIX_MCFG_ULBT_INFINITE 0 /* Infinite length */
25# define HMATRIX_MCFG_ULBT_SINGLE 1 /* Single Access */
26# define HMATRIX_MCFG_ULBT_FOUR_BEAT 2 /* Four beat */
27# define HMATRIX_MCFG_ULBT_EIGHT_BEAT 3 /* Eight beat */
28# define HMATRIX_MCFG_ULBT_SIXTEEN_BEAT 4 /* Sixteen beat */
29
30/* Slave Configuration register */
31#define HMATRIX_SCFG(s) (0x0040 + 4 * (s))
32# define HMATRIX_SCFG_SLOT_CYCLE(x) ((x) << 0) /* Max burst cycles */
33# define HMATRIX_SCFG_DEFMSTR_NONE ( 0 << 16) /* No default master */
34# define HMATRIX_SCFG_DEFMSTR_LAST ( 1 << 16) /* Last def master */
35# define HMATRIX_SCFG_DEFMSTR_FIXED ( 2 << 16) /* Fixed def master */
36# define HMATRIX_SCFG_FIXED_DEFMSTR(m) ((m) << 18) /* Fixed master ID */
37# define HMATRIX_SCFG_ARBT_ROUND_ROBIN ( 0 << 24) /* RR arbitration */
38# define HMATRIX_SCFG_ARBT_FIXED_PRIO ( 1 << 24) /* Fixed priority */
39
40/* Slave Priority register A (master 0..7) */
41#define HMATRIX_PRAS(s) (0x0080 + 8 * (s))
42# define HMATRIX_PRAS_PRIO(m, p) ((p) << ((m) * 4))
43
44/* Slave Priority register A (master 8..15) */
45#define HMATRIX_PRBS(s) (0x0084 + 8 * (s))
46# define HMATRIX_PRBS_PRIO(m, p) ((p) << (((m) - 8) * 4))
47
48/* Master Remap Control Register */
49#define HMATRIX_MRCR 0x0100
50# define HMATRIX_MRCR_REMAP(m) ( 1 << (m)) /* Remap master m */
51
52/* Special Function Register. Bit definitions are chip-specific */
53#define HMATRIX_SFR(s) (0x0110 + 4 * (s))
54
55#endif /* __HMATRIX_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-21 19:00:00 -0400