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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 11:39:32 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-24 15:35:55 -0400
commitd75f1bfdbccb38310088b98e9866273f5d7bda14 (patch)
treebd265c2159b319fe41d3d9cce586bd087281c396 /arch/avr32
parent250153361fa804985392866fa0622a787dd60109 (diff)
avr: Cleanup genirq namespace
Scripted conversion to new function names with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Diffstat (limited to 'arch/avr32')
-rw-r--r--arch/avr32/boards/atngw100/mrmt.c2
-rw-r--r--arch/avr32/boards/atngw100/setup.c2
-rw-r--r--arch/avr32/mach-at32ap/extint.c14
-rw-r--r--arch/avr32/mach-at32ap/intc.c2
-rw-r--r--arch/avr32/mach-at32ap/pio.c14
5 files changed, 17 insertions, 17 deletions
diff --git a/arch/avr32/boards/atngw100/mrmt.c b/arch/avr32/boards/atngw100/mrmt.c
index 7919be311f4a..f91431963452 100644
--- a/arch/avr32/boards/atngw100/mrmt.c
+++ b/arch/avr32/boards/atngw100/mrmt.c
@@ -301,7 +301,7 @@ static int __init mrmt1_init(void)
301 /* Select the Touchscreen interrupt pin mode */ 301 /* Select the Touchscreen interrupt pin mode */
302 at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ), 302 at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ),
303 GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); 303 GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
304 set_irq_type( AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING ); 304 irq_set_irq_type(AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING);
305 at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info)); 305 at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info));
306 spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info)); 306 spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info));
307#endif 307#endif
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index 659d119ce712..fafed4c38fd2 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -322,6 +322,6 @@ static int __init atngw100_arch_init(void)
322 /* set_irq_type() after the arch_initcall for EIC has run, and 322 /* set_irq_type() after the arch_initcall for EIC has run, and
323 * before the I2C subsystem could try using this IRQ. 323 * before the I2C subsystem could try using this IRQ.
324 */ 324 */
325 return set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING); 325 return irq_set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING);
326} 326}
327arch_initcall(atngw100_arch_init); 327arch_initcall(atngw100_arch_init);
diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c
index bf3b2c59c8e1..23126aab82ab 100644
--- a/arch/avr32/mach-at32ap/extint.c
+++ b/arch/avr32/mach-at32ap/extint.c
@@ -134,9 +134,9 @@ static int eic_set_irq_type(struct irq_chip *d, unsigned int flow_type)
134 134
135 if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) { 135 if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
136 flow_type |= IRQ_LEVEL; 136 flow_type |= IRQ_LEVEL;
137 __set_irq_handler_unlocked(irq, handle_level_irq); 137 __irq_set_handler_locked(irq, handle_level_irq);
138 } else 138 } else
139 __set_irq_handler_unlocked(irq, handle_edge_irq); 139 __irq_set_handler_locked(irq, handle_edge_irq);
140 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); 140 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
141 desc->status |= flow_type; 141 desc->status |= flow_type;
142 } 142 }
@@ -155,7 +155,7 @@ static struct irq_chip eic_chip = {
155 155
156static void demux_eic_irq(unsigned int irq, struct irq_desc *desc) 156static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
157{ 157{
158 struct eic *eic = get_irq_desc_data(desc); 158 struct eic *eic = irq_desc_get_handler_data(desc);
159 unsigned long status, pending; 159 unsigned long status, pending;
160 unsigned int i; 160 unsigned int i;
161 161
@@ -235,13 +235,13 @@ static int __init eic_probe(struct platform_device *pdev)
235 eic->chip = &eic_chip; 235 eic->chip = &eic_chip;
236 236
237 for (i = 0; i < nr_of_irqs; i++) { 237 for (i = 0; i < nr_of_irqs; i++) {
238 set_irq_chip_and_handler(eic->first_irq + i, &eic_chip, 238 irq_set_chip_and_handler(eic->first_irq + i, &eic_chip,
239 handle_level_irq); 239 handle_level_irq);
240 set_irq_chip_data(eic->first_irq + i, eic); 240 irq_set_chip_data(eic->first_irq + i, eic);
241 } 241 }
242 242
243 set_irq_chained_handler(int_irq, demux_eic_irq); 243 irq_set_chained_handler(int_irq, demux_eic_irq);
244 set_irq_data(int_irq, eic); 244 irq_set_handler_data(int_irq, eic);
245 245
246 if (pdev->id == 0) { 246 if (pdev->id == 0) {
247 nmi_eic = eic; 247 nmi_eic = eic;
diff --git a/arch/avr32/mach-at32ap/intc.c b/arch/avr32/mach-at32ap/intc.c
index d9270d64b4c9..21ce35f33aa5 100644
--- a/arch/avr32/mach-at32ap/intc.c
+++ b/arch/avr32/mach-at32ap/intc.c
@@ -126,7 +126,7 @@ void __init init_IRQ(void)
126 intc_writel(&intc0, INTPR0 + 4 * i, offset); 126 intc_writel(&intc0, INTPR0 + 4 * i, offset);
127 readback = intc_readl(&intc0, INTPR0 + 4 * i); 127 readback = intc_readl(&intc0, INTPR0 + 4 * i);
128 if (readback == offset) 128 if (readback == offset)
129 set_irq_chip_and_handler(i, &intc0.chip, 129 irq_set_chip_and_handler(i, &intc0.chip,
130 handle_simple_irq); 130 handle_simple_irq);
131 } 131 }
132 132
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index 9b121d6b0997..37534103574e 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -285,7 +285,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
285 struct pio_device *pio = get_irq_desc_chip_data(desc); 285 struct pio_device *pio = get_irq_desc_chip_data(desc);
286 unsigned gpio_irq; 286 unsigned gpio_irq;
287 287
288 gpio_irq = (unsigned) get_irq_data(irq); 288 gpio_irq = (unsigned) irq_get_handler_data(irq);
289 for (;;) { 289 for (;;) {
290 u32 isr; 290 u32 isr;
291 291
@@ -310,16 +310,16 @@ gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
310{ 310{
311 unsigned i; 311 unsigned i;
312 312
313 set_irq_chip_data(irq, pio); 313 irq_set_chip_data(irq, pio);
314 set_irq_data(irq, (void *) gpio_irq); 314 irq_set_handler_data(irq, (void *)gpio_irq);
315 315
316 for (i = 0; i < 32; i++, gpio_irq++) { 316 for (i = 0; i < 32; i++, gpio_irq++) {
317 set_irq_chip_data(gpio_irq, pio); 317 irq_set_chip_data(gpio_irq, pio);
318 set_irq_chip_and_handler(gpio_irq, &gpio_irqchip, 318 irq_set_chip_and_handler(gpio_irq, &gpio_irqchip,
319 handle_simple_irq); 319 handle_simple_irq);
320 } 320 }
321 321
322 set_irq_chained_handler(irq, gpio_irq_handler); 322 irq_set_chained_handler(irq, gpio_irq_handler);
323} 323}
324 324
325/*--------------------------------------------------------------------------*/ 325/*--------------------------------------------------------------------------*/