diff options
author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2006-09-26 02:32:13 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-26 11:48:54 -0400 |
commit | 5f97f7f9400de47ae837170bb274e90ad3934386 (patch) | |
tree | 514451e6dc6b46253293a00035d375e77b1c65ed /arch/avr32/mm/cache.c | |
parent | 53e62d3aaa60590d4a69b4e07c29f448b5151047 (diff) |
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/avr32/mm/cache.c')
-rw-r--r-- | arch/avr32/mm/cache.c | 150 |
1 files changed, 150 insertions, 0 deletions
diff --git a/arch/avr32/mm/cache.c b/arch/avr32/mm/cache.c new file mode 100644 index 000000000000..450515b245a0 --- /dev/null +++ b/arch/avr32/mm/cache.c | |||
@@ -0,0 +1,150 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/highmem.h> | ||
10 | #include <linux/unistd.h> | ||
11 | |||
12 | #include <asm/cacheflush.h> | ||
13 | #include <asm/cachectl.h> | ||
14 | #include <asm/processor.h> | ||
15 | #include <asm/uaccess.h> | ||
16 | |||
17 | /* | ||
18 | * If you attempt to flush anything more than this, you need superuser | ||
19 | * privileges. The value is completely arbitrary. | ||
20 | */ | ||
21 | #define CACHEFLUSH_MAX_LEN 1024 | ||
22 | |||
23 | void invalidate_dcache_region(void *start, size_t size) | ||
24 | { | ||
25 | unsigned long v, begin, end, linesz; | ||
26 | |||
27 | linesz = boot_cpu_data.dcache.linesz; | ||
28 | |||
29 | //printk("invalidate dcache: %p + %u\n", start, size); | ||
30 | |||
31 | /* You asked for it, you got it */ | ||
32 | begin = (unsigned long)start & ~(linesz - 1); | ||
33 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
34 | |||
35 | for (v = begin; v < end; v += linesz) | ||
36 | invalidate_dcache_line((void *)v); | ||
37 | } | ||
38 | |||
39 | void clean_dcache_region(void *start, size_t size) | ||
40 | { | ||
41 | unsigned long v, begin, end, linesz; | ||
42 | |||
43 | linesz = boot_cpu_data.dcache.linesz; | ||
44 | begin = (unsigned long)start & ~(linesz - 1); | ||
45 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
46 | |||
47 | for (v = begin; v < end; v += linesz) | ||
48 | clean_dcache_line((void *)v); | ||
49 | flush_write_buffer(); | ||
50 | } | ||
51 | |||
52 | void flush_dcache_region(void *start, size_t size) | ||
53 | { | ||
54 | unsigned long v, begin, end, linesz; | ||
55 | |||
56 | linesz = boot_cpu_data.dcache.linesz; | ||
57 | begin = (unsigned long)start & ~(linesz - 1); | ||
58 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
59 | |||
60 | for (v = begin; v < end; v += linesz) | ||
61 | flush_dcache_line((void *)v); | ||
62 | flush_write_buffer(); | ||
63 | } | ||
64 | |||
65 | void invalidate_icache_region(void *start, size_t size) | ||
66 | { | ||
67 | unsigned long v, begin, end, linesz; | ||
68 | |||
69 | linesz = boot_cpu_data.icache.linesz; | ||
70 | begin = (unsigned long)start & ~(linesz - 1); | ||
71 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
72 | |||
73 | for (v = begin; v < end; v += linesz) | ||
74 | invalidate_icache_line((void *)v); | ||
75 | } | ||
76 | |||
77 | static inline void __flush_icache_range(unsigned long start, unsigned long end) | ||
78 | { | ||
79 | unsigned long v, linesz; | ||
80 | |||
81 | linesz = boot_cpu_data.dcache.linesz; | ||
82 | for (v = start; v < end; v += linesz) { | ||
83 | clean_dcache_line((void *)v); | ||
84 | invalidate_icache_line((void *)v); | ||
85 | } | ||
86 | |||
87 | flush_write_buffer(); | ||
88 | } | ||
89 | |||
90 | /* | ||
91 | * This one is called after a module has been loaded. | ||
92 | */ | ||
93 | void flush_icache_range(unsigned long start, unsigned long end) | ||
94 | { | ||
95 | unsigned long linesz; | ||
96 | |||
97 | linesz = boot_cpu_data.dcache.linesz; | ||
98 | __flush_icache_range(start & ~(linesz - 1), | ||
99 | (end + linesz - 1) & ~(linesz - 1)); | ||
100 | } | ||
101 | |||
102 | /* | ||
103 | * This one is called from do_no_page(), do_swap_page() and install_page(). | ||
104 | */ | ||
105 | void flush_icache_page(struct vm_area_struct *vma, struct page *page) | ||
106 | { | ||
107 | if (vma->vm_flags & VM_EXEC) { | ||
108 | void *v = kmap(page); | ||
109 | __flush_icache_range((unsigned long)v, (unsigned long)v + PAGE_SIZE); | ||
110 | kunmap(v); | ||
111 | } | ||
112 | } | ||
113 | |||
114 | /* | ||
115 | * This one is used by copy_to_user_page() | ||
116 | */ | ||
117 | void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, | ||
118 | unsigned long addr, int len) | ||
119 | { | ||
120 | if (vma->vm_flags & VM_EXEC) | ||
121 | flush_icache_range(addr, addr + len); | ||
122 | } | ||
123 | |||
124 | asmlinkage int sys_cacheflush(int operation, void __user *addr, size_t len) | ||
125 | { | ||
126 | int ret; | ||
127 | |||
128 | if (len > CACHEFLUSH_MAX_LEN) { | ||
129 | ret = -EPERM; | ||
130 | if (!capable(CAP_SYS_ADMIN)) | ||
131 | goto out; | ||
132 | } | ||
133 | |||
134 | ret = -EFAULT; | ||
135 | if (!access_ok(VERIFY_WRITE, addr, len)) | ||
136 | goto out; | ||
137 | |||
138 | switch (operation) { | ||
139 | case CACHE_IFLUSH: | ||
140 | flush_icache_range((unsigned long)addr, | ||
141 | (unsigned long)addr + len); | ||
142 | ret = 0; | ||
143 | break; | ||
144 | default: | ||
145 | ret = -EINVAL; | ||
146 | } | ||
147 | |||
148 | out: | ||
149 | return ret; | ||
150 | } | ||