diff options
author | Julien May <julien.may@miromico.ch> | 2008-09-24 04:30:47 -0400 |
---|---|---|
committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-10-12 09:54:00 -0400 |
commit | caf18f19eefc0cf5539b4e82b8aa8df6a78391a6 (patch) | |
tree | 732b9435ee1fd4b536dde6fd6252a54ab388270d /arch/avr32/mach-at32ap | |
parent | 0d62950125241a6e6db8e8f14271f098ec7a2da4 (diff) |
avr32: Allow selecting multiple pins at once
at32_select_periph() now takes an u32 bitmask rather than a single pin.
This allows to set multiple pins at once.
Signed-off-by: Alex Raimondi <mailinglist@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32/mach-at32ap')
-rw-r--r-- | arch/avr32/mach-at32ap/at32ap700x.c | 307 | ||||
-rw-r--r-- | arch/avr32/mach-at32ap/include/mach/portmux.h | 4 | ||||
-rw-r--r-- | arch/avr32/mach-at32ap/pio.c | 41 |
3 files changed, 208 insertions, 144 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index 5d00bb8d3cc2..813b6844cdf6 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c | |||
@@ -82,8 +82,9 @@ static struct platform_device _name##_id##_device = { \ | |||
82 | .num_resources = ARRAY_SIZE(_name##_id##_resource), \ | 82 | .num_resources = ARRAY_SIZE(_name##_id##_resource), \ |
83 | } | 83 | } |
84 | 84 | ||
85 | #define select_peripheral(pin, periph, flags) \ | 85 | #define select_peripheral(port, pin_mask, periph, flags) \ |
86 | at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) | 86 | at32_select_periph(GPIO_##port##_BASE, pin_mask, \ |
87 | GPIO_##periph, flags) | ||
87 | 88 | ||
88 | #define DEV_CLK(_name, devname, bus, _index) \ | 89 | #define DEV_CLK(_name, devname, bus, _index) \ |
89 | static struct clk devname##_##_name = { \ | 90 | static struct clk devname##_##_name = { \ |
@@ -871,6 +872,7 @@ static struct clk atmel_psif1_pclk = { | |||
871 | struct platform_device *__init at32_add_device_psif(unsigned int id) | 872 | struct platform_device *__init at32_add_device_psif(unsigned int id) |
872 | { | 873 | { |
873 | struct platform_device *pdev; | 874 | struct platform_device *pdev; |
875 | u32 pin_mask; | ||
874 | 876 | ||
875 | if (!(id == 0 || id == 1)) | 877 | if (!(id == 0 || id == 1)) |
876 | return NULL; | 878 | return NULL; |
@@ -881,20 +883,22 @@ struct platform_device *__init at32_add_device_psif(unsigned int id) | |||
881 | 883 | ||
882 | switch (id) { | 884 | switch (id) { |
883 | case 0: | 885 | case 0: |
886 | pin_mask = (1 << 8) | (1 << 9); /* CLOCK & DATA */ | ||
887 | |||
884 | if (platform_device_add_resources(pdev, atmel_psif0_resource, | 888 | if (platform_device_add_resources(pdev, atmel_psif0_resource, |
885 | ARRAY_SIZE(atmel_psif0_resource))) | 889 | ARRAY_SIZE(atmel_psif0_resource))) |
886 | goto err_add_resources; | 890 | goto err_add_resources; |
887 | atmel_psif0_pclk.dev = &pdev->dev; | 891 | atmel_psif0_pclk.dev = &pdev->dev; |
888 | select_peripheral(PA(8), PERIPH_A, 0); /* CLOCK */ | 892 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); |
889 | select_peripheral(PA(9), PERIPH_A, 0); /* DATA */ | ||
890 | break; | 893 | break; |
891 | case 1: | 894 | case 1: |
895 | pin_mask = (1 << 11) | (1 << 12); /* CLOCK & DATA */ | ||
896 | |||
892 | if (platform_device_add_resources(pdev, atmel_psif1_resource, | 897 | if (platform_device_add_resources(pdev, atmel_psif1_resource, |
893 | ARRAY_SIZE(atmel_psif1_resource))) | 898 | ARRAY_SIZE(atmel_psif1_resource))) |
894 | goto err_add_resources; | 899 | goto err_add_resources; |
895 | atmel_psif1_pclk.dev = &pdev->dev; | 900 | atmel_psif1_pclk.dev = &pdev->dev; |
896 | select_peripheral(PB(11), PERIPH_A, 0); /* CLOCK */ | 901 | select_peripheral(PIOB, pin_mask, PERIPH_A, 0); |
897 | select_peripheral(PB(12), PERIPH_A, 0); /* DATA */ | ||
898 | break; | 902 | break; |
899 | default: | 903 | default: |
900 | return NULL; | 904 | return NULL; |
@@ -958,26 +962,30 @@ DEV_CLK(usart, atmel_usart3, pba, 6); | |||
958 | 962 | ||
959 | static inline void configure_usart0_pins(void) | 963 | static inline void configure_usart0_pins(void) |
960 | { | 964 | { |
961 | select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ | 965 | u32 pin_mask = (1 << 8) | (1 << 9); /* RXD & TXD */ |
962 | select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ | 966 | |
967 | select_peripheral(PIOA, pin_mask, PERIPH_B, 0); | ||
963 | } | 968 | } |
964 | 969 | ||
965 | static inline void configure_usart1_pins(void) | 970 | static inline void configure_usart1_pins(void) |
966 | { | 971 | { |
967 | select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ | 972 | u32 pin_mask = (1 << 17) | (1 << 18); /* RXD & TXD */ |
968 | select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ | 973 | |
974 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); | ||
969 | } | 975 | } |
970 | 976 | ||
971 | static inline void configure_usart2_pins(void) | 977 | static inline void configure_usart2_pins(void) |
972 | { | 978 | { |
973 | select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ | 979 | u32 pin_mask = (1 << 26) | (1 << 27); /* RXD & TXD */ |
974 | select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ | 980 | |
981 | select_peripheral(PIOB, pin_mask, PERIPH_B, 0); | ||
975 | } | 982 | } |
976 | 983 | ||
977 | static inline void configure_usart3_pins(void) | 984 | static inline void configure_usart3_pins(void) |
978 | { | 985 | { |
979 | select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ | 986 | u32 pin_mask = (1 << 18) | (1 << 17); /* RXD & TXD */ |
980 | select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ | 987 | |
988 | select_peripheral(PIOB, pin_mask, PERIPH_B, 0); | ||
981 | } | 989 | } |
982 | 990 | ||
983 | static struct platform_device *__initdata at32_usarts[4]; | 991 | static struct platform_device *__initdata at32_usarts[4]; |
@@ -1057,59 +1065,69 @@ struct platform_device *__init | |||
1057 | at32_add_device_eth(unsigned int id, struct eth_platform_data *data) | 1065 | at32_add_device_eth(unsigned int id, struct eth_platform_data *data) |
1058 | { | 1066 | { |
1059 | struct platform_device *pdev; | 1067 | struct platform_device *pdev; |
1068 | u32 pin_mask; | ||
1060 | 1069 | ||
1061 | switch (id) { | 1070 | switch (id) { |
1062 | case 0: | 1071 | case 0: |
1063 | pdev = &macb0_device; | 1072 | pdev = &macb0_device; |
1064 | 1073 | ||
1065 | select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ | 1074 | pin_mask = (1 << 3); /* TXD0 */ |
1066 | select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ | 1075 | pin_mask |= (1 << 4); /* TXD1 */ |
1067 | select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ | 1076 | pin_mask |= (1 << 7); /* TXEN */ |
1068 | select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ | 1077 | pin_mask |= (1 << 8); /* TXCK */ |
1069 | select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ | 1078 | pin_mask |= (1 << 9); /* RXD0 */ |
1070 | select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ | 1079 | pin_mask |= (1 << 10); /* RXD1 */ |
1071 | select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ | 1080 | pin_mask |= (1 << 13); /* RXER */ |
1072 | select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ | 1081 | pin_mask |= (1 << 15); /* RXDV */ |
1073 | select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ | 1082 | pin_mask |= (1 << 16); /* MDC */ |
1074 | select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ | 1083 | pin_mask |= (1 << 17); /* MDIO */ |
1075 | 1084 | ||
1076 | if (!data->is_rmii) { | 1085 | if (!data->is_rmii) { |
1077 | select_peripheral(PC(0), PERIPH_A, 0); /* COL */ | 1086 | pin_mask |= (1 << 0); /* COL */ |
1078 | select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ | 1087 | pin_mask |= (1 << 1); /* CRS */ |
1079 | select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ | 1088 | pin_mask |= (1 << 2); /* TXER */ |
1080 | select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ | 1089 | pin_mask |= (1 << 5); /* TXD2 */ |
1081 | select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ | 1090 | pin_mask |= (1 << 6); /* TXD3 */ |
1082 | select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ | 1091 | pin_mask |= (1 << 11); /* RXD2 */ |
1083 | select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ | 1092 | pin_mask |= (1 << 12); /* RXD3 */ |
1084 | select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ | 1093 | pin_mask |= (1 << 14); /* RXCK */ |
1085 | select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ | 1094 | pin_mask |= (1 << 18); /* SPD */ |
1086 | } | 1095 | } |
1096 | |||
1097 | select_peripheral(PIOC, pin_mask, PERIPH_A, 0); | ||
1098 | |||
1087 | break; | 1099 | break; |
1088 | 1100 | ||
1089 | case 1: | 1101 | case 1: |
1090 | pdev = &macb1_device; | 1102 | pdev = &macb1_device; |
1091 | 1103 | ||
1092 | select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ | 1104 | pin_mask = (1 << 13); /* TXD0 */ |
1093 | select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ | 1105 | pin_mask |= (1 << 14); /* TXD1 */ |
1094 | select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ | 1106 | pin_mask |= (1 << 11); /* TXEN */ |
1095 | select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ | 1107 | pin_mask |= (1 << 12); /* TXCK */ |
1096 | select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ | 1108 | pin_mask |= (1 << 10); /* RXD0 */ |
1097 | select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ | 1109 | pin_mask |= (1 << 6); /* RXD1 */ |
1098 | select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ | 1110 | pin_mask |= (1 << 5); /* RXER */ |
1099 | select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ | 1111 | pin_mask |= (1 << 4); /* RXDV */ |
1100 | select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ | 1112 | pin_mask |= (1 << 3); /* MDC */ |
1101 | select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ | 1113 | pin_mask |= (1 << 2); /* MDIO */ |
1114 | |||
1115 | if (!data->is_rmii) | ||
1116 | pin_mask |= (1 << 15); /* SPD */ | ||
1117 | |||
1118 | select_peripheral(PIOD, pin_mask, PERIPH_B, 0); | ||
1102 | 1119 | ||
1103 | if (!data->is_rmii) { | 1120 | if (!data->is_rmii) { |
1104 | select_peripheral(PC(19), PERIPH_B, 0); /* COL */ | 1121 | pin_mask = (1 << 19); /* COL */ |
1105 | select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ | 1122 | pin_mask |= (1 << 23); /* CRS */ |
1106 | select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ | 1123 | pin_mask |= (1 << 26); /* TXER */ |
1107 | select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ | 1124 | pin_mask |= (1 << 27); /* TXD2 */ |
1108 | select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ | 1125 | pin_mask |= (1 << 28); /* TXD3 */ |
1109 | select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ | 1126 | pin_mask |= (1 << 29); /* RXD2 */ |
1110 | select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ | 1127 | pin_mask |= (1 << 30); /* RXD3 */ |
1111 | select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ | 1128 | pin_mask |= (1 << 24); /* RXCK */ |
1112 | select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ | 1129 | |
1130 | select_peripheral(PIOC, pin_mask, PERIPH_B, 0); | ||
1113 | } | 1131 | } |
1114 | break; | 1132 | break; |
1115 | 1133 | ||
@@ -1177,23 +1195,28 @@ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) | |||
1177 | { GPIO_PIN_PB(2), GPIO_PIN_PB(3), | 1195 | { GPIO_PIN_PB(2), GPIO_PIN_PB(3), |
1178 | GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; | 1196 | GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; |
1179 | struct platform_device *pdev; | 1197 | struct platform_device *pdev; |
1198 | u32 pin_mask; | ||
1180 | 1199 | ||
1181 | switch (id) { | 1200 | switch (id) { |
1182 | case 0: | 1201 | case 0: |
1183 | pdev = &atmel_spi0_device; | 1202 | pdev = &atmel_spi0_device; |
1203 | pin_mask = (1 << 1) | (1 << 2); /* MOSI & SCK */ | ||
1204 | |||
1184 | /* pullup MISO so a level is always defined */ | 1205 | /* pullup MISO so a level is always defined */ |
1185 | select_peripheral(PA(0), PERIPH_A, AT32_GPIOF_PULLUP); | 1206 | select_peripheral(PIOA, (1 << 0), PERIPH_A, AT32_GPIOF_PULLUP); |
1186 | select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ | 1207 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); |
1187 | select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ | 1208 | |
1188 | at32_spi_setup_slaves(0, b, n, spi0_pins); | 1209 | at32_spi_setup_slaves(0, b, n, spi0_pins); |
1189 | break; | 1210 | break; |
1190 | 1211 | ||
1191 | case 1: | 1212 | case 1: |
1192 | pdev = &atmel_spi1_device; | 1213 | pdev = &atmel_spi1_device; |
1214 | pin_mask = (1 << 1) | (1 << 5); /* MOSI */ | ||
1215 | |||
1193 | /* pullup MISO so a level is always defined */ | 1216 | /* pullup MISO so a level is always defined */ |
1194 | select_peripheral(PB(0), PERIPH_B, AT32_GPIOF_PULLUP); | 1217 | select_peripheral(PIOB, (1 << 0), PERIPH_B, AT32_GPIOF_PULLUP); |
1195 | select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ | 1218 | select_peripheral(PIOB, pin_mask, PERIPH_B, 0); |
1196 | select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ | 1219 | |
1197 | at32_spi_setup_slaves(1, b, n, spi1_pins); | 1220 | at32_spi_setup_slaves(1, b, n, spi1_pins); |
1198 | break; | 1221 | break; |
1199 | 1222 | ||
@@ -1226,6 +1249,7 @@ struct platform_device *__init at32_add_device_twi(unsigned int id, | |||
1226 | unsigned int n) | 1249 | unsigned int n) |
1227 | { | 1250 | { |
1228 | struct platform_device *pdev; | 1251 | struct platform_device *pdev; |
1252 | u32 pin_mask; | ||
1229 | 1253 | ||
1230 | if (id != 0) | 1254 | if (id != 0) |
1231 | return NULL; | 1255 | return NULL; |
@@ -1238,8 +1262,9 @@ struct platform_device *__init at32_add_device_twi(unsigned int id, | |||
1238 | ARRAY_SIZE(atmel_twi0_resource))) | 1262 | ARRAY_SIZE(atmel_twi0_resource))) |
1239 | goto err_add_resources; | 1263 | goto err_add_resources; |
1240 | 1264 | ||
1241 | select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ | 1265 | pin_mask = (1 << 6) | (1 << 7); /* SDA & SDL */ |
1242 | select_peripheral(PA(7), PERIPH_A, 0); /* SDL */ | 1266 | |
1267 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); | ||
1243 | 1268 | ||
1244 | atmel_twi0_pclk.dev = &pdev->dev; | 1269 | atmel_twi0_pclk.dev = &pdev->dev; |
1245 | 1270 | ||
@@ -1274,6 +1299,8 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data) | |||
1274 | { | 1299 | { |
1275 | struct platform_device *pdev; | 1300 | struct platform_device *pdev; |
1276 | struct dw_dma_slave *dws; | 1301 | struct dw_dma_slave *dws; |
1302 | u32 pioa_mask; | ||
1303 | u32 piob_mask; | ||
1277 | 1304 | ||
1278 | if (id != 0 || !data) | 1305 | if (id != 0 || !data) |
1279 | return NULL; | 1306 | return NULL; |
@@ -1311,17 +1338,17 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data) | |||
1311 | goto fail; | 1338 | goto fail; |
1312 | 1339 | ||
1313 | /* CLK line is common to both slots */ | 1340 | /* CLK line is common to both slots */ |
1314 | select_peripheral(PA(10), PERIPH_A, 0); | 1341 | pioa_mask = 1 << 10; |
1315 | 1342 | ||
1316 | switch (data->slot[0].bus_width) { | 1343 | switch (data->slot[0].bus_width) { |
1317 | case 4: | 1344 | case 4: |
1318 | select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ | 1345 | pioa_mask |= 1 << 13; /* DATA1 */ |
1319 | select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ | 1346 | pioa_mask |= 1 << 14; /* DATA2 */ |
1320 | select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ | 1347 | pioa_mask |= 1 << 15; /* DATA3 */ |
1321 | /* fall through */ | 1348 | /* fall through */ |
1322 | case 1: | 1349 | case 1: |
1323 | select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ | 1350 | pioa_mask |= 1 << 11; /* CMD */ |
1324 | select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ | 1351 | pioa_mask |= 1 << 12; /* DATA0 */ |
1325 | 1352 | ||
1326 | if (gpio_is_valid(data->slot[0].detect_pin)) | 1353 | if (gpio_is_valid(data->slot[0].detect_pin)) |
1327 | at32_select_gpio(data->slot[0].detect_pin, 0); | 1354 | at32_select_gpio(data->slot[0].detect_pin, 0); |
@@ -1335,15 +1362,19 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data) | |||
1335 | goto fail; | 1362 | goto fail; |
1336 | } | 1363 | } |
1337 | 1364 | ||
1365 | select_peripheral(PIOA, pioa_mask, PERIPH_A, 0); | ||
1366 | piob_mask = 0; | ||
1367 | |||
1338 | switch (data->slot[1].bus_width) { | 1368 | switch (data->slot[1].bus_width) { |
1339 | case 4: | 1369 | case 4: |
1340 | select_peripheral(PB(8), PERIPH_B, 0); /* DATA1 */ | 1370 | piob_mask |= 1 << 8; /* DATA1 */ |
1341 | select_peripheral(PB(9), PERIPH_B, 0); /* DATA2 */ | 1371 | piob_mask |= 1 << 9; /* DATA2 */ |
1342 | select_peripheral(PB(10), PERIPH_B, 0); /* DATA3 */ | 1372 | piob_mask |= 1 << 10; /* DATA3 */ |
1343 | /* fall through */ | 1373 | /* fall through */ |
1344 | case 1: | 1374 | case 1: |
1345 | select_peripheral(PB(6), PERIPH_B, 0); /* CMD */ | 1375 | piob_mask |= 1 << 6; /* CMD */ |
1346 | select_peripheral(PB(7), PERIPH_B, 0); /* DATA0 */ | 1376 | piob_mask |= 1 << 7; /* DATA0 */ |
1377 | select_peripheral(PIOB, piob_mask, PERIPH_B, 0); | ||
1347 | 1378 | ||
1348 | if (gpio_is_valid(data->slot[1].detect_pin)) | 1379 | if (gpio_is_valid(data->slot[1].detect_pin)) |
1349 | at32_select_gpio(data->slot[1].detect_pin, 0); | 1380 | at32_select_gpio(data->slot[1].detect_pin, 0); |
@@ -1412,7 +1443,7 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, | |||
1412 | struct fb_monspecs *monspecs; | 1443 | struct fb_monspecs *monspecs; |
1413 | struct fb_videomode *modedb; | 1444 | struct fb_videomode *modedb; |
1414 | unsigned int modedb_size; | 1445 | unsigned int modedb_size; |
1415 | int i; | 1446 | u32 portc_mask, portd_mask, porte_mask; |
1416 | 1447 | ||
1417 | /* | 1448 | /* |
1418 | * Do a deep copy of the fb data, monspecs and modedb. Make | 1449 | * Do a deep copy of the fb data, monspecs and modedb. Make |
@@ -1439,25 +1470,16 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, | |||
1439 | pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL; | 1470 | pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL; |
1440 | 1471 | ||
1441 | /* LCDC on port C */ | 1472 | /* LCDC on port C */ |
1442 | for (i = 19; i < 32; i++) { | 1473 | portc_mask = (pin_mask & 0xfff80000) >> 19; |
1443 | if (pin_mask & (1ULL << i)) | 1474 | select_peripheral(PIOC, portc_mask, PERIPH_A, 0); |
1444 | at32_select_periph(GPIO_PIOC_BASE + i, | ||
1445 | GPIO_PERIPH_A, 0); | ||
1446 | } | ||
1447 | 1475 | ||
1448 | /* LCDC on port D */ | 1476 | /* LCDC on port D */ |
1449 | for (i = 0; i < 18; i++) { | 1477 | portd_mask = pin_mask & 0x0003ffff; |
1450 | if (pin_mask & (1ULL << i)) | 1478 | select_peripheral(PIOD, portd_mask, PERIPH_A, 0); |
1451 | at32_select_periph(GPIO_PIOD_BASE + i, | ||
1452 | GPIO_PERIPH_A, 0); | ||
1453 | } | ||
1454 | 1479 | ||
1455 | /* LCDC on port E */ | 1480 | /* LCDC on port E */ |
1456 | for (i = 0; i < 19; i++) { | 1481 | porte_mask = (pin_mask >> 32) & 0x0007ffff; |
1457 | if (pin_mask & (1ULL << (i + 32))) | 1482 | select_peripheral(PIOE, porte_mask, PERIPH_B, 0); |
1458 | at32_select_periph(GPIO_PIOE_BASE + i, | ||
1459 | GPIO_PERIPH_B, 0); | ||
1460 | } | ||
1461 | 1483 | ||
1462 | clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); | 1484 | clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); |
1463 | clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); | 1485 | clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); |
@@ -1506,6 +1528,7 @@ static struct clk atmel_pwm0_mck = { | |||
1506 | struct platform_device *__init at32_add_device_pwm(u32 mask) | 1528 | struct platform_device *__init at32_add_device_pwm(u32 mask) |
1507 | { | 1529 | { |
1508 | struct platform_device *pdev; | 1530 | struct platform_device *pdev; |
1531 | u32 pin_mask; | ||
1509 | 1532 | ||
1510 | if (!mask) | 1533 | if (!mask) |
1511 | return NULL; | 1534 | return NULL; |
@@ -1521,14 +1544,21 @@ struct platform_device *__init at32_add_device_pwm(u32 mask) | |||
1521 | if (platform_device_add_data(pdev, &mask, sizeof(mask))) | 1544 | if (platform_device_add_data(pdev, &mask, sizeof(mask))) |
1522 | goto out_free_pdev; | 1545 | goto out_free_pdev; |
1523 | 1546 | ||
1547 | pin_mask = 0; | ||
1524 | if (mask & (1 << 0)) | 1548 | if (mask & (1 << 0)) |
1525 | select_peripheral(PA(28), PERIPH_A, 0); | 1549 | pin_mask |= (1 << 28); |
1526 | if (mask & (1 << 1)) | 1550 | if (mask & (1 << 1)) |
1527 | select_peripheral(PA(29), PERIPH_A, 0); | 1551 | pin_mask |= (1 << 29); |
1552 | if (pin_mask > 0) | ||
1553 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); | ||
1554 | |||
1555 | pin_mask = 0; | ||
1528 | if (mask & (1 << 2)) | 1556 | if (mask & (1 << 2)) |
1529 | select_peripheral(PA(21), PERIPH_B, 0); | 1557 | pin_mask |= (1 << 21); |
1530 | if (mask & (1 << 3)) | 1558 | if (mask & (1 << 3)) |
1531 | select_peripheral(PA(22), PERIPH_B, 0); | 1559 | pin_mask |= (1 << 22); |
1560 | if (pin_mask > 0) | ||
1561 | select_peripheral(PIOA, pin_mask, PERIPH_B, 0); | ||
1532 | 1562 | ||
1533 | atmel_pwm0_mck.dev = &pdev->dev; | 1563 | atmel_pwm0_mck.dev = &pdev->dev; |
1534 | 1564 | ||
@@ -1569,52 +1599,65 @@ struct platform_device *__init | |||
1569 | at32_add_device_ssc(unsigned int id, unsigned int flags) | 1599 | at32_add_device_ssc(unsigned int id, unsigned int flags) |
1570 | { | 1600 | { |
1571 | struct platform_device *pdev; | 1601 | struct platform_device *pdev; |
1602 | u32 pin_mask = 0; | ||
1572 | 1603 | ||
1573 | switch (id) { | 1604 | switch (id) { |
1574 | case 0: | 1605 | case 0: |
1575 | pdev = &ssc0_device; | 1606 | pdev = &ssc0_device; |
1576 | if (flags & ATMEL_SSC_RF) | 1607 | if (flags & ATMEL_SSC_RF) |
1577 | select_peripheral(PA(21), PERIPH_A, 0); /* RF */ | 1608 | pin_mask |= (1 << 21); /* RF */ |
1578 | if (flags & ATMEL_SSC_RK) | 1609 | if (flags & ATMEL_SSC_RK) |
1579 | select_peripheral(PA(22), PERIPH_A, 0); /* RK */ | 1610 | pin_mask |= (1 << 22); /* RK */ |
1580 | if (flags & ATMEL_SSC_TK) | 1611 | if (flags & ATMEL_SSC_TK) |
1581 | select_peripheral(PA(23), PERIPH_A, 0); /* TK */ | 1612 | pin_mask |= (1 << 23); /* TK */ |
1582 | if (flags & ATMEL_SSC_TF) | 1613 | if (flags & ATMEL_SSC_TF) |
1583 | select_peripheral(PA(24), PERIPH_A, 0); /* TF */ | 1614 | pin_mask |= (1 << 24); /* TF */ |
1584 | if (flags & ATMEL_SSC_TD) | 1615 | if (flags & ATMEL_SSC_TD) |
1585 | select_peripheral(PA(25), PERIPH_A, 0); /* TD */ | 1616 | pin_mask |= (1 << 25); /* TD */ |
1586 | if (flags & ATMEL_SSC_RD) | 1617 | if (flags & ATMEL_SSC_RD) |
1587 | select_peripheral(PA(26), PERIPH_A, 0); /* RD */ | 1618 | pin_mask |= (1 << 26); /* RD */ |
1619 | |||
1620 | if (pin_mask > 0) | ||
1621 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); | ||
1622 | |||
1588 | break; | 1623 | break; |
1589 | case 1: | 1624 | case 1: |
1590 | pdev = &ssc1_device; | 1625 | pdev = &ssc1_device; |
1591 | if (flags & ATMEL_SSC_RF) | 1626 | if (flags & ATMEL_SSC_RF) |
1592 | select_peripheral(PA(0), PERIPH_B, 0); /* RF */ | 1627 | pin_mask |= (1 << 0); /* RF */ |
1593 | if (flags & ATMEL_SSC_RK) | 1628 | if (flags & ATMEL_SSC_RK) |
1594 | select_peripheral(PA(1), PERIPH_B, 0); /* RK */ | 1629 | pin_mask |= (1 << 1); /* RK */ |
1595 | if (flags & ATMEL_SSC_TK) | 1630 | if (flags & ATMEL_SSC_TK) |
1596 | select_peripheral(PA(2), PERIPH_B, 0); /* TK */ | 1631 | pin_mask |= (1 << 2); /* TK */ |
1597 | if (flags & ATMEL_SSC_TF) | 1632 | if (flags & ATMEL_SSC_TF) |
1598 | select_peripheral(PA(3), PERIPH_B, 0); /* TF */ | 1633 | pin_mask |= (1 << 3); /* TF */ |
1599 | if (flags & ATMEL_SSC_TD) | 1634 | if (flags & ATMEL_SSC_TD) |
1600 | select_peripheral(PA(4), PERIPH_B, 0); /* TD */ | 1635 | pin_mask |= (1 << 4); /* TD */ |
1601 | if (flags & ATMEL_SSC_RD) | 1636 | if (flags & ATMEL_SSC_RD) |
1602 | select_peripheral(PA(5), PERIPH_B, 0); /* RD */ | 1637 | pin_mask |= (1 << 5); /* RD */ |
1638 | |||
1639 | if (pin_mask > 0) | ||
1640 | select_peripheral(PIOA, pin_mask, PERIPH_B, 0); | ||
1641 | |||
1603 | break; | 1642 | break; |
1604 | case 2: | 1643 | case 2: |
1605 | pdev = &ssc2_device; | 1644 | pdev = &ssc2_device; |
1606 | if (flags & ATMEL_SSC_TD) | 1645 | if (flags & ATMEL_SSC_TD) |
1607 | select_peripheral(PB(13), PERIPH_A, 0); /* TD */ | 1646 | pin_mask |= (1 << 13); /* TD */ |
1608 | if (flags & ATMEL_SSC_RD) | 1647 | if (flags & ATMEL_SSC_RD) |
1609 | select_peripheral(PB(14), PERIPH_A, 0); /* RD */ | 1648 | pin_mask |= (1 << 14); /* RD */ |
1610 | if (flags & ATMEL_SSC_TK) | 1649 | if (flags & ATMEL_SSC_TK) |
1611 | select_peripheral(PB(15), PERIPH_A, 0); /* TK */ | 1650 | pin_mask |= (1 << 15); /* TK */ |
1612 | if (flags & ATMEL_SSC_TF) | 1651 | if (flags & ATMEL_SSC_TF) |
1613 | select_peripheral(PB(16), PERIPH_A, 0); /* TF */ | 1652 | pin_mask |= (1 << 16); /* TF */ |
1614 | if (flags & ATMEL_SSC_RF) | 1653 | if (flags & ATMEL_SSC_RF) |
1615 | select_peripheral(PB(17), PERIPH_A, 0); /* RF */ | 1654 | pin_mask |= (1 << 17); /* RF */ |
1616 | if (flags & ATMEL_SSC_RK) | 1655 | if (flags & ATMEL_SSC_RK) |
1617 | select_peripheral(PB(18), PERIPH_A, 0); /* RK */ | 1656 | pin_mask |= (1 << 18); /* RK */ |
1657 | |||
1658 | if (pin_mask > 0) | ||
1659 | select_peripheral(PIOB, pin_mask, PERIPH_A, 0); | ||
1660 | |||
1618 | break; | 1661 | break; |
1619 | default: | 1662 | default: |
1620 | return NULL; | 1663 | return NULL; |
@@ -1752,14 +1795,15 @@ static int __init at32_init_ide_or_cf(struct platform_device *pdev, | |||
1752 | unsigned int cs, unsigned int extint) | 1795 | unsigned int cs, unsigned int extint) |
1753 | { | 1796 | { |
1754 | static unsigned int extint_pin_map[4] __initdata = { | 1797 | static unsigned int extint_pin_map[4] __initdata = { |
1755 | GPIO_PIN_PB(25), | 1798 | (1 << 25), |
1756 | GPIO_PIN_PB(26), | 1799 | (1 << 26), |
1757 | GPIO_PIN_PB(27), | 1800 | (1 << 27), |
1758 | GPIO_PIN_PB(28), | 1801 | (1 << 28), |
1759 | }; | 1802 | }; |
1760 | static bool common_pins_initialized __initdata = false; | 1803 | static bool common_pins_initialized __initdata = false; |
1761 | unsigned int extint_pin; | 1804 | unsigned int extint_pin; |
1762 | int ret; | 1805 | int ret; |
1806 | u32 pin_mask; | ||
1763 | 1807 | ||
1764 | if (extint >= ARRAY_SIZE(extint_pin_map)) | 1808 | if (extint >= ARRAY_SIZE(extint_pin_map)) |
1765 | return -EINVAL; | 1809 | return -EINVAL; |
@@ -1773,7 +1817,8 @@ static int __init at32_init_ide_or_cf(struct platform_device *pdev, | |||
1773 | if (ret) | 1817 | if (ret) |
1774 | return ret; | 1818 | return ret; |
1775 | 1819 | ||
1776 | select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ | 1820 | /* NCS4 -> OE_N */ |
1821 | select_peripheral(PIOE, (1 << 21), PERIPH_A, 0); | ||
1777 | hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF0_ENABLE); | 1822 | hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF0_ENABLE); |
1778 | break; | 1823 | break; |
1779 | case 5: | 1824 | case 5: |
@@ -1783,7 +1828,8 @@ static int __init at32_init_ide_or_cf(struct platform_device *pdev, | |||
1783 | if (ret) | 1828 | if (ret) |
1784 | return ret; | 1829 | return ret; |
1785 | 1830 | ||
1786 | select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ | 1831 | /* NCS5 -> OE_N */ |
1832 | select_peripheral(PIOE, (1 << 22), PERIPH_A, 0); | ||
1787 | hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF1_ENABLE); | 1833 | hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF1_ENABLE); |
1788 | break; | 1834 | break; |
1789 | default: | 1835 | default: |
@@ -1791,14 +1837,17 @@ static int __init at32_init_ide_or_cf(struct platform_device *pdev, | |||
1791 | } | 1837 | } |
1792 | 1838 | ||
1793 | if (!common_pins_initialized) { | 1839 | if (!common_pins_initialized) { |
1794 | select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */ | 1840 | pin_mask = (1 << 19); /* CFCE1 -> CS0_N */ |
1795 | select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */ | 1841 | pin_mask |= (1 << 20); /* CFCE2 -> CS1_N */ |
1796 | select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */ | 1842 | pin_mask |= (1 << 23); /* CFRNW -> DIR */ |
1797 | select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */ | 1843 | pin_mask |= (1 << 24); /* NWAIT <- IORDY */ |
1844 | |||
1845 | select_peripheral(PIOE, pin_mask, PERIPH_A, 0); | ||
1846 | |||
1798 | common_pins_initialized = true; | 1847 | common_pins_initialized = true; |
1799 | } | 1848 | } |
1800 | 1849 | ||
1801 | at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); | 1850 | select_peripheral(PIOB, extint_pin, PERIPH_A, AT32_GPIOF_DEGLITCH); |
1802 | 1851 | ||
1803 | pdev->resource[1].start = EIM_IRQ_BASE + extint; | 1852 | pdev->resource[1].start = EIM_IRQ_BASE + extint; |
1804 | pdev->resource[1].end = pdev->resource[1].start; | 1853 | pdev->resource[1].end = pdev->resource[1].start; |
@@ -1937,6 +1986,7 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data) | |||
1937 | { | 1986 | { |
1938 | struct platform_device *pdev; | 1987 | struct platform_device *pdev; |
1939 | struct ac97c_platform_data _data; | 1988 | struct ac97c_platform_data _data; |
1989 | u32 pin_mask; | ||
1940 | 1990 | ||
1941 | if (id != 0) | 1991 | if (id != 0) |
1942 | return NULL; | 1992 | return NULL; |
@@ -1963,10 +2013,10 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data) | |||
1963 | sizeof(struct ac97c_platform_data))) | 2013 | sizeof(struct ac97c_platform_data))) |
1964 | goto fail; | 2014 | goto fail; |
1965 | 2015 | ||
1966 | select_peripheral(PB(20), PERIPH_B, 0); /* SDO */ | 2016 | pin_mask = (1 << 20) | (1 << 21); /* SDO & SYNC */ |
1967 | select_peripheral(PB(21), PERIPH_B, 0); /* SYNC */ | 2017 | pin_mask |= (1 << 22) | (1 << 23); /* SCLK & SDI */ |
1968 | select_peripheral(PB(22), PERIPH_B, 0); /* SCLK */ | 2018 | |
1969 | select_peripheral(PB(23), PERIPH_B, 0); /* SDI */ | 2019 | select_peripheral(PIOB, pin_mask, PERIPH_B, 0); |
1970 | 2020 | ||
1971 | /* TODO: gpio_is_valid(data->reset_pin) with kernel 2.6.26. */ | 2021 | /* TODO: gpio_is_valid(data->reset_pin) with kernel 2.6.26. */ |
1972 | if (data->reset_pin != GPIO_PIN_NONE) | 2022 | if (data->reset_pin != GPIO_PIN_NONE) |
@@ -2008,6 +2058,7 @@ static struct clk abdac0_sample_clk = { | |||
2008 | struct platform_device *__init at32_add_device_abdac(unsigned int id) | 2058 | struct platform_device *__init at32_add_device_abdac(unsigned int id) |
2009 | { | 2059 | { |
2010 | struct platform_device *pdev; | 2060 | struct platform_device *pdev; |
2061 | u32 pin_mask; | ||
2011 | 2062 | ||
2012 | if (id != 0) | 2063 | if (id != 0) |
2013 | return NULL; | 2064 | return NULL; |
@@ -2020,10 +2071,10 @@ struct platform_device *__init at32_add_device_abdac(unsigned int id) | |||
2020 | ARRAY_SIZE(abdac0_resource))) | 2071 | ARRAY_SIZE(abdac0_resource))) |
2021 | goto err_add_resources; | 2072 | goto err_add_resources; |
2022 | 2073 | ||
2023 | select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ | 2074 | pin_mask = (1 << 20) | (1 << 22); /* DATA1 & DATAN1 */ |
2024 | select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ | 2075 | pin_mask |= (1 << 21) | (1 << 23); /* DATA0 & DATAN0 */ |
2025 | select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ | 2076 | |
2026 | select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ | 2077 | select_peripheral(PIOB, pin_mask, PERIPH_A, 0); |
2027 | 2078 | ||
2028 | abdac0_pclk.dev = &pdev->dev; | 2079 | abdac0_pclk.dev = &pdev->dev; |
2029 | abdac0_sample_clk.dev = &pdev->dev; | 2080 | abdac0_sample_clk.dev = &pdev->dev; |
diff --git a/arch/avr32/mach-at32ap/include/mach/portmux.h b/arch/avr32/mach-at32ap/include/mach/portmux.h index 4bbf99ec2c43..21c79373b53f 100644 --- a/arch/avr32/mach-at32ap/include/mach/portmux.h +++ b/arch/avr32/mach-at32ap/include/mach/portmux.h | |||
@@ -21,8 +21,8 @@ | |||
21 | #define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */ | 21 | #define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */ |
22 | #define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */ | 22 | #define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */ |
23 | 23 | ||
24 | void at32_select_periph(unsigned int pin, unsigned int periph, | 24 | void at32_select_periph(unsigned int port, unsigned int pin, |
25 | unsigned long flags); | 25 | unsigned int periph, unsigned long flags); |
26 | void at32_select_gpio(unsigned int pin, unsigned long flags); | 26 | void at32_select_gpio(unsigned int pin, unsigned long flags); |
27 | void at32_deselect_pin(unsigned int pin); | 27 | void at32_deselect_pin(unsigned int pin); |
28 | void at32_reserve_pin(unsigned int pin); | 28 | void at32_reserve_pin(unsigned int pin); |
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c index ef2561e15399..ed81a8bcb22d 100644 --- a/arch/avr32/mach-at32ap/pio.c +++ b/arch/avr32/mach-at32ap/pio.c | |||
@@ -50,35 +50,48 @@ static struct pio_device *gpio_to_pio(unsigned int gpio) | |||
50 | } | 50 | } |
51 | 51 | ||
52 | /* Pin multiplexing API */ | 52 | /* Pin multiplexing API */ |
53 | static DEFINE_SPINLOCK(pio_lock); | ||
53 | 54 | ||
54 | void __init at32_select_periph(unsigned int pin, unsigned int periph, | 55 | void __init at32_select_periph(unsigned int port, u32 pin_mask, |
55 | unsigned long flags) | 56 | unsigned int periph, unsigned long flags) |
56 | { | 57 | { |
57 | struct pio_device *pio; | 58 | struct pio_device *pio; |
58 | unsigned int pin_index = pin & 0x1f; | ||
59 | u32 mask = 1 << pin_index; | ||
60 | 59 | ||
61 | pio = gpio_to_pio(pin); | 60 | /* assign and verify pio */ |
61 | pio = gpio_to_pio(port); | ||
62 | if (unlikely(!pio)) { | 62 | if (unlikely(!pio)) { |
63 | printk("pio: invalid pin %u\n", pin); | 63 | printk(KERN_WARNING "pio: invalid port %u\n", port); |
64 | goto fail; | 64 | goto fail; |
65 | } | 65 | } |
66 | 66 | ||
67 | if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask) | 67 | /* Test if any of the requested pins is already muxed */ |
68 | || gpiochip_is_requested(&pio->chip, pin_index))) { | 68 | spin_lock(&pio_lock); |
69 | printk("%s: pin %u is busy\n", pio->name, pin_index); | 69 | if (unlikely(pio->pinmux_mask & pin_mask)) { |
70 | printk(KERN_WARNING "%s: pin(s) busy (requested 0x%x, busy 0x%x)\n", | ||
71 | pio->name, pin_mask, pio->pinmux_mask & pin_mask); | ||
72 | spin_unlock(&pio_lock); | ||
70 | goto fail; | 73 | goto fail; |
71 | } | 74 | } |
72 | 75 | ||
73 | pio_writel(pio, PUER, mask); | 76 | pio->pinmux_mask |= pin_mask; |
77 | |||
78 | /* enable pull ups */ | ||
79 | pio_writel(pio, PUER, pin_mask); | ||
80 | |||
81 | /* select either peripheral A or B */ | ||
74 | if (periph) | 82 | if (periph) |
75 | pio_writel(pio, BSR, mask); | 83 | pio_writel(pio, BSR, pin_mask); |
76 | else | 84 | else |
77 | pio_writel(pio, ASR, mask); | 85 | pio_writel(pio, ASR, pin_mask); |
86 | |||
87 | /* enable peripheral control */ | ||
88 | pio_writel(pio, PDR, pin_mask); | ||
78 | 89 | ||
79 | pio_writel(pio, PDR, mask); | 90 | /* Disable pull ups if not requested. */ |
80 | if (!(flags & AT32_GPIOF_PULLUP)) | 91 | if (!(flags & AT32_GPIOF_PULLUP)) |
81 | pio_writel(pio, PUDR, mask); | 92 | pio_writel(pio, PUDR, pin_mask); |
93 | |||
94 | spin_unlock(&pio_lock); | ||
82 | 95 | ||
83 | return; | 96 | return; |
84 | 97 | ||