diff options
author | Julien May <julien.may@miromico.ch> | 2008-08-04 08:27:38 -0400 |
---|---|---|
committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-09-22 03:51:01 -0400 |
commit | 7066412488281fd1c201dceb22a0dfe467012f76 (patch) | |
tree | b5c4343143199ebd963f6537baba3f163684feab /arch/avr32/mach-at32ap | |
parent | 48c1fd3882286fd9e978ca8725013f2e060b700e (diff) |
avr32: Allow fine-grained control over LCDC pins
This replaces the pin_config param with an u64 pin_mask in
at32_add_device_lcdc, allowing a board-maintainer to indivually select
specific lcdc pins.
Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Julien May <jmay@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32/mach-at32ap')
-rw-r--r-- | arch/avr32/mach-at32ap/at32ap700x.c | 95 | ||||
-rw-r--r-- | arch/avr32/mach-at32ap/include/mach/at32ap700x.h | 128 | ||||
-rw-r--r-- | arch/avr32/mach-at32ap/include/mach/board.h | 2 |
3 files changed, 154 insertions, 71 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index e01dbe4ebb40..c28dd172f627 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c | |||
@@ -1353,13 +1353,14 @@ static struct clk atmel_lcdfb0_pixclk = { | |||
1353 | struct platform_device *__init | 1353 | struct platform_device *__init |
1354 | at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, | 1354 | at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, |
1355 | unsigned long fbmem_start, unsigned long fbmem_len, | 1355 | unsigned long fbmem_start, unsigned long fbmem_len, |
1356 | unsigned int pin_config) | 1356 | u64 pin_mask) |
1357 | { | 1357 | { |
1358 | struct platform_device *pdev; | 1358 | struct platform_device *pdev; |
1359 | struct atmel_lcdfb_info *info; | 1359 | struct atmel_lcdfb_info *info; |
1360 | struct fb_monspecs *monspecs; | 1360 | struct fb_monspecs *monspecs; |
1361 | struct fb_videomode *modedb; | 1361 | struct fb_videomode *modedb; |
1362 | unsigned int modedb_size; | 1362 | unsigned int modedb_size; |
1363 | int i; | ||
1363 | 1364 | ||
1364 | /* | 1365 | /* |
1365 | * Do a deep copy of the fb data, monspecs and modedb. Make | 1366 | * Do a deep copy of the fb data, monspecs and modedb. Make |
@@ -1381,75 +1382,29 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, | |||
1381 | case 0: | 1382 | case 0: |
1382 | pdev = &atmel_lcdfb0_device; | 1383 | pdev = &atmel_lcdfb0_device; |
1383 | 1384 | ||
1384 | switch (pin_config) { | 1385 | if (pin_mask == 0ULL) |
1385 | case 0: | 1386 | /* Default to "full" lcdc control signals and 24bit */ |
1386 | select_peripheral(PC(19), PERIPH_A, 0); /* CC */ | 1387 | pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL; |
1387 | select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ | 1388 | |
1388 | select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ | 1389 | /* LCDC on port C */ |
1389 | select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ | 1390 | for (i = 19; i < 32; i++) { |
1390 | select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ | 1391 | if (pin_mask & (1ULL << i)) |
1391 | select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ | 1392 | at32_select_periph(GPIO_PIOC_BASE + i, |
1392 | select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ | 1393 | GPIO_PERIPH_A, 0); |
1393 | select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ | 1394 | } |
1394 | select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ | 1395 | |
1395 | select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ | 1396 | /* LCDC on port D */ |
1396 | select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ | 1397 | for (i = 0; i < 18; i++) { |
1397 | select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ | 1398 | if (pin_mask & (1ULL << i)) |
1398 | select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ | 1399 | at32_select_periph(GPIO_PIOD_BASE + i, |
1399 | select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ | 1400 | GPIO_PERIPH_A, 0); |
1400 | select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ | 1401 | } |
1401 | select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ | 1402 | |
1402 | select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ | 1403 | /* LCDC on port E */ |
1403 | select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ | 1404 | for (i = 0; i < 19; i++) { |
1404 | select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ | 1405 | if (pin_mask & (1ULL << (i + 32))) |
1405 | select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ | 1406 | at32_select_periph(GPIO_PIOE_BASE + i, |
1406 | select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ | 1407 | GPIO_PERIPH_B, 0); |
1407 | select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ | ||
1408 | select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ | ||
1409 | select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ | ||
1410 | select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ | ||
1411 | select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ | ||
1412 | select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ | ||
1413 | select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ | ||
1414 | select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ | ||
1415 | select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ | ||
1416 | select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ | ||
1417 | break; | ||
1418 | case 1: | ||
1419 | select_peripheral(PE(0), PERIPH_B, 0); /* CC */ | ||
1420 | select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ | ||
1421 | select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ | ||
1422 | select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ | ||
1423 | select_peripheral(PE(1), PERIPH_B, 0); /* DVAL */ | ||
1424 | select_peripheral(PE(2), PERIPH_B, 0); /* MODE */ | ||
1425 | select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ | ||
1426 | select_peripheral(PE(3), PERIPH_B, 0); /* DATA0 */ | ||
1427 | select_peripheral(PE(4), PERIPH_B, 0); /* DATA1 */ | ||
1428 | select_peripheral(PE(5), PERIPH_B, 0); /* DATA2 */ | ||
1429 | select_peripheral(PE(6), PERIPH_B, 0); /* DATA3 */ | ||
1430 | select_peripheral(PE(7), PERIPH_B, 0); /* DATA4 */ | ||
1431 | select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ | ||
1432 | select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ | ||
1433 | select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ | ||
1434 | select_peripheral(PE(8), PERIPH_B, 0); /* DATA8 */ | ||
1435 | select_peripheral(PE(9), PERIPH_B, 0); /* DATA9 */ | ||
1436 | select_peripheral(PE(10), PERIPH_B, 0); /* DATA10 */ | ||
1437 | select_peripheral(PE(11), PERIPH_B, 0); /* DATA11 */ | ||
1438 | select_peripheral(PE(12), PERIPH_B, 0); /* DATA12 */ | ||
1439 | select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ | ||
1440 | select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ | ||
1441 | select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ | ||
1442 | select_peripheral(PE(13), PERIPH_B, 0); /* DATA16 */ | ||
1443 | select_peripheral(PE(14), PERIPH_B, 0); /* DATA17 */ | ||
1444 | select_peripheral(PE(15), PERIPH_B, 0); /* DATA18 */ | ||
1445 | select_peripheral(PE(16), PERIPH_B, 0); /* DATA19 */ | ||
1446 | select_peripheral(PE(17), PERIPH_B, 0); /* DATA20 */ | ||
1447 | select_peripheral(PE(18), PERIPH_B, 0); /* DATA21 */ | ||
1448 | select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ | ||
1449 | select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ | ||
1450 | break; | ||
1451 | default: | ||
1452 | goto err_invalid_id; | ||
1453 | } | 1408 | } |
1454 | 1409 | ||
1455 | clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); | 1410 | clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); |
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h index 1e9852d65cca..a77d372f6f3e 100644 --- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h +++ b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h | |||
@@ -83,4 +83,132 @@ | |||
83 | #define HMATRIX_BASE 0xfff00800 | 83 | #define HMATRIX_BASE 0xfff00800 |
84 | #define SDRAMC_BASE 0xfff03800 | 84 | #define SDRAMC_BASE 0xfff03800 |
85 | 85 | ||
86 | /* LCDC on port C */ | ||
87 | #define ATMEL_LCDC_PC_CC (1ULL << 19) | ||
88 | #define ATMEL_LCDC_PC_HSYNC (1ULL << 20) | ||
89 | #define ATMEL_LCDC_PC_PCLK (1ULL << 21) | ||
90 | #define ATMEL_LCDC_PC_VSYNC (1ULL << 22) | ||
91 | #define ATMEL_LCDC_PC_DVAL (1ULL << 23) | ||
92 | #define ATMEL_LCDC_PC_MODE (1ULL << 24) | ||
93 | #define ATMEL_LCDC_PC_PWR (1ULL << 25) | ||
94 | #define ATMEL_LCDC_PC_DATA0 (1ULL << 26) | ||
95 | #define ATMEL_LCDC_PC_DATA1 (1ULL << 27) | ||
96 | #define ATMEL_LCDC_PC_DATA2 (1ULL << 28) | ||
97 | #define ATMEL_LCDC_PC_DATA3 (1ULL << 29) | ||
98 | #define ATMEL_LCDC_PC_DATA4 (1ULL << 30) | ||
99 | #define ATMEL_LCDC_PC_DATA5 (1ULL << 31) | ||
100 | |||
101 | /* LCDC on port D */ | ||
102 | #define ATMEL_LCDC_PD_DATA6 (1ULL << 0) | ||
103 | #define ATMEL_LCDC_PD_DATA7 (1ULL << 1) | ||
104 | #define ATMEL_LCDC_PD_DATA8 (1ULL << 2) | ||
105 | #define ATMEL_LCDC_PD_DATA9 (1ULL << 3) | ||
106 | #define ATMEL_LCDC_PD_DATA10 (1ULL << 4) | ||
107 | #define ATMEL_LCDC_PD_DATA11 (1ULL << 5) | ||
108 | #define ATMEL_LCDC_PD_DATA12 (1ULL << 6) | ||
109 | #define ATMEL_LCDC_PD_DATA13 (1ULL << 7) | ||
110 | #define ATMEL_LCDC_PD_DATA14 (1ULL << 8) | ||
111 | #define ATMEL_LCDC_PD_DATA15 (1ULL << 9) | ||
112 | #define ATMEL_LCDC_PD_DATA16 (1ULL << 10) | ||
113 | #define ATMEL_LCDC_PD_DATA17 (1ULL << 11) | ||
114 | #define ATMEL_LCDC_PD_DATA18 (1ULL << 12) | ||
115 | #define ATMEL_LCDC_PD_DATA19 (1ULL << 13) | ||
116 | #define ATMEL_LCDC_PD_DATA20 (1ULL << 14) | ||
117 | #define ATMEL_LCDC_PD_DATA21 (1ULL << 15) | ||
118 | #define ATMEL_LCDC_PD_DATA22 (1ULL << 16) | ||
119 | #define ATMEL_LCDC_PD_DATA23 (1ULL << 17) | ||
120 | |||
121 | /* LCDC on port E */ | ||
122 | #define ATMEL_LCDC_PE_CC (1ULL << (32 + 0)) | ||
123 | #define ATMEL_LCDC_PE_DVAL (1ULL << (32 + 1)) | ||
124 | #define ATMEL_LCDC_PE_MODE (1ULL << (32 + 2)) | ||
125 | #define ATMEL_LCDC_PE_DATA0 (1ULL << (32 + 3)) | ||
126 | #define ATMEL_LCDC_PE_DATA1 (1ULL << (32 + 4)) | ||
127 | #define ATMEL_LCDC_PE_DATA2 (1ULL << (32 + 5)) | ||
128 | #define ATMEL_LCDC_PE_DATA3 (1ULL << (32 + 6)) | ||
129 | #define ATMEL_LCDC_PE_DATA4 (1ULL << (32 + 7)) | ||
130 | #define ATMEL_LCDC_PE_DATA8 (1ULL << (32 + 8)) | ||
131 | #define ATMEL_LCDC_PE_DATA9 (1ULL << (32 + 9)) | ||
132 | #define ATMEL_LCDC_PE_DATA10 (1ULL << (32 + 10)) | ||
133 | #define ATMEL_LCDC_PE_DATA11 (1ULL << (32 + 11)) | ||
134 | #define ATMEL_LCDC_PE_DATA12 (1ULL << (32 + 12)) | ||
135 | #define ATMEL_LCDC_PE_DATA16 (1ULL << (32 + 13)) | ||
136 | #define ATMEL_LCDC_PE_DATA17 (1ULL << (32 + 14)) | ||
137 | #define ATMEL_LCDC_PE_DATA18 (1ULL << (32 + 15)) | ||
138 | #define ATMEL_LCDC_PE_DATA19 (1ULL << (32 + 16)) | ||
139 | #define ATMEL_LCDC_PE_DATA20 (1ULL << (32 + 17)) | ||
140 | #define ATMEL_LCDC_PE_DATA21 (1ULL << (32 + 18)) | ||
141 | |||
142 | |||
143 | #define ATMEL_LCDC(PORT, PIN) (ATMEL_LCDC_##PORT##_##PIN) | ||
144 | |||
145 | |||
146 | #define ATMEL_LCDC_PRI_24B_DATA ( \ | ||
147 | ATMEL_LCDC(PC, DATA0) | ATMEL_LCDC(PC, DATA1) | \ | ||
148 | ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \ | ||
149 | ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \ | ||
150 | ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \ | ||
151 | ATMEL_LCDC(PD, DATA8) | ATMEL_LCDC(PD, DATA9) | \ | ||
152 | ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \ | ||
153 | ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) | \ | ||
154 | ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \ | ||
155 | ATMEL_LCDC(PD, DATA16) | ATMEL_LCDC(PD, DATA17) | \ | ||
156 | ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) | \ | ||
157 | ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) | \ | ||
158 | ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23)) | ||
159 | |||
160 | #define ATMEL_LCDC_ALT_24B_DATA ( \ | ||
161 | ATMEL_LCDC(PE, DATA0) | ATMEL_LCDC(PE, DATA1) | \ | ||
162 | ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \ | ||
163 | ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \ | ||
164 | ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \ | ||
165 | ATMEL_LCDC(PE, DATA8) | ATMEL_LCDC(PE, DATA9) | \ | ||
166 | ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \ | ||
167 | ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) | \ | ||
168 | ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \ | ||
169 | ATMEL_LCDC(PE, DATA16) | ATMEL_LCDC(PE, DATA17) | \ | ||
170 | ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) | \ | ||
171 | ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) | \ | ||
172 | ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23)) | ||
173 | |||
174 | #define ATMEL_LCDC_PRI_15B_DATA ( \ | ||
175 | ATMEL_LCDC(PC, DATA0) | ATMEL_LCDC(PC, DATA1) | \ | ||
176 | ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \ | ||
177 | ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \ | ||
178 | ATMEL_LCDC(PD, DATA8) | ATMEL_LCDC(PD, DATA9) | \ | ||
179 | ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \ | ||
180 | ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA16) | \ | ||
181 | ATMEL_LCDC(PD, DATA17) | ATMEL_LCDC(PD, DATA18) | \ | ||
182 | ATMEL_LCDC(PD, DATA19) | ATMEL_LCDC(PD, DATA20)) | ||
183 | |||
184 | #define ATMEL_LCDC_ALT_15B_DATA ( \ | ||
185 | ATMEL_LCDC(PE, DATA0) | ATMEL_LCDC(PE, DATA1) | \ | ||
186 | ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \ | ||
187 | ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \ | ||
188 | ATMEL_LCDC(PE, DATA8) | ATMEL_LCDC(PE, DATA9) | \ | ||
189 | ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \ | ||
190 | ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PE, DATA16) | \ | ||
191 | ATMEL_LCDC(PE, DATA17) | ATMEL_LCDC(PE, DATA18) | \ | ||
192 | ATMEL_LCDC(PE, DATA19) | ATMEL_LCDC(PE, DATA20)) | ||
193 | |||
194 | #define ATMEL_LCDC_PRI_CONTROL ( \ | ||
195 | ATMEL_LCDC(PC, CC) | ATMEL_LCDC(PC, DVAL) | \ | ||
196 | ATMEL_LCDC(PC, MODE) | ATMEL_LCDC(PC, PWR)) | ||
197 | |||
198 | #define ATMEL_LCDC_ALT_CONTROL ( \ | ||
199 | ATMEL_LCDC(PE, CC) | ATMEL_LCDC(PE, DVAL) | \ | ||
200 | ATMEL_LCDC(PE, MODE) | ATMEL_LCDC(PC, PWR)) | ||
201 | |||
202 | #define ATMEL_LCDC_CONTROL ( \ | ||
203 | ATMEL_LCDC(PC, HSYNC) | ATMEL_LCDC(PC, VSYNC) | \ | ||
204 | ATMEL_LCDC(PC, PCLK)) | ||
205 | |||
206 | #define ATMEL_LCDC_PRI_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_24B_DATA) | ||
207 | |||
208 | #define ATMEL_LCDC_ALT_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_24B_DATA) | ||
209 | |||
210 | #define ATMEL_LCDC_PRI_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_15B_DATA) | ||
211 | |||
212 | #define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA) | ||
213 | |||
86 | #endif /* __ASM_ARCH_AT32AP700X_H__ */ | 214 | #endif /* __ASM_ARCH_AT32AP700X_H__ */ |
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h index e60e9076544d..c48386d66bc3 100644 --- a/arch/avr32/mach-at32ap/include/mach/board.h +++ b/arch/avr32/mach-at32ap/include/mach/board.h | |||
@@ -43,7 +43,7 @@ struct atmel_lcdfb_info; | |||
43 | struct platform_device * | 43 | struct platform_device * |
44 | at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, | 44 | at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, |
45 | unsigned long fbmem_start, unsigned long fbmem_len, | 45 | unsigned long fbmem_start, unsigned long fbmem_len, |
46 | unsigned int pin_config); | 46 | u64 pin_mask); |
47 | 47 | ||
48 | struct usba_platform_data; | 48 | struct usba_platform_data; |
49 | struct platform_device * | 49 | struct platform_device * |