aboutsummaryrefslogtreecommitdiffstats
path: root/arch/avr32/mach-at32ap
diff options
context:
space:
mode:
authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-07-08 14:59:42 -0400
committerDan Williams <dan.j.williams@intel.com>2008-07-08 14:59:42 -0400
commit3bfb1d20b547a5071d01344581eac5846ea84491 (patch)
tree3cdbd3b5d59c93f257573cc894db2a000698f02b /arch/avr32/mach-at32ap
parentdc0ee6435cb92ccc81b14ff28d163fecc5a7f120 (diff)
dmaengine: Driver for the Synopsys DesignWare DMA controller
This adds a driver for the Synopsys DesignWare DMA controller (aka DMACA on AVR32 systems.) This DMA controller can be found integrated on the AT32AP7000 chip and is primarily meant for peripheral DMA transfer, but can also be used for memory-to-memory transfers. This patch is based on a driver from David Brownell which was based on an older version of the DMA Engine framework. It also implements the proposed extensions to the DMA Engine API for slave DMA operations. The dmatest client shows no problems, but there may still be room for improvement performance-wise. DMA slave transfer performance is definitely "good enough"; reading 100 MiB from an SD card running at ~20 MHz yields ~7.2 MiB/s average transfer rate. Full documentation for this controller can be found in the Synopsys DW AHB DMAC Databook: http://www.synopsys.com/designware/docs/iip/DW_ahb_dmac/latest/doc/dw_ahb_dmac_db.pdf The controller has lots of implementation options, so it's usually a good idea to check the data sheet of the chip it's intergrated on as well. The AT32AP7000 data sheet can be found here: http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Changes since v4: * Use client_count instead of dma_chan_is_in_use() * Add missing include * Unmap buffers unless client told us not to Changes since v3: * Update to latest DMA engine and DMA slave APIs * Embed the hw descriptor into the sw descriptor * Clean up and update MODULE_DESCRIPTION, copyright date, etc. Changes since v2: * Dequeue all pending transfers in terminate_all() * Rename dw_dmac.h -> dw_dmac_regs.h * Define and use controller-specific dma_slave data * Fix up a few outdated comments * Define hardware registers as structs (doesn't generate better code, unfortunately, but it looks nicer.) * Get number of channels from platform_data instead of hardcoding it based on CONFIG_WHATEVER_CPU. * Give slave clients exclusive access to the channel Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>, Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'arch/avr32/mach-at32ap')
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c27
1 files changed, 14 insertions, 13 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 0f24b4f85c17..892e27e0d583 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -7,6 +7,7 @@
7 */ 7 */
8#include <linux/clk.h> 8#include <linux/clk.h>
9#include <linux/delay.h> 9#include <linux/delay.h>
10#include <linux/dw_dmac.h>
10#include <linux/fb.h> 11#include <linux/fb.h>
11#include <linux/init.h> 12#include <linux/init.h>
12#include <linux/platform_device.h> 13#include <linux/platform_device.h>
@@ -599,6 +600,17 @@ static void __init genclk_init_parent(struct clk *clk)
599 clk->parent = parent; 600 clk->parent = parent;
600} 601}
601 602
603static struct dw_dma_platform_data dw_dmac0_data = {
604 .nr_channels = 3,
605};
606
607static struct resource dw_dmac0_resource[] = {
608 PBMEM(0xff200000),
609 IRQ(2),
610};
611DEFINE_DEV_DATA(dw_dmac, 0);
612DEV_CLK(hclk, dw_dmac0, hsb, 10);
613
602/* -------------------------------------------------------------------- 614/* --------------------------------------------------------------------
603 * System peripherals 615 * System peripherals
604 * -------------------------------------------------------------------- */ 616 * -------------------------------------------------------------------- */
@@ -705,17 +717,6 @@ static struct clk pico_clk = {
705 .users = 1, 717 .users = 1,
706}; 718};
707 719
708static struct resource dmaca0_resource[] = {
709 {
710 .start = 0xff200000,
711 .end = 0xff20ffff,
712 .flags = IORESOURCE_MEM,
713 },
714 IRQ(2),
715};
716DEFINE_DEV(dmaca, 0);
717DEV_CLK(hclk, dmaca0, hsb, 10);
718
719/* -------------------------------------------------------------------- 720/* --------------------------------------------------------------------
720 * HMATRIX 721 * HMATRIX
721 * -------------------------------------------------------------------- */ 722 * -------------------------------------------------------------------- */
@@ -828,7 +829,7 @@ void __init at32_add_system_devices(void)
828 platform_device_register(&at32_eic0_device); 829 platform_device_register(&at32_eic0_device);
829 platform_device_register(&smc0_device); 830 platform_device_register(&smc0_device);
830 platform_device_register(&pdc_device); 831 platform_device_register(&pdc_device);
831 platform_device_register(&dmaca0_device); 832 platform_device_register(&dw_dmac0_device);
832 833
833 platform_device_register(&at32_tcb0_device); 834 platform_device_register(&at32_tcb0_device);
834 platform_device_register(&at32_tcb1_device); 835 platform_device_register(&at32_tcb1_device);
@@ -1891,7 +1892,7 @@ struct clk *at32_clock_list[] = {
1891 &smc0_mck, 1892 &smc0_mck,
1892 &pdc_hclk, 1893 &pdc_hclk,
1893 &pdc_pclk, 1894 &pdc_pclk,
1894 &dmaca0_hclk, 1895 &dw_dmac0_hclk,
1895 &pico_clk, 1896 &pico_clk,
1896 &pio0_mck, 1897 &pio0_mck,
1897 &pio1_mck, 1898 &pio1_mck,