diff options
author | Julien May <julien.may@miromico.ch> | 2008-08-04 08:27:38 -0400 |
---|---|---|
committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-09-22 03:51:01 -0400 |
commit | 7066412488281fd1c201dceb22a0dfe467012f76 (patch) | |
tree | b5c4343143199ebd963f6537baba3f163684feab /arch/avr32/mach-at32ap/at32ap700x.c | |
parent | 48c1fd3882286fd9e978ca8725013f2e060b700e (diff) |
avr32: Allow fine-grained control over LCDC pins
This replaces the pin_config param with an u64 pin_mask in
at32_add_device_lcdc, allowing a board-maintainer to indivually select
specific lcdc pins.
Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Julien May <jmay@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32/mach-at32ap/at32ap700x.c')
-rw-r--r-- | arch/avr32/mach-at32ap/at32ap700x.c | 95 |
1 files changed, 25 insertions, 70 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index e01dbe4ebb40..c28dd172f627 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c | |||
@@ -1353,13 +1353,14 @@ static struct clk atmel_lcdfb0_pixclk = { | |||
1353 | struct platform_device *__init | 1353 | struct platform_device *__init |
1354 | at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, | 1354 | at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, |
1355 | unsigned long fbmem_start, unsigned long fbmem_len, | 1355 | unsigned long fbmem_start, unsigned long fbmem_len, |
1356 | unsigned int pin_config) | 1356 | u64 pin_mask) |
1357 | { | 1357 | { |
1358 | struct platform_device *pdev; | 1358 | struct platform_device *pdev; |
1359 | struct atmel_lcdfb_info *info; | 1359 | struct atmel_lcdfb_info *info; |
1360 | struct fb_monspecs *monspecs; | 1360 | struct fb_monspecs *monspecs; |
1361 | struct fb_videomode *modedb; | 1361 | struct fb_videomode *modedb; |
1362 | unsigned int modedb_size; | 1362 | unsigned int modedb_size; |
1363 | int i; | ||
1363 | 1364 | ||
1364 | /* | 1365 | /* |
1365 | * Do a deep copy of the fb data, monspecs and modedb. Make | 1366 | * Do a deep copy of the fb data, monspecs and modedb. Make |
@@ -1381,75 +1382,29 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, | |||
1381 | case 0: | 1382 | case 0: |
1382 | pdev = &atmel_lcdfb0_device; | 1383 | pdev = &atmel_lcdfb0_device; |
1383 | 1384 | ||
1384 | switch (pin_config) { | 1385 | if (pin_mask == 0ULL) |
1385 | case 0: | 1386 | /* Default to "full" lcdc control signals and 24bit */ |
1386 | select_peripheral(PC(19), PERIPH_A, 0); /* CC */ | 1387 | pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL; |
1387 | select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ | 1388 | |
1388 | select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ | 1389 | /* LCDC on port C */ |
1389 | select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ | 1390 | for (i = 19; i < 32; i++) { |
1390 | select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ | 1391 | if (pin_mask & (1ULL << i)) |
1391 | select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ | 1392 | at32_select_periph(GPIO_PIOC_BASE + i, |
1392 | select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ | 1393 | GPIO_PERIPH_A, 0); |
1393 | select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ | 1394 | } |
1394 | select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ | 1395 | |
1395 | select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ | 1396 | /* LCDC on port D */ |
1396 | select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ | 1397 | for (i = 0; i < 18; i++) { |
1397 | select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ | 1398 | if (pin_mask & (1ULL << i)) |
1398 | select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ | 1399 | at32_select_periph(GPIO_PIOD_BASE + i, |
1399 | select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ | 1400 | GPIO_PERIPH_A, 0); |
1400 | select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ | 1401 | } |
1401 | select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ | 1402 | |
1402 | select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ | 1403 | /* LCDC on port E */ |
1403 | select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ | 1404 | for (i = 0; i < 19; i++) { |
1404 | select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ | 1405 | if (pin_mask & (1ULL << (i + 32))) |
1405 | select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ | 1406 | at32_select_periph(GPIO_PIOE_BASE + i, |
1406 | select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ | 1407 | GPIO_PERIPH_B, 0); |
1407 | select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ | ||
1408 | select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ | ||
1409 | select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ | ||
1410 | select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ | ||
1411 | select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ | ||
1412 | select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ | ||
1413 | select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ | ||
1414 | select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ | ||
1415 | select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ | ||
1416 | select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ | ||
1417 | break; | ||
1418 | case 1: | ||
1419 | select_peripheral(PE(0), PERIPH_B, 0); /* CC */ | ||
1420 | select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ | ||
1421 | select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ | ||
1422 | select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ | ||
1423 | select_peripheral(PE(1), PERIPH_B, 0); /* DVAL */ | ||
1424 | select_peripheral(PE(2), PERIPH_B, 0); /* MODE */ | ||
1425 | select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ | ||
1426 | select_peripheral(PE(3), PERIPH_B, 0); /* DATA0 */ | ||
1427 | select_peripheral(PE(4), PERIPH_B, 0); /* DATA1 */ | ||
1428 | select_peripheral(PE(5), PERIPH_B, 0); /* DATA2 */ | ||
1429 | select_peripheral(PE(6), PERIPH_B, 0); /* DATA3 */ | ||
1430 | select_peripheral(PE(7), PERIPH_B, 0); /* DATA4 */ | ||
1431 | select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ | ||
1432 | select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ | ||
1433 | select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ | ||
1434 | select_peripheral(PE(8), PERIPH_B, 0); /* DATA8 */ | ||
1435 | select_peripheral(PE(9), PERIPH_B, 0); /* DATA9 */ | ||
1436 | select_peripheral(PE(10), PERIPH_B, 0); /* DATA10 */ | ||
1437 | select_peripheral(PE(11), PERIPH_B, 0); /* DATA11 */ | ||
1438 | select_peripheral(PE(12), PERIPH_B, 0); /* DATA12 */ | ||
1439 | select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ | ||
1440 | select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ | ||
1441 | select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ | ||
1442 | select_peripheral(PE(13), PERIPH_B, 0); /* DATA16 */ | ||
1443 | select_peripheral(PE(14), PERIPH_B, 0); /* DATA17 */ | ||
1444 | select_peripheral(PE(15), PERIPH_B, 0); /* DATA18 */ | ||
1445 | select_peripheral(PE(16), PERIPH_B, 0); /* DATA19 */ | ||
1446 | select_peripheral(PE(17), PERIPH_B, 0); /* DATA20 */ | ||
1447 | select_peripheral(PE(18), PERIPH_B, 0); /* DATA21 */ | ||
1448 | select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ | ||
1449 | select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ | ||
1450 | break; | ||
1451 | default: | ||
1452 | goto err_invalid_id; | ||
1453 | } | 1408 | } |
1454 | 1409 | ||
1455 | clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); | 1410 | clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); |